Digital design methods and practice have undergone some notable changes in recent years. Reliance upon traditional circuit design methods, such as schematic capture, has given way to the new approach of VHDL and logic...
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Digital design methods and practice have undergone some notable changes in recent years. Reliance upon traditional circuit design methods, such as schematic capture, has given way to the new approach of VHDL and logic synthesis. Most recently of all, one has witnessed the arrival of CASE-tool methodology for logic design, which integrates formalised schematic models with VHDL and synthesisable circuit descriptions. In academia, access to such tools tends to lag slightly behind the latest developments, but nonetheless, the opportunity to expose undergraduates to such leading-edge design methods is one that is both challenging and rewarding. At the University of Teesside, the Division of Electronic and computer Engineering has applied new digital design tools in the domains of research, and teaching with successful results. In research we have applied VHDL and logic synthesis to the investigation and implementation of a 32-bit stack-oriented microprocessor architecture, and investigated the feasibility of neural implementations in silicon. Practising our philosophy of fuelling teaching content from research activities, we have introduced VHDL as part of the 2nd and final year honours degree curriculum, and present students with the task of developing a simple microprocessor core in VHDL, which they then synthesise with various process technologies and optimisation parameters. In this paper the authors present an informal review of VLSI design techniques applied in research, and how this has been integrated with teaching within their division. The intention is to give a view of what may be achieved in an academic setting and how postgraduate research has benefited the undergraduate learning experience.
作者:
M. PrestonComputer Graphics Unit
Manchester Computing University of Manchester Institute of Science and Technology Manchester UK
There are two broad categories of research animation system: those designed to support a particular motion synthesis tool, and those whose implementation is intended to foster a particular form of motion generator des...
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There are two broad categories of research animation system: those designed to support a particular motion synthesis tool, and those whose implementation is intended to foster a particular form of motion generator design (such as object orientation). However, neither of these approaches really provides significant assistance to the animation researcher wishing to quickly evaluate arbitrary new motion production algorithms against existing techniques. This paper addresses that need by presenting an animation system specifically designed to provide a helpful framework for a wide variety of motion generators, and discusses how these may be implemented and used.
Retiming is used to optimize logic and improve the speed of operation in sequential circuits keeping the circuit behavior unchanged. In this paper, we show with various examples that retiming affects redundancy of fau...
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Retiming is used to optimize logic and improve the speed of operation in sequential circuits keeping the circuit behavior unchanged. In this paper, we show with various examples that retiming affects redundancy of faults. It may change an operationally redundant fault to a partially one, and a combinationally redundant fault to an irredundant but sequentially untestable fault. Many novel transformations of combinational redundancy to sequential redundancies are also exemplified. Thus, retiming strongly influences test generation and design for testability techniques in sequential circuits.
This paper presents a new technique of channel routing based on the Manhattan-Diagonal (MD) model. The layout grid is assumed to consist of two layers with tracks in horizontal, vertical and /spl plusmn/45/spl deg/ di...
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This paper presents a new technique of channel routing based on the Manhattan-Diagonal (MD) model. The layout grid is assumed to consist of two layers with tracks in horizontal, vertical and /spl plusmn/45/spl deg/ directions. First, we consider the non-overlap model and present a simple O(l,d) time algorithm that routes an arbitrary channel with no cyclic vertical constraints in w tracks, where l is the length of the channel, d is the channel density, and d/spl les/w/spl les/(d+1). Next, we describe an output-sensitive algorithm that can route general channels with cyclic vertical constraints using w tracks, in O(l,w) time allowing overlapping of wiring segments in two layers. The router outputs an 18-track solution for the Deutsch's difficult example, a 2-track solution for Burstein's difficult channel, and a 15-track solution for *** without inserting any extra row or column. Apart from quick termination, the proposed algorithms provide solutions with significantly low via count and reduced wire length. The study thus reveals the superiority of MD-routing strategy to classical techniques.
Autonomous agents in the real world must be capable of asynchronous goal generation. However, one consequence of this ability is that the agent may generate a substantial number of goals, but only a small number of th...
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The paper presents a fault tolerant distributed sorting algorithm designed to operate in a network with a tree topology subject to transient faults, crashes and joins of both links and nodes. The distributed sorting p...
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The paper presents a fault tolerant distributed sorting algorithm designed to operate in a network with a tree topology subject to transient faults, crashes and joins of both links and nodes. The distributed sorting problem can be informally described as follows: nodes cooperate to reach a global configuration, where every node, depending on its id, is assigned a specific final value taken from the set of the original values across all nodes. Each node has a initial non-corruptible id and value. Fault tolerance is achieved using Dijkstra's paradigm of self-stabilization. A self-stabilizing algorithm, regardless of the initial system state, will converge in finite time to a set of safe legitimate states through embedding fault tolerance without the need to recur to explicit exception handlers or backward recovery. Our solution is based on continuous information flow to provide each node with a consistent view of the system state. It requires the knowledge of n, the number of nodes in the system, in order to correctly stabilize and it has O(d) time complexity and O(n) memory requirement where d is the diameter of the tree network. The algorithm handles transient faults by weeding out false information in the system. Nodes can start with completely false information concerning the values, ids and final values in the system, yet the intended behavior is still achieved. Also, nodes and links are allowed to crash, provided the network remains connected. Additionally, new nodes and links can join at any time.
A self-stabilizing distributed system is a network of processors, which, regardless of its initial global state, will achieve the desired state in a finite number of steps. There are two main performance issues in the...
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A self-stabilizing distributed system is a network of processors, which, regardless of its initial global state, will achieve the desired state in a finite number of steps. There are two main performance issues in the design of a self-stabilizing system: the stabilization time and memory requirements (the number of states required by each process). We first show that the probabilistic two-state algorithm for asynchronous, unidirectional token rings stabilizes only in systems where k, the upper bound for the ratio of the speeds of any two processes, exists, but is unknown, and neither the convergence time nor token circulation delay of this algorithm can be bounded. Then we present an almost two-state self-stabilizing algorithm for unidirectional token rings. The processes move synchronously and k is known. The algorithm requires each process in the ring to have two states; one process, called the exceptional process, needs an additional integer variable of size O(n), where n is the number of nodes in the ring; the algorithm stabilizes in O(n) time and achieves an O(kn) token circulation delay.
To compare the advantages and disadvantages of a "natural user interface" a field study was carried out at the largest computer fair in Switzerland. Four different computer stations were presented to the pub...
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To compare the advantages and disadvantages of a "natural user interface" a field study was carried out at the largest computer fair in Switzerland. Four different computer stations were presented to the public: 1) with a command language; 2) with a mouse; 3) with a touch screen; and 4) a digital playing desk (DPD) interface. With the DPD the user has to play a board game by moving a real chip an a virtual playing field against a virtual player. The task was to win the computer game. The reactions of the virtual player were simulated by "emoticons" as colored comic strip pictures with a corresponding sound pattern. We investigated the effects of these four different interaction techniques. Results of the inquiry show that the touch screen station was rated as the easiest to use interaction technique, followed by the mouse, DPD interface and the command language interface. From the results of the field test we conclude that the DPD as a graspable user interface with emotional, non-verbal feedback is a promising candidate for the next generation of dialog techniques.
A new analytical model of the ventricle as a pump, embodied as a volume-dependent isovolumic pressure source, was tested over a range of loading conditions. Results suggest that Starling's Law of the Heart is a di...
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A new analytical model of the ventricle as a pump, embodied as a volume-dependent isovolumic pressure source, was tested over a range of loading conditions. Results suggest that Starling's Law of the Heart is a direct result of the ventricle's isovolumic properties, rather than an independent mechanical property.
Analytical models of the cardiovascular system typically use time-varying elastance descriptions of the heart chambers, e.g. the left ventricle. These elastance functions are derived from volume and pressure data. Con...
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Analytical models of the cardiovascular system typically use time-varying elastance descriptions of the heart chambers, e.g. the left ventricle. These elastance functions are derived from volume and pressure data. Consequently, although they are used to characterize the ventricle alone, their origin makes them characteristic of a particular ventricle and arterial load combination. This inability to separate source and load is eliminated by a new ventricle model based on a volume and time dependent isovolumic pressure function, derived from animal experiments.
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