The purpose of this paper is to introduce an novel edge detector using directional wavelet transform and signal registration. Directional wavelet transform decomposes an image into four-dimensional space which augment...
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The purpose of this paper is to introduce an novel edge detector using directional wavelet transform and signal registration. Directional wavelet transform decomposes an image into four-dimensional space which augments the image by the scale and directional information. We show the directional information significantly improves edge detection in noisy images in comparison with the classical multiscale edge detector, and enables more reliable edge tracing along an object boundary. Edge detection is based on the modulus maximum principle with an adaptive threshold whose value is calculated via maximum entropy measure. Edge tracing is done with signal alignment between neighbour edges
This paper presents a new hierarchical method of the edge relaxation by using an edge confidence measure. Proposed method is an adaptive and based on directional hierarchical image decomposition and an edge connecting...
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This paper presents a new hierarchical method of the edge relaxation by using an edge confidence measure. Proposed method is an adaptive and based on directional hierarchical image decomposition and an edge connecting algorithm. It is shown that such combination has low sensitivity to noise, while it is highly robust to outliers, and provide a quality edge connection mechanism
A low power 16-bit RISC is proposed for body sensor network system. The proposed IPEEP scheme provides zero overhead for the wakeup operation. The lossless compression accelerator is embedded in the RISC to support th...
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A low power 16-bit RISC is proposed for body sensor network system. The proposed IPEEP scheme provides zero overhead for the wakeup operation. The lossless compression accelerator is embedded in the RISC to support the low energy data compression. The accelerator consists of 16times16-bit storage array which has vertical and horizontal access path. By using the accelerator the energy consumption of the lossless compression operation is reduced by 93.8%. The RISC is implemented by 1-poly 6-metal 0.18 um CMOS technology with 16 k gates. It operates at 4 MHz and consumes 24.2 uW at 0.6 V supply voltage.
The purpose of this paper is to introduce a novel image enhancement technique by using directional wavelet transform. Directional wavelet transform decomposes an image into four-dimensional space which augments the im...
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The purpose of this paper is to introduce a novel image enhancement technique by using directional wavelet transform. Directional wavelet transform decomposes an image into four-dimensional space which augments the image by the scale and directional information. We show the directional information significantly improves image enhancement in noisy images in comparison with the classical techniques. Image enhancement is based on the multiscale singularity detection with an adaptive threshold whose value is calculated via maximum entropy measure. The proposed technique was tested on synthetic images at different signal-to-noise ratios and clinical images
Road boundary detection and tracking is an important and integral function in advanced driver-assistance system. This paper proposes an algorithm, which can follow multi-kinds of lane, straight and curved, quickly and...
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A structure of logical hierarchical cluster for the distributed multimedia on demand server is proposed. The architecture is mainly composed of the network topology and the resource management of all server nodes. Ins...
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A structure of logical hierarchical cluster for the distributed multimedia on demand server is proposed. The architecture is mainly composed of the network topology and the resource management of all server nodes. Instead of the physical network hierarchy or the independent management hierarchy, the nodes are organized into a logically hieraxchical cluster according to the multimedia block they caches in the midderware layer. The process of a member joining/leaving or the structure adjustment cooperatively implemented by all members is concerned with decentralized maintenance of the logical cluster hierarchy. As the root of each logically hierarchical cluster is randomly mapped into the system, the logical structure of a multimedia block is dynamically expanded across some regions by the two replication policies in different load state respectively. The local load diversion is applied to fine-tune the load of nodes within a local region but belongs to different logical hierarchies. Guaranteed by the dynamic expansion of a logical structure and the load diversion of a local region, the users always select a closest idle node from the logical hierarchy under the condition of topology integration with resource management.
Variable length decoding(VLD) is inherent bit-serial operation and is the first stage of the whole video decoding task,the overall decoding system performance is determined by its throughput and ef
Variable length decoding(VLD) is inherent bit-serial operation and is the first stage of the whole video decoding task,the overall decoding system performance is determined by its throughput and ef
Video decoders are an important component in modern networked multimedia systems. TMS320DM642 is suitable for implementation of embedded video ***,the high data rate, large sizes,and distinctive memory access patterns...
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Video decoders are an important component in modern networked multimedia systems. TMS320DM642 is suitable for implementation of embedded video ***,the high data rate, large sizes,and distinctive memory access patterns of MPEG-4 video decoders exert a particular strain on *** paper proposes an optimization method to allocate the memory of *** Cache-SRAM -SDRAM structure,the SRAM negotiates the unbalance of the cache and the SDRAM in speed and *** to its importance,a cache-based memory allocation mode is proposed to make full use of the *** to this mode,the SRAM is divided into three sections:the data exchanging section,the core code and variables storage section, and the rest of the SRAM which is set as cache for the other codes and data *** experiment results show the proposed solutions can improve the MPEG-4 decoding speed by almost 25%.This cache optimization method has been integrated into the developed embedded MPEG-4 video *** decoder can perform real time decoding with bitstreams coded under two channels 4CIF or eight channels CIF frame size which is the typical requirement of networked video surveillance applications nowadays.
One hurdle to using peer-to-peer networks as anonymizing networks is churn. Node churn makes anonymous paths fragile and short-lived: failures of a relay node disrupt the path, resulting in message loss and communicat...
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One hurdle to using peer-to-peer networks as anonymizing networks is churn. Node churn makes anonymous paths fragile and short-lived: failures of a relay node disrupt the path, resulting in message loss and communication failures. To make anonymous routing resilient to node failures, we use a simple yet powerful idea based on message redundancy by erasure coding and path redundancy to mask node failures. We present an allocation of erasure-coded message segments among multiple paths that provides a guideline on how to maximize routing resilience upon different node availabilities in real-world systems. Our approach allows a tradeoff between routing resilience and bandwidth usage. We show that our approach greatly improves routing resilience while only incurring a moderate bandwidth overhead
This paper presents a new code structure and its ability in supporting multiple transmission rates in point to point Spectral Amplitude Coding- Optical Code Division Multiple Access (SAC-OCDMA) links. The Double-Weigh...
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