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A practical analysis of the robustness and stability of the network stack in smartphones

A practical analysis of the robustness and stability of the ...

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International Conference on computer and Information technology (ICCIT)

作者： Sheikh Mahbub Habib Cyril Jacob Tomas Olovsson Department of Computer Science & Engineering Chalmers University of Technology Gothenburg Sweden

Smartphones are widely used nowadays and their popularity will certainly not slow down in the near future due to improved functionality and new technology improvements. Becoming more and more similar to PCs and laptops, they will also begin to face the same security problems especially in terms of network security. In this paper, we provide an overview of security issues for smartphones and give a brief introduction of the network stack architecture of Windows Mobile 5.0 platform in order to motivate and plan for efficient penetration tests against Windows Mobile 5.0 powered smartphones. Furthermore, a number of attacks have been done against different layers of the network stack and a list of supporting penetration tools are provided for interested practitioners. Detailed results are provided from the penetration tests performed which should be very useful for security vendors, researchers and OS vendors to give more attention to security architectures and development of security software (e.g. firewalls, antivirus) for the mobile operating systems. In a whole, robustness and stability will be assessed for the mobile OSs used by the smartphones throughout the paper.

关键词： Robust stability Stability analysis Smart phones Personal communication networks Portable computers Software testing System testing Performance evaluation Power system security computer architecture

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Efficient management of speculative data in hardware transactional memory systems

Efficient management of speculative data in hardware transac...

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International Conference on Embedded computer Systems: Architectures, Modeling and Simulation (IC-SAMOS)

作者： M. M. Waliullah Per Stenstrom Department of Computer Science and Engineering Chalmers University of Technology Gooteborg Sweden

Transactional memory systems promise to simplify parallel programming by avoiding deadlock, livelock, and serialization problems through optimistic, concurrent execution of code segments that potentially can have data conflicts with each other. Data conflict detection in proposed hardware transactional memory systems is done by associating a read bit with each cache block that is set when a block is speculatively read. However, since the set of blocks that have been speculatively read - the read set - has to be maintained until the transaction commits, one can often not replace a block that has been speculatively read. This leads to poor utilization of the private caches in a multi-core system. We propose a new scheme for managing the read set in hardware transactional memory systems. The novel insight is that only the addresses of the speculatively read blocks are needed for conflict detection but not the data. As a result, there is an opportunity to reduce the space needed to keep track of speculatively read blocks by B/A, where B is the block size and A is the block address. Assuming that B is 32 bytes and A is 32 bits, there is an eightfold space saving due to this. This paper presents a novel design for leveraging this opportunity and evaluates a concept that uses a Bloom filter to hash the addresses of the read set into a structure. We find that the proposed scheme utilizes the private cache more efficiently in a typical system configuration.

关键词： Hardware Memory management Multiprocessor interconnection networks Degradation Parallel programming System recovery technology management engineering management computer science Maintenance engineering

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An intrusion detection system for wireless process control systems

An intrusion detection system for wireless process control s...

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IEEE Internatonal Conference on Mobile Adhoc and Sensor Systems (MASS)

作者： Tanya Roosta Dennis K. Nilsson Ulf Lindqvist Alfonso Valdes Department of Electrical Engineering and Computer Science UC-Berkeley Department of Computer Science and Engineering Chalmers University of Technology Sweden Computer Science Laboratory SRI International

A recent trend in the process control system (PCS) is to deploy sensor networks in hard-to-reach areas. Using wireless sensors greatly decreases the wiring costs and increases the volume of data gathered for plant monitoring. However, ensuring the security of the deployed sensor network, which is part of the overall security of PCS, is of crucial importance. In this paper, we design a model-based intrusion detection system (IDS) for sensor networks used for PCS. Given that PCS tends to have regular traffic patterns and a well-defined request-response communication, we can design an IDS that models normal behavior of the entities and detects attacks when there is a deviation from this model. Model-based IDS can prove useful in detecting unknown attacks.

关键词： Monitoring SCADA systems Wireless sensor networks Wireless communication Process control Security Intrusion detection

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Wait-free Programming for General Purpose Computations on Graphics Processors

Wait-free Programming for General Purpose Computations on Gr...

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International Symposium on Parallel and Distributed Processing (IPDPS)

作者： Phuong Hoai Ha Philippas Tsigas Otto J. Anshus Department of Computer Science Faculty of Science University of Tromsø Tromso Norway Department of Computer Science and Engineering Chalmers University of Technology Goteborg Sweden

The fact that graphics processors (GPUs) are today's most powerful computational hardware for the dollar has motivated researchers to utilize the ubiquitous and powerful GPUs for general-purpose computing. Recent GPUs feature the single-program multiple-data (SPMD) multicore architecture instead of the single-instruction multiple-data (SIMD). However, unlike CPUs, GPUs devote their transistors mainly to data processing rather than data caching and flow control, and consequently most of the powerful GPUs with many cores do not support any synchronization mechanisms between their cores. This prevents GPUs from being deployed more widely for general-purpose computing. This paper aims at bridging the gap between the lack of synchronization mechanisms in recent GPU architectures and the need of synchronization mechanisms in parallel applications. Based on the intrinsic features of recent GPU architectures, we construct strong synchronization objects like wait-free and t-resilient read-modify-write objects for a general model of recent GPU architectures without strong hardware synchronization primitives like test-and- set and compare-and-swap. Accesses to the wait-free objects have time complexity O(N), whether N is the number of processes. Our result demonstrates that it is possible to construct wait-free synchronization mechanisms for GPUs without the need of strong synchronization primitives in hardware and that wait-free programming is possible for GPUs.

关键词： Synchronization computer architecture Pervasive computing Hardware computer science Yarn computer graphics Data processing Testing Data flow computing

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On the Integrity of Lightweight Checkpoints

On the Integrity of Lightweight Checkpoints

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11th IEEE High Assurance Systems engineering Symposium(HASE 2008)(第十一届IEEE高可信系统工程国际研讨会)

作者： Raul Barbosa Johan Karlsson Department of Computer Science and Engineering Chalmers University of Technology SE-412 96 Goteborg Sweden

This paper proposes a lightweight checkpointing scheme for real-time embedded systems. The goal is to separate concerns by allowing applications to take checkpoints independently while providing them with an operating system service to assure the integrity of checkpoints. The scheme takes error detection latency into account and assumes a broad class of application failure modes. In this paper we detail the design of the operating system service, which offers a very simple programming model to application designers and introduces only a small execution overhead foreach checkpoint. Moreover, we describe the usage of model checking to ascertain the correctness of our approach.

关键词： fault tolerance embedded systems checkpointing model checking

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Selecting back off algorithm in active RFID CSMA/CA based medium-access protocols

Selecting back off algorithm in active RFID CSMA/CA based me...

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International Symposium on Industrial Embedded Systems

作者： Bjorn Nilsson Lars Bengtsson Bertil Svensson CERES Halmstad University Halmstad Sweden Department of Computer Science and Engineering Chalmers University of Technology Goteborg Sweden

ISBN: (纸本)9781424419944;9781424419951

Active radio frequency identification (A-RFID) is a technology where the tags (transponders) carry an on board energy source for powering the radio, processor circuits, and sensors. Besides offering longer working distance between RFID-reader and tag than passive RFID, this also enables the tags to do sensor measurements, calculations and storage even when no RFID-reader is in the vicinity of the tags. In this paper we study the effect on tag energy cost and read out delay incurred by some typical back-off algorithms (constant, linear, and exponential) used in a contention based CSMA/CA (carrier sense multiple access/collision avoidance) protocol for A-RFID communication.

关键词： TAGGING Radio frequency identification MAC protocol algorithms Radio Frequency Identification Device Window Size Energy sources Sensors

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Systematic binary deterministic rateless codes

Systematic binary deterministic rateless codes

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IEEE International Symposium on Information Theory

作者： Ming Xiao Tor Aulin Muriel Medard ACCESS Linnaeus Center Royal Institute of Technology Sweden Department of Computer Engineering Chalmers University of Technology Gothenburg Sweden Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology USA

ISBN: (纸本)9781424422562

We investigate a systematic construction of binary deterministic rateless codes (BDRCs). The codes are for networks with erasure channels. With a maximum distance separable (MDS) property, non-systematic BDRCs were first proposed in [1] with encoding complexity O(K), and decoding complexity is O(K 2 ). Here K is the length of information bits. To reduce complexity, we study systematic-BDRCs (SBDRCs). For SBDRCs, the source first transmits m - 1 uncoded blocks, where m is the number of source blocks. Then, the source produces and transmits coded blocks in a rateless way. These coded blocks are produced using only cyclic-shift and XOR (exclusive or). The SBDRCs can use a large number of information blocks (potentially infinite m). On receiving any m distinct blocks (uncoded or coded), a sink can rebuild the source. The SBDRCs have encoding complexity O(isinK), and decoding complexity O(isin 2 K 2 ), where isin is the source-to-sink block erasure probability.

关键词： Complexity theory Arrays Encoding Polynomials Decoding Chapters Finite element methods

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SAT-solving in practice

SAT-solving in practice

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International Workshop on Discrete Event Systems, WODES

作者： Koen Claessen Niklas Een Mary Sheeran Niklas Sorensson Department of Computer Science and Engineering Chalmers University of Technology Gothenburg Sweden Cadence Research Laboratories Berkeley CA USA

Satisfiability solving, the problem of deciding whether the variables of a propositional formula can be assigned in such a way that the formula evaluates to true, is one of the classic problems in computer science. It is of theoretical interest because it is the canonical NP-complete problem. It is of practical interest because modern SAT-solvers can be used to solve many important and practical problems. In this tutorial paper, we show briefly how such SAT-solvers are implemented, and point to some typical applications of them. Our aim is to provide sufficient information (much of it through the reference list) to kick-start researchers from new fields wishing to apply SAT-solvers to their problems.

关键词： Discrete event systems Conferences

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A Revised Taxonomy of Data Collection Mechanisms with a Focus on Intrusion Detection

A Revised Taxonomy of Data Collection Mechanisms with a Focu...

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International Conference on Availability, Reliability and Security, ARES

作者： Ulf Larson Erland Jonsson Stefan Lindskog Department of Computer Science and Engineering Chalmers University of Technology Gothenburg Sweden Centre for Quantifiable Quality of Service in Communication Systems Norwegian University of Science and Technology Trondheim Norway

Surprisingly few data collection mechanisms have been used for intrusion detection, and most systems rely on network and system call data as input to the detection engine. Even though the quality of log data is vital to the detection process and heavily dependent on the collection mechanism, no extensive survey or taxonomy has been conducted within the detection field. In this paper, we propose a revised taxonomy which provides a unified terminology and a framework in which data collection mechanisms can be systematically inspected, evaluated, and compared. Since the taxonomy is derived from existing mechanisms, it also provides a useful overview of different types of mechanisms. The paper also suggests areas within data collection where additional work is required.

关键词： Taxonomy Intrusion detection Terminology Guidelines Availability computer security Data security computer science Data engineering Reliability engineering

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Operator-Centric and Adaptive Intrusion Detection

Operator-Centric and Adaptive Intrusion Detection

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International Symposium on Information Assurance and Security (IAS)

作者： Ulf E. Larson Stefan Lindskog Dennis K. Nilsson Erland Jonsson Department of Computer Science and Engineering Chalmers University of Technology Goteborg Sweden Centre for Quantifiable Quality of Service Communication Systems Norwegian University of Science and Technology Trondheim Norway

ISBN: (纸本)9780769533247

An intrusion detection system should support the operator of the system. Thus, in addition to producing alerts, it should allow for easy insertion of new detection algorithms. It should also support dynamic selection and de-selection of detection algorithms, and it should adjust its resource consumption to the current need. Such a system would allow the operator to easily extend the system when new detection algorithms become available. It would also allow the operator to maintain a low-cost monitoring baseline and perform more extensive monitoring when it is required. In this paper we propose an architecture for intrusion detection which aims at providing the operator with this support. The architecture uses a modular design to promote a high degree of flexibility. This supports creation of an environment in which state-of-the-art intrusion detection algorithms easily can be inserted. The modular design also allows for detection algorithms to be enabled and disabled when required. Additionally, the architecture uses a sensor reconfiguration mechanism to affect the amount of data collected. When a detection algorithm is enabled or disabled, the sensor providing the input data to the algorithm is correspondingly reconfigured. This implies a minimum of excess collected data. To illustrate the feasibility of the architecture, we provide a proof - of-concept supporting monitoring of users for insider detection and webserver monitoring for intrusion attempts.

关键词： Monitoring Data mining Intrusion detection Detectors Detection algorithms computer architecture Organizations

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