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InfoShield: a security architecture for protecting information usage in memory

InfoShield: a security architecture for protecting informati...

引用

IEEE Symposium on High-Performance computer Architecture

作者： W. Shi J.B. Fryman G. Gu H.-H.S. Lee Y. Zhang J. Yang School of Electrical and Computer Engineering Georgia Tech College of Computing Georgia Institute of Technology Programming System Lab Corporate Technology Intel Corporation USA Department of Computer Science University of Pittsburgh USA Department of Computer Science and Engineering University of California Riverside USA

Cyber theft is a serious threat to Internet security. It is one of the major security concerns by both network service providers and Internet users. Though sensitive information can be encrypted when stored in non-volatile memory such as hard disks, for many e-commerce and network applications, sensitive information is often stored as plaintext in main memory. Documented and reported exploits facilitate an adversary stealing sensitive information from an application's memory. These exploits include illegitimate memory scan, information theft oriented buffer overflow, invalid pointer manipulation, integer overflow, password stealing Trojans and so forth. Today's computing system and its hardware cannot address these exploits effectively in a coherent way. This paper presents a unified and lightweight solution, called InfoShield that can strengthen application protection against theft of sensitive information such as passwords, encryption keys, and other private data with a minimal performance impact. Unlike prior whole memory encryption and information flow based efforts, InfoShield protects the usage of information. InfoShield ensures that sensitive data are used only as defined by application semantics, preventing misuse of information. Comparing with prior art, InfoShield handles a broader range of information theft scenarios in a unified framework with less overhead. Evaluation using popular network client-server applications shows that InfoShield is sound for practical use and incurs little performance loss because InfoShield only protects absolute, critical sensitive information. Based on the profiling results, only 0.3% of memory accesses and 0.2% of executed codes are affected by InfoShield.

关键词： Information security Protection Cryptography computer security IP networks Web and internet services Nonvolatile memory Hard disks Buffer overflow Hardware

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Integrated information processing and communications: Complexity analysis

Integrated information processing and communications: Comple...

引用

IASTED International Conference on COMMUNICATION systemS AND APPLICATIONS Part of the Sixth IASTED International Multi-Conference on WIRELESS AND OPTICAL COMMUNICATIONS

作者： Huyu, Qu Le, Yi Wang Yaprak, Ece Hong, Wang Yanlong, Zhao Department of Electrical and Computer Engineering Wayne State University Detroit MI 48202 United States Division of Engineering Technology Wayne State University Detroit MI 48202 United States Department of Anesthesiology Wayne State University Detroit MI 48202 United States Key Laboratory of System and Control Academy of Mathematics and Systems Science Chinese Academy of Sciences China

Accuracy of information transmission when a signal must be transmitted through a communication channel is of essential importance in design of communication systems. When system resources are limited, such as transmission bandwidths assigned to a wireless communication channel, appropriate utility of available resources becomes imperative. This paper investigates fundamental relationships between accuracy of information exchange and communication resources, on a platform of wireless communication channels that involve typical system blocks of data compression, quantization, and stochastic wireless channels. The main complexity relationships developed in this paper provide rigorous trade-off between resource consumptions and information processing errors of each block. When these relationships are integrated, an optimization procedure emerges that allows optimal allocation of resources to each system block, such as compression ratio, quantization levels, and transmission speed, to maximize overall information accuracy. Consequently, the overall errors of the transmitted signal will be minimized at the receiver end.

关键词： Data processing

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A Distributed Supervisor Synthesis Approach Based on Weak Bisimulation

A Distributed Supervisor Synthesis Approach Based on Weak Bi...

引用

International Workshop on Discrete Event systems, WODES

作者： Rong Su J.G. Thistle System Architecture and Networking Group (SAN) in Department of Mathematics and Computer Science Eindhovan University of Technology Eindhoven Netherlands Department of Electrical and Computer Engineering University of Waterloo Waterloo ONT Canada

It is well known that space and time complexity is one of the main bottlenecks of supervisor synthesis. The model of a large system is usually too big to be explicitly expressed, owing to composition of local components' models, making supervisor synthesis difficult, if still possible. In this paper, we propose a distributed supervisor synthesis approach, where instead of computing a model of the entire system, a local abstraction of the system with respect to each local component is computed based on weak bisimulation. Then a local supervisor for each component is computed based on the component model and the abstract system model, by using well developed centralized supervisor synthesis approaches. The collection of all resulting local supervisors forms a distributed supervisor

关键词： Distributed computing Control system synthesis Automata Centralized control Control theory Computational complexity Encoding Data structures Boolean functions Network synthesis

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Impact of an ARQ scheme in the MAC/LLC layer on upper-layer packet transmissions over a Markovian channel

Impact of an ARQ scheme in the MAC/LLC layer on upper-layer ...

引用

2006 IEEE 63rd Vehicular Technology Conference, VTC 2006-Spring

作者： Seo, Jun-Bae Park, Nam-Hoon Lee, Hyong-Woo Cho, Ong-Ho Department of Wireless System Research Electronics and Telecommunication Research Institute 161 Gajeong-dong Yuseong gu Daejeon 305-350 Korea Republic of Department of Electronics and Information Engineering Korea University Chochiwon Choongnam 339-700 Korea Republic of Department of Computer and Information Science Korea University Chochiwon Choongnam 339-700 Korea Republic of

ISBN: (纸本)0780393929

In this paper, we capture the impact of an ARQ scheme in the MAC/LLC layer with a forward error-correcting code on upper-layer packet transmissions over a Markovian channel by examining the performance of a single service data unit which may be either a TCP segment or a UDP packet. We assume that the ACK/NACK delay of ARQ blocks belong to a single service data unit is less than the transmission period of each ARQ block. The performance measures of a single service data unit transmission are derived in terms of the transmission success and failure probabilities given a retransmission time-out value, retransmission timeout probability and the moments of transmission delay. Further, the queueing performance of a service data unit transmitter is also presented by varying average received signal-to-noise ratio, mobile velocity, number of ARQ blocks needed to transmit a single service data unit, number of retransmissions for each ARQ block and error-correcting capability applied to an ARQ block. From numerical examples, renegotiation between a serving base station and a mobile station is needed, when the mobile station is far from the serving base station in order that a service data unit is fragmented into a larger number of ARQ blocks in order to apply high errorcorrecting capability for each one. © 2006 IEEE.

关键词： Medium access control

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Wizard's apprentice gameplay-oriented design of a computer-augmented board game

Wizard's apprentice gameplay-oriented design of a computer-a...

引用

International Conference on Advances in computer Entertainment Technology 2006

作者： Peitz, Johan Björk, Staffan Jäppinen, Anu Epstein Dep of Industrial and Sys. Eng. Integrated Media System Center University of Southern California Los Angeles CA 90089 United States Computer Science Department Viterbi School of Engineering University of Southern California Los Angeles CA 90089 United States

ISBN: (纸本)1595933808

This paper describes the prototype Wizard's Apprentice, a computer-augmented board game. Unlike many previous examples from research, which use board games as a means to explore technology, the game was developed from the starting point of gameplay design goals. The paper reports upon how the different starting point required iteration between the various design disciplines involved. The game and the design within the various disciplines are described together with sections on how results from one discipline affected other. The paper ends with reports from the first preliminary evaluation. © 2006 ACM.

关键词： Animation

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Combined Image Signal Processing for CMOS Image Sensors

Combined Image Signal Processing for CMOS Image Sensors

引用

Proceedings of 2006 IEEE International Symposium on Circuits and systems,Volume 7

作者： Kimo Kim In-Cheol Park System LSI Division Samsung Electronics Company Limited South Korea Department of Electrical Engineering and Computer Science KAIST South Korea

This paper presents an efficient image signal processing structure for CMOS image sensors to achieve low area and power consumption. Although CMOS image sensors (CISs) have various benefits compared with charge-coupled devices (CCDs), the images obtained from CISs have much lower quality than those from CCDs. To improve the quality of CIS images, it is required to do reproducing and enhancing processings such as color interpolation, white balancing, color correction, gamma correction and color conversion. They are implemented individually in most conventional designs though they have similar functional characteristics. In this proposed structure, the gamma correction block is moved to the front in order to combine several image signal processings into one block. An efficient compensation scheme is also proposed to reduce the errors caused by the moving of the non-linear gamma correction. A prototype CIS image signal processor is implemented in Verilog-HDL and synthesized with 0.18μm standard cell library. Experimental results show that the proposed structure reduces area and power consumption by 23.8% and 31.1%, respectively.

关键词： Signal processing CMOS image sensors Color Energy consumption Computational Intelligence Society Interpolation Image converters Error correction Prototypes Hardware design languages

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A study on vision-based robust hand-posture recognition by learning similarity between hand-posture and structure

引用

2nd International Conference on Natural Computation, ICNC 2006

作者： Hyoyoung, Jang Jin-Woo, Jung Zeungnam, Bien Department of Electrical Engineering and Computer Science KAIST 373-1 Guesong-dong Yuseong-gu Daejeon 305-701 Korea Republic of Human-Friendly Welfare Robot System Research Center KAIST 373-1 Guesong-dong Yuseong-gu Daejeon 305-701 Korea Republic of

ISBN: (纸本)3540459073

This paper proposes a robust hand-posture recognition method by learning similarity between hand-posture and structure for the performance improvement of vision-based hand-posture recognition. The difficulties in vision-based hand-posture recognition lie in viewing direction dependency and self-occlusion problem due to the high degree-of-freedom of human hand. General approaches to deal with these problems include multiple camera approach and methods of limiting the relative angle between cameras and the user's hand. In the case of using multiple cameras, however, fusion techniques to induce the final decision should be considered. Limiting the angle of user's hand restricts the user's freedom. The proposed method combines angular features and appearance features to describe hand-postures by a two-layered data structure and includes learning the similarity between the two types of features. The validity of the proposed method is evaluated by applying it to the hand-posture recognition system using three cameras. © Springer-Verlag Berlin Heidelberg 2006.

关键词： Gesture recognition

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From driving to expressive music performance: ensuring tempo smoothness

From driving to expressive music performance: ensuring tempo...

引用

International Conference on Advances in computer Entertainment Technology 2006

作者： Liu, Jie Chew, Elaine François, Alexandre R. J. Epstein Dep. of Industrial and Sys. Eng. Integrated Media System Center University of Southern California Los Angeles CA 90089 United States Computer Science Department Viterbi School of Engineering University of Southern California Los Angeles CA 90089 United States

ISBN: (纸本)1595933808

This paper focuses on the mapping strategies in the interface design for the Expression Synthesis Project (ESP). The goal of ESP is to use the metaphor of driving to allow non-experts to interactively create expressive renderings of music pieces. In ESP, the road represents the music, with bends and straight segments representing places where one might slow down and speed up respectively. The user controls the tempo (rate of beats) and dynamics (amplitude) by the way s/he drives through the road. Our design objective in the ESP environment is to define mapping strategies that guarantee tempo smoothness, a hallmark of expert and practiced performances, under all driving conditions. Because the road has non-zero width, several strategies exist for mapping the car's position on the road to the musical score. We propose mapping strategies that ensure tempo smoothness, and provide mathematical and empirical proofs for the success of these strategies. © 2006 ACM.

关键词： computer music

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Parallel CRC Logic Optimization Algorithm for High Speed Communication systems

Parallel CRC Logic Optimization Algorithm for High Speed Com...

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International Conference on Communication systems

作者： Hyunbean Yi Jaehoon Song Sungju Park Changwon Park Department of Computer Science & Engineering Hanyang University South Korea Intelligent IT System Research Center Korea Electronics and Technology Institute South Korea

This paper presents a new optimization algorithm for designing parallel cyclic redundancy check (CRC) circuits widely adopted to detect burst errors in high-speed communications. Our heuristic algorithm is focused on minimizing the logic level and finding XOR terms shared as many as possible. An Ethernet 32-bit CRC generator, which was designed and mapped to FPGA and a standard cell library, shows the superiority of our approach in reducing the delay and area overhead

关键词： Cyclic redundancy check Logic Design optimization Algorithm design and analysis Circuits Heuristic algorithms Ethernet networks Field programmable gate arrays Libraries Delay

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Analysis and design of control system with equivalent-input-disturbance estimation

Analysis and design of control system with equivalent-input-...

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IEEE International Conference on computer-Aided Design

作者： Jin-Hua She Xin Xin Tomio Yamaura School of Bionics Tokyo University of Technology Hachioji Tokyo Japan Department of Communication Engineering Faculty of Computer Science and System Engineering Okayama Prefectural University Okayama Japan

This paper examines the mechanism of disturbance rejection in control systems employing a technique called equivalent-input-disturbance estimation. Analysis of the mechanism shows that the filter in the control system strongly affects the disturbance rejection performance. A new method of designing such control systems that employs H infin control theory and linear matrix inequalities is presented; and simulations of a magnetic levitation system demonstrate its validity

关键词： Control systems Magnetic analysis Performance analysis Magnetic separation Filters Design methodology Control system synthesis Control theory Linear matrix inequalities Magnetic levitation

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