Numerous examples of temporal reasoning involve a process of abstraction from the number of times an event is to occur or the number of times events stand in a temporal relation. For example, scheduling a recurring ev...
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Numerous examples of temporal reasoning involve a process of abstraction from the number of times an event is to occur or the number of times events stand in a temporal relation. For example, scheduling a recurring event such as one's office hours may consider things like the relative temporal ordering of the office hours and a number of other events in a given work day. The number of times office hours will actually be held may be unknown, even irrelevant, at the time of scheduling them. The objective of this article is to formulate a domain-independent framework for reasoning about recurring events and their relations. To achieve this end, we propose an ontology of recurrence based on the model-theoretic structure underlying collective predication using plural noun phrases. We offer a calculus of binary temporal relations for temporal collections based on a well-defined transformation of interval temporal relations into recurrence relations. Finally, we describe a reasoning framework based on manipulating knowledge stored in temporal relation networks, which is in turn a specialization of the CSP (constraint satisfaction problem) framework. The reasoner manipulates recurrence relations in the network to determine the network's consistency or to generate scenarios.
In an era of fiscal austerity, downsizing and unforgiving pressure upon human and economic capital, it is an Augean task to identify resources for fresh and creative work. The realities of the day and the practical de...
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In an era of fiscal austerity, downsizing and unforgiving pressure upon human and economic capital, it is an Augean task to identify resources for fresh and creative work. The realities of the day and the practical demands of more immediate fleet needs can often dictate higher priorities. Yet, the Navy must avoid eating its seed corn. Exercising both technical insight and management foresight, the fleet, the R&D community, the Office of the Chief of Naval Operations (OpNav) and the product engineering expertise of the Naval Surface Warfare Center (NSWC) are joined and underway with integrated efforts to marry new, fully demonstrated technologies and operational urgencies. Defense funding today cannot sponsor all work that can be mission-justified over the long term because budgets are insufficient to support product maturation within the classical development cycle. However, by rigorous technical filtering and astute engineering of both marketplace capabilities and currently available components, it is possible in a few select cases to compress and, in effect, integrate advanced development (6.3), engineering development (6.4), weapon procurement (WPN), ship construction (SCN), operation and maintenance (O&M,N) budgetary categories when fleet criticalities and technology opportunities can happily meet. In short, 6.3 funds can be applied directly to ''ripe gateways'' so modern technology is inserted into existing troubled or aging systems, sidestepping the lengthy, traditional development cycle and accelerating practical payoffs to recurrent fleet problems. To produce such constructive results has required a remarkable convergence of sponsor prescience and engineering workforce excellence. The paper describes, extensively, the philosophy of approach, transition strategy, polling of fleet needs, technology assessment, and management team requirements. The process for culling and selecting specific candidate tasks for SHARP sponsorship (matching operational need with t
The objectives of Human Engineering (HE) are generally viewed as increasing human performance, reducing human error, enhancing personnel and equipment safety, and reducing training and related personnel costs. There a...
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The objectives of Human Engineering (HE) are generally viewed as increasing human performance, reducing human error, enhancing personnel and equipment safety, and reducing training and related personnel costs. There are other benefits that are thoroughly consistent with the direction of the Navy of the future, chief among these is reduction of required numbers of personnel to operate and maintain Navy ships. The Naval Research Advisory Committee (NRAC) report on Man-Machine technology in the Navy estimated that one of the benefits from increased application of man-machine technology to Navy ship design is personnel reduction as well as improving system availability, effectiveness, and safety The objective of this paper is to discuss aspects of the human engineering design of ships and systems that affect manning requirements, and impact human-performance and safety The paper will also discuss how the application of human engineering leads to improved performance, and crew safety, and reduced workload, all of which influence manning levels. Finally, the paper presents a discussion of tools and case studies of good human engineering design practices which reduce manning.
Summary form only given. This paper presents a new and efficient method of encoding uniform image regions and lines. Regions and lines are obtained as the result of image segmentation, split and merge image compressio...
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Summary form only given. This paper presents a new and efficient method of encoding uniform image regions and lines. Regions and lines are obtained as the result of image segmentation, split and merge image compression, or as the output of line and polygon drawing algorithms. Lines and contours of uniform regions are encoded using chain-code. The chain-code is obtained in a way that is efficient with respect to bit-rate and produces lossless contour and line encoding. A lossy method for contour encoding is also presented. A set of experiments to compare the performance of traditional chain-code contour encoding with the improved contour encoding is presented. The results show a reduction of about 50% in the bit-rate with no reconstruction error.
The paper presents a teaching experience in using VHDL and CPLD in the senior digital design course. The course focuses on teaching the top-down design methodology through hands-on experiments. The industrially availa...
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The paper presents a teaching experience in using VHDL and CPLD in the senior digital design course. The course focuses on teaching the top-down design methodology through hands-on experiments. The industrially available tools-Maxplus2, made possible through Altera's University program, provide students with a smooth transition from academic concepts to industrial practice. VHDL, the industrial standard language (IEEE-1076), is used as the design entry. Thus the students are forced to learn the practical aspect of writing a synthesizable VHDL code. The hands-on weekly projects are exercised on the integrated CPLD design tool which has VHDL, compiler, logic synthesizer, functional and timing simulator, floor plan editor and programmer. With the help of programmable devices, students can bypass the timing period for IC fabrication and obtain ASIC designs after the devices have been programmed. The VHDL design entry in Maxplus2 is ideal for teaching top-down design methodology. Translating from a given algorithmic state machine (ASM) chart to a synthesizable and efficient VHDL code is presented. Exploiting the VHDL constructs to make a design reusable is demonstrated through examples. In this course, students learn how to partition a complex design into small components and focus on higher level of abstraction and hierarchy in design description which have become desirable to digital systems designers.
A new public key cryptosystem is proposed, together with signature capabilities. This system based on the invertibility of finite automata. The security of the system rests on the difficulty of finding inverse automat...
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A new public key cryptosystem is proposed, together with signature capabilities. This system based on the invertibility of finite automata. The security of the system rests on the difficulty of finding inverse automatas and of factoring matrix polynomial over Galois field GF(2).
In a large-scale parallel computing system the interconnection network is its key component. Partitionability of such a network is an important feature which allow multiple tasks to be run independently on different s...
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ISBN:
(纸本)081867623X
In a large-scale parallel computing system the interconnection network is its key component. Partitionability of such a network is an important feature which allow multiple tasks to be run independently on different subsystems. Partitionable networks also provide fault-tolerant ability by localizing and disabling the minimal faulty subsystem so the entire system can gracefully sustain the normal computation. A task run on a subsystem may need to be migrated to another subsystem if the subsystem is faulty, or load balance is needed, or subsystem restructuring desired. Siegel et al. (1990) discussed the migration problem for Omega-equivalent networks. This paper studies the partitionability and presents an optimal task migration algorithm for k-extra-stage Omega networks.
Proposes the modeling of recurring events as multi-point events by extending Vilain and Kautz's (1986) point algebra. We then propose an exact algorithm, based on van Beek's (1990) exact algorithm, for finding...
Proposes the modeling of recurring events as multi-point events by extending Vilain and Kautz's (1986) point algebra. We then propose an exact algorithm, based on van Beek's (1990) exact algorithm, for finding...
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Proposes the modeling of recurring events as multi-point events by extending Vilain and Kautz's (1986) point algebra. We then propose an exact algorithm, based on van Beek's (1990) exact algorithm, for finding feasible relations for multi-point event networks. The complexity of our method is compared with previously known results both for recurring and non-recurring events. We identify the special cases for which our multi-point based algorithm can find an exact solution. Finally, we summarise our paper with brief discussion on ongoing and future research.
The progress in understanding wafer-fused vertical-cavity lasers and improvements in fabrication techniques have led to the realization of the first room-temperature continuous-wave operating 1.54-/spl mu/m vertical-c...
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The progress in understanding wafer-fused vertical-cavity lasers and improvements in fabrication techniques have led to the realization of the first room-temperature continuous-wave operating 1.54-/spl mu/m vertical-cavity lasers. By demonstrating continuous-wave operation at room temperature using vertical-cavity lasers fabricated by two wafer fusion steps, we have shown that wafer fusion is a viable technique. The lasers comprise strain compensated InGaAsP quantum-well active layers sandwiched between two AlGaAs/GaAs quarter-wave mirrors. Characteristics discussed include cavity losses, the gain-current density relationship, and voltage-current characteristics.
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