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Australian Communications Theory Workshop (AusCTW)

作者： Yi Hong Ezio Biglieri Department of Electrical and Computer System Engineering Monash University Clayton VIC Australia Departament TIC Universitat Pompeu Fabra Barcelona Spain

We design a family of fast-decodable, rate-unbalanced space-time block codes (STBCs) for 4 × 2 multiple-input multiple-output (MIMO) transmission. These codes are generated by combining Alamouti and Silver codes into two layers. Their low-complexity decoder does MMSE successive interference cancellation (SIC) and sphere decoding. As shown by computer simulation, the proposed codes exhibit a better performance than equivalent diversity-embedded and groupwise STBCs, and yet have an intermediate decoding complexity.

关键词： Complexity theory Bit error rate Maximum likelihood decoding MIMO Joints Silver

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A new FFT concept for efficient VLSI implementation: Part II - Parallel Pipelined Processing

A new FFT concept for efficient VLSI implementation: Part II...

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International Conference on Digital Signal Processing (DSP)

作者： Marwan A. Jaber Daniel Massicotte Electrical and Computer Engineering Department Laboratory of Signal and System Integrations (LSSI) Université du Québec à Trois Rivières Canada

The success of computational science to accurately describe and model the real world has helped to fuel the ever increasing demand for cheap computing power. This paper presents a solution to the FFT's parallel multiprocessing problem, and involves novel concepts wherein the realization of parallel pipelines and multistage parallel pipelines are possible. The problem resides in defining the mathematical model of the socalled combination phase, in which the concept of representing the discrete Fourier transform (DFT) in terms of its partial DFTs should be well structured to obtain the right mathematical model. The resulting implementation in which r parallel processors operate simultaneously within a single instruction reduces the number of communications phases and the no-operation states (NOP) to their minimum values. The two papers, Part I and II, Butterfly processing element and Parallel pipelined processing, provide a new FFT concept for efficient VLSI implementation.

关键词： Very large scale integration Pipelines Discrete Fourier transforms Concurrent computing Flexible printed circuits Mathematical model Power engineering computing Digital signal processing Signal processing algorithms Power engineering and energy

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Modeling of Fuzzy Logic Control system for Controlling Homogeneity of Light Intensity from Light Emitting Diode

Modeling of Fuzzy Logic Control System for Controlling Homog...

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International Conference on Intelligent systems, Modelling and Simulation (ISMS)

作者： Muhammad Gary Shafer Edi Saputra Kamalrulnizam Abu Bakar Farah Ramadhani Universiti Teknologi Malaysia Faculty of Computer Science and Information System Johor Malaysia Andalas University Department of Electrical Engineering Padang Indonesia

The use of Light Emitting Diode (LED) as the lighting device becomes popular due to its energy-efficient characteristic. However, LED has radiation angle that is relatively smaller than other types of lighting device. This results in heterogeneity of light intensity that received by particular point near the LED. To obtain homogeneity of light intensity, this paper proposes a model of fuzzy logic control system to control illumination of LEDs lamp in a room. This model involves several components, namely LEDs lamp, LED driver, illumination sensor, microcontroller, and a differential transceiver RS-485. The fuzzy logic control system that used in this model uses error of illumination and delta error of illumination as input parameter. As output, this control system will change duty cycle of Pulse Width Modulation (PWM) that used to control illumination of LEDs lamp. Based on experiment result, when expected light intensity is set to 150 Lux, homogeneity of light intensity can be achieved with error less than 2%. In addition, the control system also can reduce energy consumption up to 40% under the experimental environment.

关键词： Control systems LED lamps Fuzzy logic Pulse width modulation Process control

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Advancing Hardware Implementation of Hyperdimensional Computing for Edge Intelligence

Advancing Hardware Implementation of Hyperdimensional Comput...

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IEEE International Conference on Artificial Intelligence Circuits and systems (AICAS)

作者： Eman Hassan Meriem Bettayeb Baker Mohammad Electrical Engineering and Computer Science Department System on Chip Lab Khalifa University of Science and Technology Abu Dhabi United Arab Emirates

ISBN: (数字)9798350383638

ISBN: (纸本)9798350383645

Hyperdimensional Computing (HDC) is a promising paradigm known for its energy efficiency and simplicity. Human brain functions inspire HDC, which operates in high-dimensional spaces with low-precision data, making it suitable for efficient machine-learning applications. This paper analyzes the State-of-the-Art (SOTA) significance and challenges of implementing HDC on diverse hardware platforms, including Application Specific Integrated Circuits (ASIC), Central Processing Units (CPU), and Field-Programmable Gate Arrays (FPGA), and explores its potential in In-Memory Computing (IMC). Also, the significance of hardware-accelerated Associative Memory (AM) in HDC systems is discussed, emphasizing its role in optimizing overall performance and efficiency.

关键词： Application specific integrated circuits Associative memory Circuits and systems Machine learning In-memory computing Hardware Energy efficiency

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Topology identification in distribution networks using harmonic synchrophasor measurements

arXiv

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arXiv 2020年

作者： Chen, Lei Farajollahi, Mohammad Ghamkhari, Mahdi Zhao, Wei Huang, Songling Mohsenian-Rad, Hamed State Key Lab. of Power System Department of Electrical Engineering Tsinghua University Beijing100084 China Department of Electrical and Computer Engineering University of California RiversideCA United States Electrical and Computer Engineering Department University of Louisiana at Lafayette LafayetteLA United States

Topology identification (TI) in distribution networks is a challenging task due to the limited measurement resources and therefore the inevitable need to use pseudo-measurements that are often inaccurate. To address this issue, a new method is proposed in this paper to integrate harmonic synchrophasors into the TI problem in order to enhance TI accuracy in distribution networks. In this method, topology identification is done jointly based on both fundamental synchrophasor measurements and harmonic synchrophasor measurements. This is done by formulating and then solving a mixed-integer linear programming (MILP) problem. Furthermore, an analysis is provided to capture the number of and the location of harmonic sources and sensors that are needed to ensure full observability. The benefits of the proposed TI scheme are compared against those of the traditional scheme that utilizes only the fundamental measurements. Finally, through numerical simulations on the IEEE 33-Bus power system, it is shown that the proposed scheme is considerably accurate compared to the traditional scheme in topology identification. Copyright © 2020, The Authors. All rights reserved.

关键词： Phasor measurement units

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FIR filter design on Flexible Engine/Generic ALU array and its dedicated synthesis algorithm

FIR filter design on Flexible Engine/Generic ALU array and i...

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IEEE Asia-Pacific Conference on Circuits and systems

作者： Ryo Tamura Masayuki Honma Nozomu Togawa Masao Yanagisawa Tatsuo Ohtsuki Makoto Satoh Department of Computer Science and Engineering Waseda University Shinjuku Tokyo Japan System Development Laboratory Hitachi and Limited Kawasaki Kanagawa Japan

Reconfigurable processors are those whose contexts are dynamically reconfigured while they are working. We focus on a reconfigurable processor called FE-GA (Flexible Engine/Generic ALU array) for digital media processing. Currently, FE-GA does not have its dedicated behavior synthesis tool. In this paper, we design FIR filters and propose an algorithm to map them onto it automatically. For given an order and coefficients of an FIR filter, the algorithm generates a dedicated assembly code which represents a given FIR filter for FE-GA. Then an editor called FEEditor reads the generated assembly code and implements its corresponding FIR filter on FE-GA. The proposed algorithm achieves automatic mapping of FIR filters of all orders within the range of the specification of FE-GA architecture. Furthermore, it is proved that a minimum cycle is achieved to execute FIR filtering if there is no thread switching.

关键词： Finite impulse response filter Algorithm design and analysis Assembly Search engines Field programmable gate arrays Circuit synthesis Filtering Yarn Network synthesis Logic arrays

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SpatialHD: Spatial Transformer Fused with Hyperdimensional Computing for AI Applications

SpatialHD: Spatial Transformer Fused with Hyperdimensional C...

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IEEE International Conference on Artificial Intelligence Circuits and systems (AICAS)

作者： Meriem Bettayeb Eman Hassan Baker Mohammad Hani Saleh Electrical Engineering and Computer Science Department System on Chip Lab Khalifa University of Science and Technology Abu Dhabi United Arab Emirates

Brain-inspired computing methods have shown remarkable efficiency and robustness compared to deep neural networks (DNN). In particular, HyperDimensional Computing (HDC) and Vision Transformer (ViT) have demonstrated promising achievements in facilitating effective and reliable cognitive learning. This paper proposes SpatialHD, the first framework that combines spatial transformer networks (STN) and HDC. First, SpatialHD exploits the STN, which explicitly allows the spatial manipulation of data within the network. Then, it employs HDC to operate over STN output by mapping feature maps into high-dimensional space, learning abstracted information, and classifying data. In addition, the STN output is resized to generate a smaller input feature map. This further reduces computing complexity and memory storage compared to HDC alone. Finally, to test the model’s functionality, we applied spatial HD for image classification, utilizing the MNIST and Fashion-MNIST datasets, using only 25% of the dataset for training. Our results show that SpatialHD improves accuracy by ≈ 8% and enhances efficiency by approximately 2.5x compared to base-HDC.

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Steady rollback and recovery policy based on integrity measurement

Steady rollback and recovery policy based on integrity measu...

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IEEE International Conference on Intelligent Computing and Intelligent systems (ICIS)

作者： Mingdi Xu Heng Zhao Junlin Li Huanguo Zhang System Software Department Wuhan Digital Engineering Research Institute Wuhan China School of Computer Wuhan University of China Wuhan China

As to distributed processing environment, the intractable problem is that process's current state is indeterminate, which could bring some security issues such as diffusing action. We put forward a checkpoint of integrity measurement (CPIM) arithmetic. The CPIM arithmetic could control process's state when process encounters an integrity measurement checkpoint, which would solve the problem that the running state of parallel software is indeterminate. The virtue of CPIM arithmetic is simple and low-cost. We also provide implementation scheme and prototype for evaluating overhead and performance.

关键词： Educational institutions

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A memory-logic separated 3D chip physical design method

A memory-logic separated 3D chip physical design method

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International Conference on Electronic Measurement and Instruments, ICEMI

作者： Zhang Shier Hou Ligang Ye Tongyang Wang Jinhui Peng Xiaohong VLSI & System Lab University of Technology Beijing China Department of Electrical and Computer Engineering North Dakota State University ND USA

3D IC is developing rapidly, but there is no mature physical design. A 3D chip physical design method contains hierarchical process, memory and TSV localization process, as well as hierarchical physical design process is proposed in this paper. By splitting the netlist, memory and logic are layered up and down. And the upper memories and TSV cells are placed automatically by implemented the localization algorithm. Each layer can be routed separately. It is concluded that this physical design method is feasible and the processes can be compatible in 2D EDA tools.

关键词： Through-silicon vias Three-dimensional displays Physical design Layout Tools Two dimensional displays

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A hybrid explainable ensemble transformer encoder for pneumonia identification from chest X-ray images

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Journal of Advanced Research 2023年 48卷 191-211页

作者： Ukwuoma, Chiagoziem C. Qin, Zhiguang Belal Bin Heyat, Md Akhtar, Faijan Bamisile, Olusola Muaad, Abdullah Y. Addo, Daniel Al-antari, Mugahed A. School of Information and Software Engineering University of Electronic Science and Technology of China Sichuan Chengdu China IoT Research Center College of Computer Science and Software Engineering Shenzhen University Guangdong Shenzhen 518060 China Centre for VLSI and Embedded System Technologies International Institute of Information Technology Telangana Hyderabad 500032 India Department of Science and Engineering Novel Global Community Educational Foundation Hebersham 2770 NSW Australia School of Computer Science and Engineering University of Electronic Science and Technology of China Sichuan Chengdu 611731 China Sichuan Industrial Internet Intelligent Monitoring and Application Engineering Technology Research Center Chengdu University of Technology Chengdu China Department of Studies in Computer Science University of Mysore Manasagangothri Mysore India Department of Artificial Intelligence College of Software & Convergence Technology Daeyang AI Center Sejong University Seoul 05006 South Korea

Introduction: Pneumonia is a microorganism infection that causes chronic inflammation of the human lung cells. Chest X-ray imaging is the most well-known screening approach used for detecting pneumonia in the early stages. While chest-Xray images are mostly blurry with low illumination, a strong feature extraction approach is required for promising identification performance. Objectives: A new hybrid explainable deep learning framework is proposed for accurate pneumonia disease identification using chest X-ray images. Methods: The proposed hybrid workflow is developed by fusing the capabilities of both ensemble convolutional networks and the Transformer Encoder mechanism. The ensemble learning backbone is used to extract strong features from the raw input X-ray images in two different scenarios: ensemble A (i.e., DenseNet201, VGG16, and GoogleNet) and ensemble B (i.e., DenseNet201, InceptionResNetV2, and Xception). Whereas, the Transformer Encoder is built based on the self-attention mechanism with multilayer perceptron (MLP) for accurate disease identification. The visual explainable saliency maps are derived to emphasize the crucial predicted regions on the input X-ray images. The end-to-end training process of the proposed deep learning models over all scenarios is performed for binary and multi-class classification scenarios. Results: The proposed hybrid deep learning model recorded 99.21% classification performance in terms of overall accuracy and F1-score for the binary classification task, while it achieved 98.19% accuracy and 97.29% F1-score for multi-classification task. For the ensemble binary identification scenario, ensemble A recorded 97.22% accuracy and 97.14% F1-score, while ensemble B achieved 96.44% for both accuracy and F1-score. For the ensemble multiclass identification scenario, ensemble A recorded 97.2% accuracy and 95.8% F1-score, while ensemble B recorded 96.4% accuracy and 94.9% F1-score. Conclusion: The proposed hybrid deep learning framewo

关键词： Chest X-ray imaging Explainable artificial intelligence (XAI) Pneumonia identification Self-attention network Transfer ensemble learning Transformer encoder (TE)

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