As the utilization of supercapacitors in power system applications continues to increase, it is important to observe their behavior under transient and long-term operations to understand their impact on power grids. A...
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Large Language Models (LLMs) have demonstrated promising capabilities in generating Verilog code from module specifications. To improve the quality of such generated Verilog codes, previous methods require either time...
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The aim of this work is to provide a high performance air quality simulation using the sulphur transport Eulerian model 2 (STEM-II) program. First of all we optimize the sequential program with the aim of increasing d...
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The aim of this work is to provide a high performance air quality simulation using the sulphur transport Eulerian model 2 (STEM-II) program. First of all we optimize the sequential program with the aim of increasing data locality. Then, the optimized program is parallelized using OpenMP shared-memory directives. Experimental results on a 32-processor SGI Origin 2000 show that the parallel program achieves important reductions in the execution times.
This paper presents a new algorithm for the detection of coarse-grain parallelism in loops with complex irregular computations. Loops are represented as directed acyclic graphs whose nodes are the strongly connected c...
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ISBN:
(纸本)3540440496
This paper presents a new algorithm for the detection of coarse-grain parallelism in loops with complex irregular computations. Loops are represented as directed acyclic graphs whose nodes are the strongly connected components (SCC) that appear in the Gated Single Assignment (GSA) program form, and whose edges are the use-def chains between pairs of SCCs. Loops that can be executed in parallel using run-time support are recognized at compile-time by performing a demand-driven analysis of the corresponding SCC graphs.. A prototype was implemented using the infrastructure provided by the Polaris parallelizing compiler. Encouraging experimental results for a suite of real irregular programs are shown.
Recent distributed systems are connected with high-performance networks, that make possible the use of a new level of memory hierarchy: network memory. Network memory provides both high bandwidth and low latency, that...
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Recent distributed systems are connected with high-performance networks, that make possible the use of a new level of memory hierarchy: network memory. Network memory provides both high bandwidth and low latency, that make it attractive for uses like paging and file caching. In this paper we explore the issues of building a reliable network memory system that is resilient to single workstation failures. We propose novel parity-based policies and evaluate their performance using trace-driven simulation of realistic applications. The presented performance results suggest that our proposed policies provide reliability at a surprisingly small run-time overhead.
In this paper, we propose a new heuristic for runtime task mapping of application(s) onto reconfigurable architectures. The heuristic is based on hardware configuration reuse, which tries to avoid the reconfiguration ...
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The up trend in the number of cores in cluster architectures underscores the need for scalable communication middleware on these systems. One of the strategies to take advantage of this increase in the available compu...
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High-level simulation and design space exploration nowadays are key ingredients for system-level design of modern multimedia embedded systems. The majority of the work in this area evaluates systems under a single, fi...
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The growing complexity in computer system hierarchies due to the increase in the number of cores per processor, levels of cache (some of them shared) and the number of processors per node, as well as the high-speed in...
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The need of task-adapted and complete information for the management of resources is a well known issue in Grid computing. Globus Toolkit 4 (GT4) includes the Monitoring and Discovery System component (MDS4) to carry ...
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