This paper considers nonlinear dynamical networks consisting of individually iISS (integral input-to-state stable) subsystems which are not necessarily ISS (input-to-state stable). Stability criteria for internal and ...
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ISBN:
(纸本)9781467320658
This paper considers nonlinear dynamical networks consisting of individually iISS (integral input-to-state stable) subsystems which are not necessarily ISS (input-to-state stable). Stability criteria for internal and external stability of the networks are developed in view of both necessity and sufficiency. For the sufficiency, we show how we can construct a Lyapunov function of the network explicitly under the assumption that a cyclic small-gain condition is satisfied. The cyclic small-gain condition is shown to be equivalent to a matrix-like condition. The two conditions and their equivalence precisely generalize some central ISS results in the literature. Moreover, the necessity of the matrix-like condition is established. The allowable number of non-ISS subsystems for stability of the network is discussed through several necessity conditions.
The target coverage is an important yet challenging problem in wireless sensor networks, especially when both coverage and energy constraints should be taken into account. Due to its nonlinear nature, previous studies...
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The target coverage is an important yet challenging problem in wireless sensor networks, especially when both coverage and energy constraints should be taken into account. Due to its nonlinear nature, previous studies of this problem have mainly focused on heuristic algorithms; the theoretical bound remains unknown. Moreover, the most popular method used in the previous literature, i.e., discretization of continuous time, has yet to be justified. This paper fills in these gaps with two theoretical results. The first one is a formal justification for the method. We use a simple example to illustrate the procedure of transforming a solution in time domain into a corresponding solution in the pattern domain with the same network lifetime and obtain two key observations. After that, we formally prove these two observations and use them as the basis to justify the method. The second result is an algorithm that can guarantee the network lifetime to be at least (1 - ε) of the optimal network lifetime, where ε can be made arbitrarily small depending on the required precision. The algorithm is based on the column generation (CG) theory, which decomposes the original problem into two sub-problems and iteratively solves them in a way that approaches the optimal solution. Moreover, we developed several constructive approaches to further optimize the algorithm. Numerical results verify the efficiency of our CG-based algorithm.
To achieve a higher data transmission rate, carrier aggregation (CA) technology has been included in the LTE Advanced standard. Allocating resources with CA is a crucial and challenging task due to the different types...
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ISBN:
(纸本)9781467358309
To achieve a higher data transmission rate, carrier aggregation (CA) technology has been included in the LTE Advanced standard. Allocating resources with CA is a crucial and challenging task due to the different types of user equipment (UE) that have different bandwidth capacities and operate under the same base station (BS). We have formulated the downlink resource allocation problem joining both carrier component (CC) allocation and resource block (RB) allocation to achieve proportional fairness in the long term. We also develop a maximum system utility (MSU) algorithm. Each time this algorithm tries to allocate the best CC to an narrow-band UE in which the number of CCs it is assigned does not exceed the number of CCs supported, maximizing the total utility until it can no longer grow. Importantly, NB UEs which can support more than one CCs are considered in this paper. Simulation results show that the proposed algorithm can significantly improve total throughput compared with the existing algorithm both with and without fairness consideration.
This paper presents a framework for high-level power estimation of multiprocessor systems-on-chip (MPSoC) architectures on FPGA. The technique is based on abstract execution profiles, called event signatures, and it o...
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This paper presents a framework for high-level power estimation of multiprocessor systems-on-chip (MPSoC) architectures on FPGA. The technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, e.g., commonly-used instruction-set simulator (ISS) based power estimation methods and should thus be capable of achieving good evaluation performance. As a consequence, the technique can be very useful in the context of early system-level design space exploration. We integrated the power estimation technique in a system-level MPSoC synthesis framework. Subsequently, using this framework, we designed a range of different candidate architectures which contain different numbers of Micro blaze processors and compared our power estimation results to those from real measurements on a Virtex-6 FPGA board.
In this paper, we present an approach for identity and access management (IAM) in the context of (cross-organizational) serviceoriented architectures (SOA). In particular, we defined a domainspecific language (DSL) fo...
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VMODEX is an interactive visualization tool to support system-level Design Space Exploration (DSE) of MPSoC architectures. It was initially developed to help designers to get insight into the search process of Multi-O...
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VMODEX is an interactive visualization tool to support system-level Design Space Exploration (DSE) of MPSoC architectures. It was initially developed to help designers to get insight into the search process of Multi-Objective Evolutionary Algorithms (MOEAs) that are typically used in the DSE process, and facilitates the analysis of the DSE results. In this paper, we extend VMODEX to help algorithm developers as well. Since there are many different MOEAs to search a design space and there is no conclusive answer regarding which algorithm is the best for a specific problem, finding the best optimization algorithm is a big challenge. However, using VMODEX, algorithm developers can easily evaluate and compare the results of different searching algorithms, for a given problem, with respect to their efficiency and effectiveness, in order to find the best optimization algorithm. Then, the best optimization results are delivered to the designers for analyzing the design space exploration process.
Specialising systems-on-Chip (SOCs) for a particular application is an effective way of increasing the performance achievable for a given level of energy consumption. In fact, silicon manufacture costs are low enough ...
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Directional antennas in wireless ad hoc networks (WANETs) offer great potential to reduce the radio interference, and improve the communication throughput. Using directional antennas, however, introduces a new problem...
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The increasing number of users demanding voice and data communication through cellular networks has driven the need for higher network throughput rates and lower latency. LTE femtocells address this pressing problem b...
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