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IEEE International Conference on Field-Programmable Technology (FPT)

作者： Kamana Sigdel Mark Thompson Carlo Galuzzi Andy D. Pimentel Koen Bertels Computer Engineering Group EEMCS Delft University of Technnology Netherlands Computer Systems Architecture Group University of Amsterdam Netherlands

As reconfigurable architectures are gaining an increasing research and industrial attention, there is a significant need for intelligent tools and methodologies to assist designers with exploration and performance evaluation of such architectures. Towards this goal, we make a first attempt to present a generic system-level modeling and simulation framework which can explore and evaluate reconfigurable systems at design-time as well as at runtime. In this paper, we show the methodology behind the framework and study its key features.

关键词： Reconfigurable architectures Runtime computer architecture Hardware Computational modeling Algorithm design and analysis Design methodology Field programmable gate arrays Application software Performance evaluation

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System-level MP-SoC design space exploration using tree visualization

System-level MP-SoC design space exploration using tree visu...

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Embedded systems for Real-Time Multimedia (ESTIMedia)

作者： Toktam Taghavi Andy D. Pimentel Mark Thompson Computer Systems Architecture Group Informatics Institute University of Amsterdam Amsterdam Netherlands

The complexity of today's embedded systems forces designers to model and simulate systems and their components to explore the wide range of design choices. Such design space exploration is especially needed during the early design stages, where the design space is at its largest. Due to the exponential design space in real problems, evaluating and comparing every single point in the design space is infeasible. Therefore, heuristic search techniques, such as Evolutionary Algorithms (EA), are often used to search the design space for optimum design points using only a finite number of design-point evaluations. Understanding how the design space was searched by such searching algorithms and providing insight into the ¿landscape¿ of the design space, may be of invaluable importance to the designer, To this end, this paper presents a novel interactive visualization application, based on tree visualization, to understand the search dynamics of an evolutionary algorithm and to visualize where the optimum design points are located in the design space.

关键词： Space exploration Algorithm design and analysis Evolutionary computation Data visualization Embedded system Context modeling Embedded computing computer architecture Informatics Computational modeling

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NPB-MPJ: NAS Parallel Benchmarks Implementation for Message-Passing in Java

NPB-MPJ: NAS Parallel Benchmarks Implementation for Message-...

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Euromicro Conference on Parallel, Distributed and Network-Based Processing

作者： Damián A. Mallón Guillermo L. Taboada Juan Touriño Ramón Doallo Computer Architecture Group Dept. of Electronics and Systems University of A Coruña A Coruña Spain

Java is a valuable and emerging alternative for the development of parallel applications, thanks to the availability of several Java message-passing libraries and its full multithreading support. The combination of both shared and distributed memory programming is an interesting option for parallel programming multi-core systems. However, the concerns about Java performance are hindering its adoption in this field, although it is difficult to evaluate accurately its performance due to the lack of standard benchmarks in Java. This paper presents NPB-MPJ, the first extensive implementation of the NAS Parallel Benchmarks (NPB), the standard parallel benchmark suite, for Message-Passing in Java (MPJ) libraries. Together with the design and implementation details of NPB-MPJ, this paper gathers several optimization techniques that can serve as a guide for the development of more efficient Java applications for High Performance Computing (HPC). NPB-MPJ has been used in the performance evaluation of Java against C/Fortran parallel libraries on two representative multi-core clusters. Thus, NPB-MPJ provides an up-to-date snapshot of MPJ performance, whose comparative analysis of current Java and native parallel solutions confirms that MPJ is an alternative for parallel programming multi-core systems.

关键词： Java Libraries Parallel programming Multithreading Design optimization Industrial training Scalability computer architecture Application software Availability

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System-level runtime mapping exploration of reconfigurable architectures

System-level runtime mapping exploration of reconfigurable a...

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International Symposium on Parallel and Distributed Processing (IPDPS)

作者： Kamana Sigdel Mark Thompson Andy D. Pimentel Carlo Galuzzi Koen Bertels Computer Engineering Laboratory Delft University of Technology The Netherlands Computer Systems Architecture Group University of Amsterdam The Netherlands

Dynamic reconfigurable systems can evolve under various conditions due to changes imposed either by the architecture, or by the applications, or by the environment. In such systems, the design process becomes more sophisticated as all the design decisions have to be optimized in terms of runtime behaviors and values. Runtime mapping exploration allows to explore reconfigurable systems at runtime to optimize task mappings in order to adapt to the changing behavior of the application(s), the architecture, or the environment. Performing such explorations at runtime enables a system to be more efficient in terms of various design constraints such as performance, chip area, power consumption, etc. Towards this goal, in this paper, we present a model that facilitates runtime mapping exploration of reconfigurable architectures. A case study of an MJPEG application shows that the presented model can be used to perform runtime exploration of various functional and non-functional design parameters.

关键词： Reconfigurable architectures Runtime environment computer architecture Process design Design optimization Energy consumption Power system modeling Embedded system Hardware Embedded computing

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Improving Task-driven Software Development Approaches for Creating Service-Based Interactive Applications by Using Annotated Web Services

Improving Task-driven Software Development Approaches for Cr...

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International Conference on Next Generation Web Services Practices (NWeSP)

作者： Marius Feldmann Gerald Hubsch Thomas Springer Alexander Schill Department of Computer Science Institute of Systems Architecture Computer Networks Group Technische Universität Dresden Dresden Germany

The aspect of human interaction becomes more and more relevant for service-oriented applications. On one hand, current development approaches support the composition of services but neglect the creation of user interfaces. On the other hand, task-based modeling of user interactions is well established but poorly integrated into service-oriented development. In this paper we propose an integrated modelling approach for the task-driven development of interactive service-oriented applications. Our central concept is the introduction of annotations as part of the Web service description. These annotations cover information relevant for the semi-automatic generation of task models and user interfaces. We present the annotation concept as well as concepts for the integration of the annotations into a task-driven software development methodology.

关键词： Programming Application software Web services Logic User interfaces Skeleton Inference mechanisms Next generation networking computer science computer architecture

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Closed-form inverse kinematics for continuum manipulators

Closed-form inverse kinematics for continuum manipulators

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作者： Neppalli, Srinivas Csencsits, Matthew A. Jones, Bryan A. Walker, Ian D. Systems Architecture Group Western Digital Lake Forest CA 92630 United States Department of Electrical and Computer Engineering Clemson University Clemson SC 29634 United States Department of Electrical and Computer Engineering Mississippi State University Mississippi State MS 39762 United States

This paper presents a novel, analytical approach to solving inverse kinematics for multi-section continuum robots, defined as robots composed of a continuously bendable backbone. The problem is decomposed into several simpler subproblems. First, this paper presents a solution to the inverse kinematics problem for a single-section trunk. Assuming endpoints for all sections of a multi-section trunk are known, this paper then details applying single-section inverse kinematics to each section of the multi-section trunk by compensating for the resulting changes in orientation. Finally, an approach which computes per-section endpoints given only a final-section endpoint provides a complete solution to the multi-section inverse kinematics problem. The results of implementing these algorithms in simulation and on a prototype continuum robot are presented and possible applications discussed. © Koninklijke Brill NV, Leiden and The Robotics Society of Japan, 2009.

关键词： Inverse kinematics

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On the Influence of Thread Allocation for Irregular Codes in NUMA systems

On the Influence of Thread Allocation for Irregular Codes in...

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IEEE International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT)

作者： Juan A. Lorenzo Francisco F. Rivera Peter Tuma Juan C. Pichel Computer Architecture Group Electronics and Computer Science Department University of Santiago de Compostela Spain Distributed Systems Research Group Department of Software Engineering Charles University Prague Czech Republic Galicia Supercomputing Centre Santiago de Compostela Spain

This work presents a study undertaken to characterise the FINISTERRAE supercomputer, one of the biggest NUMA systems in Europe. The main objective was to determine the performance effect of bus contention and cache coherency as well as the suitability of porting strategies regarding irregular codes in such a complex architecture. Results show that: (1) cores which share a socket can be considered as independent processors in this context; (2) for big data sizes, the effect of sharing a bus degrades the final performance but masks the cache coherency effects; (3) the NUMA factor (remote to local memory latency ratio) is an important factor on irregular codes and (4) the default kernel allocation policy is not optimal in this system. These results allow us to understand the behaviour of thread-to-core mappings and memory allocation policies.

关键词： Yarn Supercomputers Delay Europe Sockets Kernel Sparse matrices Distributed computing Application software computer architecture

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A service-oriented approach for increasing flexibility in manufacturing

A service-oriented approach for increasing flexibility in ma...

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IEEE International Workshop on Factory Communication systems (WFCS)

作者： Christin Groba Iris Braun Thomas Springer Martin Wollschlaeger Institute for Systems Architecture Computer Networks Group Technische Universität Germany Institute for Applied Computer Science Industrial Communications Group Technische Universität Germany

Manufacturing environments are characterized by a multitude of heterogeneous devices, networks, specific protocols and applications. Therefore, static structures, close coupling and vendor-specific solutions have been established over decades. To increase flexibility and interoperability we introduce a service-oriented middleware approach in form of an integration layer between shop-floor equipment and enterprise applications. The integration layer addresses the actual capabilities and data flows on the field and control layer individually. It offers core services that are applicable in several manufacturing domains. We describe a detailed case study to discuss pros and cons of a SOA approach in manufacturing systems and to show the feasibility of our approach.

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Editorial: Dependability and security

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IEEE Transactions on Dependable and Secure Computing 2008年第1期5卷 1-3页

作者： Iyer, Ravishankar K. Gligor, Virgil D. Kalbarczyk, Zbigniew T. Kanoun, Karama Katzenbeisser, Stefan Mukherjee, Shubu Shieh, Shiuhpyng Zorian, Yervant Department of Electrical and Computer Engineering Carnegie Mellon University Microsoft's Trusted Computing Academic Advisory Board Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana-Champaign United States IEEE IEEE Computer Society LAAS CNRS IFIP Working Group 10.4 on Dependable Computing and Fault Tolerance Special Interest Group on Dependability Benchmarking IFIP Working Group 10.4 French SEE Technical Committee on Trustworthy Computer Systems SEE Working Group Design and Validation for Dependability Technical University Munich Germany Darmstadt University of Technology ACM IACR Intel's SER Tech Council Intel's Architecture Patent Committee Taiwan Information Security Center NCTU IEEE Reliability Society Taipei and Tainan IACR United States Virage Logic Corp. AT and T Bell Laboratories Logic Vision Inc. University of British Columbia IEEE Test Technology Technical Council

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Scheduling of dataflow models within the Reconfigurable Video Coding framework

Scheduling of dataflow models within the Reconfigurable Vide...

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IEEE Workshop on Signal Processing systems (SIPS)

作者： Jani Boutellier Veeranjaneyulu Sadhanala Christophe Lucarz Philip Brisk Marco Mattavelli Machine Vision Group University of Oulu Finland Department of Computer Science and Engineering IIT Bombay India Microelectronic Systems Laboratory Switzerland Processor Architecture Laboratory École Polytechnique Fédérale de Lausanne Switzerland

The upcoming reconfigurable video coding (RVC) standard from MPEG (ISO/IEC SC29WG11) defines a library of coding tools to specify existing or new compressed video formats and decoders. The coding tool library has been written in a dataflow/actor-oriented language named CAL. Each coding tool can be represented with an extended finite state machine and the dependencies between the tools are described as dataflow graphs. This paper proposes an approach to derive a multiprocessor execution schedule for RVC systems that are comprised of CAL actors. In addition to proposing a scheduling approach for RVC, an extension to the well-known permutation flow shop scheduling problem that enables rapid run-time scheduling of RVC tasks is introduced.

关键词： Video coding Job shop scheduling IEC standards ISO standards Libraries Transform coding Video compression Decoding Automata Runtime

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