In view of the complexity of the flux density harmonic components of bilateral-excitation flux modulation (BFM) machines, it is not easy to analyze the role of air-gap flux density harmonics on the electromagnetic tor...
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ISBN:
(数字)9798350362213
ISBN:
(纸本)9798350362220
In view of the complexity of the flux density harmonic components of bilateral-excitation flux modulation (BFM) machines, it is not easy to analyze the role of air-gap flux density harmonics on the electromagnetic torque of BFM machines. In this digest, Taking the novel asymmetric stator tooth (AST) BFM machine as the research object, the flux modulation phenomena of the PM magneto motive-force (MMF) and armature winding MMF are analyzed in detail. Meanwhile, based on the air-gap field modulation theory and Maxwell stress tensor equation, the contribution of air-gap flux density harmonics to the electromagnetic torque of the BFM machine is obtained.
Bus-clamping Pulse Width Modulation (PWM) is an effective method to reduce the switching loss in a three-phase voltage source inverter (VSI). In bus-clamping PWM scheme, the phase legs are switched using high frequenc...
Bus-clamping Pulse Width Modulation (PWM) is an effective method to reduce the switching loss in a three-phase voltage source inverter (VSI). In bus-clamping PWM scheme, the phase legs are switched using high frequency PWM signals for two-third of the line cycle, while for the remaining duration of cycle, the pole voltage is clamped to either positive or negative rail of the DC bus. In PWM operation of a half bridge, a dead-time is applied between the gate signals of complementary switches to ensure safe and reliable operation. However, introduction of dead-time leads to poor power quality, increased Total Harmonic Distortion (THD) and variation in actual voltage compared to the intended pole voltage. Moreover, when the bus-clamping technique is used, the PWM has both high frequency switching region and clamped region in a line cycle, and consequently, the undesired effects of dead-time are further aggravated. Therefore, in order to enhance the quality of output voltage, this paper presents a dead-time compensation strategy for a VSI operating with bus-clamping PWM. The proposed method calculates the required compensation term to be added on the modulation signal considering wide range of operating conditions. Additionally, the compensation includes a new strategy for low current conditions near zero-crossing to avoid distortion. The proposed method is verified by simulation and experiments in a three-phase VSI with a switching frequency of 100 kHz and a fundamental frequency of 60Hz.
This paper is concerned with the problem of disturbance propagation in interconnected systems with double-integrator open-loop dynamics (e.g. acceleration-controlled automated vehicles). We consider a symmetric bidire...
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ISBN:
(数字)9798350382655
ISBN:
(纸本)9798350382662
This paper is concerned with the problem of disturbance propagation in interconnected systems with double-integrator open-loop dynamics (e.g. acceleration-controlled automated vehicles). We consider a symmetric bidirectional linear interconnection to control the vehicles, in which each vehicle is interconnected solely to one immediate predecessor and to one immediate follower with the same control gain in these two directions. We prove that in this setting, regardless of the choice of stabilizing controller, it is not possible to keep the displacements between the vehicles bounded, and they grow unbounded depending on the number of vehicles N. In this case, we call the system string unstable. We show that this impossibility of achieving string stability remains under various boundary conditions for the leading vehicle, i.e., whether this is a virtual or physical vehicle.
An important challenge for smart grid security is designing a secure and robust smart grid communications architecture to protect against cyber-threats, such as Denial-of-Service (DoS) attacks, that can adversely impa...
An important challenge for smart grid security is designing a secure and robust smart grid communications architecture to protect against cyber-threats, such as Denial-of-Service (DoS) attacks, that can adversely impact the operation of the power grid. Researchers have proposed using Software Defined Network frameworks to enhance cybersecurity of the smart grid, but there is a lack of benchmarking and comparative analyses among the many techniques. In this work, a distributed three-controller software-defined networking (D3-SDN) architecture, benchmarking, and comparative analysis with other techniques is presented. The selected distributed flat SDN architecture divides the network horizontally into multiple areas or clusters, where each cluster is handled by a single Open Network Operating System (ONOS) controller. A case study using the IEEE 118-bus system is provided to compare the performance of the presented ONOS-managed D3-SDN, against the POX controller. In addition, the proposed architecture outperforms a single SDN controller framework by a tenfold increase in throughput; a reduction in latency of > 20%; and an increase in throughput of approximately 11% during the DoS attack scenarios.
This paper presents control system design, implementation, and experimental validation of a single-stage 400 W, 200 kHz solar photovoltaic (PV) microinverter using hardware-in-the-loop (HIL) and hardware testing. The ...
This paper presents control system design, implementation, and experimental validation of a single-stage 400 W, 200 kHz solar photovoltaic (PV) microinverter using hardware-in-the-loop (HIL) and hardware testing. The selected circuit topology is based on a Gallium Nitride (GaN) direct-matrix based dual active bridge (DAB) converter with a low voltage active power decoupler (APD) circuit. Control performance is verified, smart-grid compatibility is tested, and circuit operation is confirmed. Controller HIL (CHIL) is shown to aid in a complex power electronics system design by 1) enabling detailed control development prior to hardware implementation, 2) expanding the use of automated testing, and 3) increasing confidence in control performance prior to prototype testing. Altogether, these factors make HIL a valuable tool in complex power electronic designs.
In this work, a low-complexity hybrid scheme is presented for a wireless network assisted by a reconfigurable intelligent surface (RIS), where channel estimation is required for only a subset of the elements. Specific...
In this work, a low-complexity hybrid scheme is presented for a wireless network assisted by a reconfigurable intelligent surface (RIS), where channel estimation is required for only a subset of the elements. Specifically, in order to reduce the channel training overhead and boost the performance of the RIS-aided network, the RIS is partitioned in two sub-surfaces, which are sequentially activated to assist the communication. The elements of the first sub-surface align their phase shifts, based on the acquired channel state information (CSI) from a channel training period, whereas the elements of the second sub-surface randomly rotate the phase of the incident signals. The performance of the proposed scheme is investigated under the effect of imperfect CSI acquisition at the RIS. Analytical expressions for the outage probability are derived and useful insights on the optimal configuration of the RIS are provided. We show that, by optimizing the number of elements that need to be estimated, the proposed scheme provides significant performance gains and overcomes the limitations caused by the imperfect CSI acquisition.
The reduction of the environmental impact in the building sector is necessary in achieving global sustainability. In this context, Building Automation and Control systems provide the opportunity for efficient monitori...
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The increasing demand for sensing, collecting, transmitting, and processing vast amounts of data poses significant challenges for resource-constrained mobile users, thereby impacting the performance of wireless networ...
A constrained Voronoi tree-based domain decomposition method for high-dimensional Bayesian optimization is proposed to solve large scale analog circuit synthesis problems, which can be formulated as high-dimensional h...
ISBN:
(纸本)9798350323481
A constrained Voronoi tree-based domain decomposition method for high-dimensional Bayesian optimization is proposed to solve large scale analog circuit synthesis problems, which can be formulated as high-dimensional heterogeneous black-box optimization. Hierarchical Voronoi tree progressively breaks down the design space into partitions with implicit performance boundaries such that promising regions are efficiently explored. Fast exploitation is ensured in Voronoi nest via local Bayesian optimization with a few observations. A slice-enhanced Gibbs sampling method is proposed to sample acquisition function cMES in irregular polyhedrons with design constraints. Compared with state-of-the-art methods, cVTS achieves significant speed up without loss of accuracy.
We address the security of a network of Connected and Automated Vehicles (CAVs) cooperating to navigate through a conflict area. Adversarial attacks such as Sybil attacks can cause safety violations resulting in colli...
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