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作者： Robert Cichorowski Olga Kocikowska Marek Bajtoš Roman Radil Ladislav Janoušek Daria Gendosz De Carrillo Sebastian Student Faculty of Automatic Control Electronics and Computer Science Silesian University of Technology liwice Poland Department of Engineering and Systems Biology Faculty of Automatic Control Electronics and Computer Science Gliwice Poland Department of Physiology Faculty of Medical Sciences Silesian University of Medicine Katowice Poland Department of Electromagnetic and Biomedical Engineering Faculty of Electrical Engineering and Informational Technology Žilina Slovakia Department of Histology Faculty of Medical Sciences in Zabrze Silesian University of Medicine Zabrze Poland Biotechnology Center Silesian University of Technology Gliwice Poland

ISBN: (数字)9798350372359

ISBN: (纸本)9798350372366

This work presents the results of the examination of the HeLa cell line exposure on the ELF-EMF (extremely low-frequency electromagnetic field). In particular, the relationship between ELF-EMF exposition time and cell death. The examination of cell death hallmarks were examined by estimation levels of selected proteins - FACL4 (a protein that is a part of the ferroptosis pathway) and CK18 (Cytokeratin related to necrosis and apoptosis pathways) in the proposed model of workers exposed to ELF-EMF week.

关键词： Proteins Biological system modeling Estimation Electromagnetic fields

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Energy Efficient Hardware Acceleration of Neural Networks with Power-of-Two Quantisation

arXiv

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arXiv 2022年

作者： Przewlocka-Rus, Dominika Kryjak, Tomasz Embedded Vision Systems Group Computer Vision Laboratory Department of Automatic Control and Robotics AGH University of Science and Technology Krakow Poland

Deep neural networks virtually dominate the domain of most modern vision systems, providing high performance at a cost of increased computational complexity. Since for those systems it is often required to operate both in real-time and with minimal energy consumption (e.g., for wearable devices or autonomous vehicles, edge Internet of Things (IoT), sensor networks), various network optimisation techniques are used, e.g., quantisation, pruning, or dedicated lightweight architectures. Due to the logarithmic distribution of weights in neural network layers, a method providing high performance with significant reduction in computational precision (for 4-bit weights and less) is the Power-of-Two (PoT) quantisation (and therefore also with a logarithmic distribution). This method introduces additional possibilities of replacing the typical for neural networks Multiply and ACcumulate (MAC – performing, e.g., convolution operations) units, with more energy-efficient Bitshift and ACcumulate (BAC). In this paper, we show that a hardware neural network accelerator with PoT weights implemented on the Zynq UltraScale + MPSoC ZCU104 SoC FPGA can be at least 1.4x more energy efficient than the uniform quantisation version. To further reduce the actual power requirement by omitting part of the computation for zero weights, we also propose a new pruning method adapted to logarithmic quantisation. © 2022, CC BY.

关键词： System-on-chip

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Awakened at CheckThat! 2022: Fake News Detection using BiLSTM and Sentence Transformer

Awakened at CheckThat! 2022: Fake News Detection using BiLST...

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2022 Conference and Labs of the Evaluation Forum, CLEF 2022

作者： Truică, Ciprian-Octavian Apostol, Elena-Simona Paschke, Adrian Department of Information Technology Uppsala University Lägerhyddsvägen 1 Uppsala75105 Sweden Computer Science and Engineering Department Faculty of Automatic Control and Computers University Politehnica of Bucharest Splaiul Independentei 313 Bucharest060042 Romania Fraunhofer Institute for Open Communication Systems Berlin10589 Germany

In recent years, online social networks and online news venues have become some of the main news and event-related information spreading mediums. Although using these mediums has facilitated the speed of accessing information, it also created a new phenomenon used for propaganda and disinformation: fake news. As fake news has detrimental consequences to society, new technologies need to be developed in order to stop their harmful effects. In this paper, we propose two Bidirectional Long Short-Term Memory (BiLSTM) architectures with sentence transformers to solve two tasks: (1) a multi-class mono-lingual fake news detection task (i.e., mono-lingual task);and (2) a multi-class cross-lingual fake news detection task (i.e., cross-lingual task). For the mono-lingual task, we train and test a BiLSTM with BART sentence transformers model on an English dataset and obtain an accuracy of ∼ 0.53 and an F1-Score of ∼ 0.32. For the cross-lingual task, we train a BiLSTM with XLM sentence transformers model on an English dataset and test the model using transfer learning on a German dataset. For this task, we obtain an accuracy of ∼ 0.28 and an F1-Score of ∼ 0.19. © 2022 Copyright for this paper by its authors.

关键词： Statistical tests

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Hardware-in-the-loop simulation of a UAV autonomous landing algorithm implemented in SoC FPGA

arXiv

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arXiv 2022年

作者： Szolc, Hubert Kryjak, Tomasz Embedded Vision Systems Group Computer Vision Laboratory Department of Automatic Control and Robotics AGH University of Science and Technology Krakow Poland

This paper presents a system for hardware-in-the-loop (HiL) simulation of unmanned aerial vehicle (UAV) control algorithms implemented on a heterogeneous SoC FPGA computing platforms. The AirSim simulator running on a PC and an Arty Z7 development board with a Zynq SoC chip from AMD Xilinx were used. Communication was carried out via a serial USB link. An application for autonomous landing on a specially marked landing strip was selected as a case study. A landing site detection algorithm was implemented on the Zynq SoC platform. This allowed processing a 1280 × 720 @ 60 fps video stream in real time. Performed tests showed that the system works correctly and there are no delays that could negatively affect the stability of the control. The proposed concept is characterised by relative simplicity and low implementation cost. At the same time, it can be applied to test various types of high-level perception and control algorithms for UAV implemented on embedded platforms. We provide the code developed on GitHub, which includes both Python scripts running on the PC and C code running on Arty Z7. © 2022, CC BY.

关键词： System-on-chip

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Roblets: Robotic Tablets That Self-Assemble and Self-Fold into a Robot

Roblets: Robotic Tablets That Self-Assemble and Self-Fold in...

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IEEE/RSJ International Conference on Intelligent Robots and systems (IROS)

作者： Junyi Han Daniela Rus Shuhei Miyashita Automatic Control and Systems Engineering Department University of Sheffield Sheffield UK Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology Cambridge MA USA Insigneo Institute for in silico Medicine

Inspired by human proteins that are synthesized from only 20 types of amino acids, the development of self-assembly methods that allow robots to be built simply by randomly stirring the parts has been explored for many years. The key challenges include how to synthesize parts in pieces into a three-dimensional functional structure in a practical time, and subsequently, achieve a controlled robotic motion, all with minimal human intervention. This study proposes a method of self-assembling a 3D robot by first self-assembling random parts into a 2D structure and then self-folding it into a 3D shape. Once self-folded, the robot, whose compositional parts contain magnets, becomes capable of performing basic tasks such as block-pushing upon an application of an external magnetic field. Self-assembly from parts into a two-dimensional structure was performed by repeatedly colliding the parts with each other, and combining them with complementary-shaped parts, like matching jigsaw puzzle pieces. Self-folding was performed by shrinking a heat-responsive film attached across the hinge of each assembly part in hot water, causing the entire 2D structure to self-fold. The experiment demonstrated a series of 13 parts self-assembling into the shape of a 3D beetle, then walking and pushing an object in 13 minutes. The self-assembly process is programmed (mechanically) to generate the same geometry even if the number of parts is greater than the necessary number for the structure, thus is capable of generating multiple structures simultaneously.

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Towards real-time and energy efficient Siamese tracking - a hardware-software approach

arXiv

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arXiv 2022年

Siamese trackers have been among the state-of-the-art solutions in each Visual Object Tracking (VOT) challenge over the past few years. However, with great accuracy comes great computational complexity: to achieve real-time processing, these trackers have to be massively parallelised and are usually run on high-end GPUs. Easy to implement, this approach is energy consuming, and thus cannot be used in many low-power applications. To overcome this, one can use energy-efficient embedded devices, such as heterogeneous platforms joining the ARM processor system with programmable logic (FPGA). In this work, we propose a hardware-software implementation of the well-known fully connected Siamese tracker (SiamFC). We have developed a quantised Siamese network for the FINN accelerator, using algorithm-accelerator co-design, and performed design space exploration to achieve the best efficiency-to-energy ratio (determined by FPS and used resources). For our network, running in the programmable logic part of the Zynq UltraScale+ MPSoC ZCU104, we achieved the processing of almost 50 frames-per-second with tracker accuracy on par with its floating point counterpart, as well as the original SiamFC network. The complete tracking system, implemented in ARM with the network accelerated on FPGA, achieves up to 17 fps. These results bring us towards bridging the gap between the highly accurate but energy-demanding algorithms and energy-efficient solutions ready to be used in low-power, edge systems. © 2022, CC BY.

关键词： Energy efficiency

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Energy Efficient Hardware Acceleration of Neural Networks with Power-of-Two Quantisation

TechRxiv

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TechRxiv 2022年

关键词： System-on-chip

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Privacy-Preservation for Distributed Quantized k-means Clustering

Privacy-Preservation for Distributed Quantized k-means Clust...

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Annual Allerton Conference on Communication, control, and Computing

作者： Apostolos I. Rikos Nicolas E. Manitara Gabriele Oliva Christoforos N. Hadjicostis Department of Electrical and Computer Engineering Division of Systems Engineering Boston University Boston MA USA Department of Electrical and Computer Engineering University of Cyprus Nicosia Cyprus Department of Engineering Unit of Automatic Control Università Campus Bio-Medico di Roma Rome Italy

In this paper, we enhance a distributed version of the well known k-means algorithm with privacy-preservation features. While ensuring that sensitive or confidential information remains undisclosed to unauthorized entities (in our case these entities are curious nodes within the network), we maintain the desirable features of the distributed algorithm: the transmitted values are quantized, which optimizes bandwidth utilization and alleviates communication bottlenecks, and nodes possess the ability to collectively determine when to terminate the algorithm, which enables the conservation of valuable resources. We introduce a novel privacy-preserving protocol that not only preserves the privacy of a node’s state, but it also ensures confidentiality about its cluster affiliation (i.e., it does not reveal to curious nodes whether a node participates in the update calculation for a specific centroid value). Moreover, we precisely characterize topological conditions that guarantee privacy preservation for individual nodes. Our distributed algorithm allows the formation of exclusive clusters within a finite time frame on any static and strongly connected directed graph.

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Towards real-time and energy efficient Siamese tracking - a hardware-software approach

TechRxiv

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TechRxiv 2022年

关键词： Field programmable gate arrays (FPGA)

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Playing cards and bidding calls detection for automatic registration of a duplicate bridge game

TechRxiv

引用

TechRxiv 2022年

作者： Wzorek, Piotr Kryjak, Tomasz Embedded Vision Systems Group Computer Vision Laboratory Department of Automatic Control and Robotics AGH University of Science and Technology Krakow Poland

In this work, the implementation of a playing cards and bidding calls detection system for the automatic registration of a duplicate bridge game is presented. For this purpose, two YOLOv4 deep convolutional neural networks were used. During the training process, which was carried out using an automatically generated dataset, we obtained a detector characterised by more than 99.9% accuracy on the test set. The prepared system has been evaluated on videos collected during bridge competitions and is characterised by high accuracy. The application has been implemented and evaluated on a CPU and an embedded GPU. © 2022, CC BY.

关键词： Deep neural networks

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