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检索条件"机构=Computer Technology and Programming"

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Optimizing neural network architecture using Tikhonov regularization parameter for intrusion detection systems and classification of attacks

Optimizing neural network architecture using Tikhonov regula...

引用

2008 International Conference on Information and Knowledge Engineering, IKE 2008

作者： Sharawi, Marwa S. Sammany, Mohammed El-Beltagy, Mohammed Saroit, Imane Faculty of Informatics and Computer Science British University in Egypt Cairo Egypt Department of Applied Mathematics and Programming Aleppo University Aleppo Syria Department of Decision Support System Faculty of Computers and Information Cairo University Cairo Egypt Department of Information Technology Faculty of Computers and Information Cairo University Cairo Egypt

ISBN: (纸本)1601320752

Network Intrusion Detection Systems (NIDS) require the ability to generalize from previously observed attacks to detect even new or slight variation records of known attacks. As an intrusion detection system can be regarded as classification problem, we use Artificial Neural networks for detection. Using a benchmark study and set from the KDD (Knowledge Data Discovery and Data Mining) competition designed by DARPA and Multi-layered perceptron neural network, this Paper will aim to solve a multi class problem using MLP in to distinguish the attack records from normal ones, and also identify the attack type. In addition, it shows how to use Tikhonov regularization parameter to optimize the optimal network architecture in order to increase the system performance. The results show that the designed system is capable of classifying records with 98.34% accuracy with two hidden layers of neuron. Finally, the performance of the benchmark study is compared with our results.

关键词： Intrusion detection

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Redundant optical data transmission using semiconductor lasers

Redundant optical data transmission using semiconductor lase...

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ACS/IEEE International Conference on computer Systems and Applications

作者： H. D. Wacker J. Borcsok H. Hillmer Development HIMA Paul Hildebrandt GmbH + Co KG Bruehl GERMANY Department of Electrical Engineering and Computer Science Chair for Computer Architecture and System Programming Kassel GERMANY University of Kassel Institute of Nanostructure Technologies and Analytics (INA) and Center for Interdisciplinary Nanostructure Science and Technology (CINSaT) Kassel GERMANY

This paper is dealing with redundant optoelectronic data transmission with special respect to laser channels. The concept of the generalized erasure channel (GEC) is used to determine the probability of undetected error for some binary symmetric and non-symmetric channels protected by appropriate codes. In detail, communication via different binary symmetric channels (BSCs), generalized erasure channels and symmetrized binary non symmetric channels (BNSCs) is investigated. Simple upper bounds are given, relating the new formulas to that one of the BSC Finally the results in connection with an inequality for proper codes are applied to multi wavelength optical transmission through channels generated by semiconductor lasers.

关键词： Data communication Semiconductor lasers Error probability Optical transmitters Protection Safety Wavelength division multiplexing Laser theory Upper bound Linear code

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On optimising shape-generic array programs using symbolic structural information

引用

18th International Symposium on Implementation and Application of Functional Languages, IFL 2006

作者： Trojahner, Kai Grelck, Clemens Scholz, Sven-Bodo University of Lübeck Institute of Software Technology and Programming Languages University of Hertfordshire Department of Computer Science

ISBN: (纸本)9783540741299

Shape-generic programming and high run time performance do match if generic source code is systematically specialised into nongeneric executable code. However, as soon as we drop the assumption of whole-world knowledge or refrain from specialisation for other reasons, compiled generic code is substantially less efficient. Limited effectiveness of code optimisation techniques due to the inherent lack of knowledge about the structural properties of arrays can be identified as the single most important source of inefficiency. However, in many cases partial structural information or structural relationships between arrays would actually suffice for optimisation. We propose symbolic array attributes as a uniform scheme to infer and to represent partial and relational structural information in shape-generic array code. By reusing the regular language to express structural properties in intermediate code, existing optimisations benefit from symbolic array attributes with little or no alteration. In fact, program optimisation and identification of structural properties cross-fertilise each other. We outline our approach in the context of the functional array language SAC and demonstrate its effectiveness by a small case study. © Springer-Verlag Berlin Heidelberg 2007.

关键词： Information analysis

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Mirages: Behavioral intercession in a mirror-based architecture

Mirages: Behavioral intercession in a mirror-based architect...

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2007 ACM SIGPLAN International Conference on Object-Oriented programming, Systems, Languages and Applications, OOPSLA - 2007 Dynamic Languages Symposium, DLS

作者： Mostinckx, Stijn Van Cutsem, Tom Timbermont, Stijn Tanter, Éric Programming Technology Lab. Vrije Universiteit Brussel Belgium Computer Science Dept. DCC/CWR University of Chile Chile

ISBN: (纸本)9781595938688

Mirror-based systems are object-oriented reflective architectures built around a set of design principles that lead to reflective APIs which foster a high degree of reusability, loose coupling with base-level objects and whose structure and design corresponds to the system being mirrored. However, support for behavioral intercession has been limited in contemporary mirror-based architectures, in spite of its many interesting applications. This is due to the fact that mirror-based architectures only support explicit reflection, while behavioral intercession requires implicit reflection. This work reconciles mirrors with behavioral intercession. We discuss the design of a mirror-based architecture with implicit mirrors that can be absorbed in the interpreter, and mirages, base objects whose semantics are defined by implicit mirrors. We describe and illustrate the integration of this reflective architecture for the distributed object-oriented programming language AmbientTalk. © 2007 ACM.

关键词： Mirrors

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Transactional programming in a multi-core environment 07

Transactional programming in a multi-core environment

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2007 ACM SIGPLAN Symposium on Principles and Practice of Parallel programming, PPoPP'07

作者： Adl-Tabatabai, Ali-Reza Kozyrakis, Christos Saha, Bratin Programming Systems Lab. Microprocessor Technology Lab. Intel Corporation Computer Systems Lab. Electrical Engineering Department Stanford University

ISBN: (纸本)1595936025

With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core products in the mainstream computing market. Moore's law will largely be used to increase HW thread-level parallelism through higher core counts in a CMP environment. CMPs bring new challenges into the design of the software system stack. In this tutorial, we talk about the shift to multi-core processors and the programming implications. In particular, we focus on transactional programming. Transactions have emerged as a promising alternative to lock-based synchronization that eliminates many of the problems associated with lock-based synchronization. We discuss the design of both hardware and software transactional memory and quantify the tradeoffs between the different design points. We show how to extend the Java and C languages with transactional constructs, and how to integrate transactions with compiler optimizations and the language runtime (e.g., memory manager and garbage collection).

关键词： computer programming

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Optics in computer architectures: Basis of WDM, technologies and potentials

Optics in computer architectures: Basis of WDM, technologies...

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2nd International Conference on Systems, ICONS 2007

作者： Wang, Y. Kusserrow, T. Irmer, S. Hasse, A. Bartels, M. Dharmarasu, N. Hillmer, H. Börcsök, J. Mikami, O. University of Kassel Kassel Germany Department of Computer Architecture and System Programming University of Kassel Germany Department of Information Telecommunication and Electronics School of Information Science and Technology Tokai University Hiratsuka-shi Japan

ISBN: (纸本)0769528074

We present novel concepts, technologies and potentials of optical data communication, especially for future computer architectures. The WDM (wavelength division multiplexing) and the optical wiring technologies are explained in detail. Experimental results of tunable optical filters, which play a major role in WDM systems, are reported. New concepts for novel optical interconnectors and novel miniaturized lasers for direct generation of green light are proposed as examples for possible next generation components to improve the performance of optical communication based computer architecture. © 2007 IEEE.

关键词： computer architecture

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Tranquility: A low disruptive alternative to quiescence for ensuring safe dynamic updates

Tranquility: A low disruptive alternative to quiescence for ...

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作者： Vandewoude, Yves Ebraert, Peter Berbers, Yolande D'Hondt, Theo Department of Computer Science Katholieke Universiteit Leuven Celestijnenlaan 200A 3001 Heverlee Belgium Programming Technology Lab. Vrije Universiteit Brussel Plainlaan 2 B1050 Brussels Belgium

This paper revisits a problem that was identified by Kramer and Magee: placing a system in a consistent state before and after runtime changes. We show that their notion of quiescence as a necessary and sufficient condition for safe runtime changes is too strict and results in a significant disruption in the application being updated. In this paper, we introduce a weaker condition: tranquility. We show that tranquility is easier to obtain and less disruptive for the running application but still a sufficient condition to ensure application consistency. We present an implementation of our approach on a component middleware platform and experimentally verify the validity and practical applicability of our approach using data retrieved from a case study. © 2007 IEEE.

关键词： Software design

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SAC: Off-the-shelf support for data-parallelism on multicores

SAC: Off-the-shelf support for data-parallelism on multicore...

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DAMP 2007: Workshop on Declarative Aspects of Multicore programming

作者： Grelck, Clemens Scholz, Sven-Bodo University of Lübeck Institute of Software Technology and Programming Languages Ratzeburger Allee 160 23538 Lübeck Germany University of Hertfordshire Department of Computer Science College Lane Hatfield AL10 9AB United Kingdom University of Hertfordshire United Kingdom

ISBN: (纸本)1595936904

The advent of multicore processors has raised new demand for harnessing concurrency in the software mass market. We summarise our previous work on the data parallel, functional array processing language SaC. Its compiler technology is geared towards highly runtime-efficient support for shared memory multiprocessors and, thus, is readily applicable to today's off-the-shelf multicore systems. Copyright 2007 ACM.

关键词： Automatic programming

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Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language 07

Code Generation and Optimization for Transactional Memory Co...

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International Symposium on Code Generation and Optimization (CGO)

作者： Cheng Wang Wei-Yu Chen Youfeng Wu Bratin Saha Ali-Reza Adl-Tabatabai Programming System Lab Microprocessor Technology Laboratories Intel Corporation Santa Clara CA USA Computer Science Division University of California Berkeley USA

ISBN: (纸本)9780769527642

Transactional memory offers significant advantages for concurrency control compared to locks. This paper presents the design and implementation of transactional memory constructs in an unmanaged language. Unmanaged languages pose a unique set of challenges to transactional memory constructs - for example, lack of type and memory safety, use of function pointers, aliasing of local variables, and others. This paper describes novel compiler and runtime mechanisms that address these challenges and optimize the performance of transactions in an unmanaged environment. We have implemented these mechanisms in a production-quality C compiler and a high-performance software transactional memory runtime. We measure the effectiveness of these optimizations and compare the performance of lock-based versus transaction-based programming on a set of concurrent data structures and the SPLASH-2 benchmark suite. On a 16 processor SMP system, the transaction-based version of the SPLASH-2 benchmarks scales much better than the coarse-grain locking version and performs comparably to the fine-grain locking version. Compiler optimizations significantly reduce the overheads of transactional memory so that, on a single thread, the transaction-based version incurs only about 6.4% overhead compared to the lock-based version for the SPLASH-2 benchmark suite. Thus, our system is the first to demonstrate that transactions integrate well with an unmanaged language, and can perform as well as fine-grain locking while providing the programming ease of coarse-grain locking even on an unmanaged environment

关键词： Yarn Safety Optimizing compilers Application software Environmental management Runtime environment Power engineering computing Concurrent computing Java Cloning

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Artificial Immune Based Support Vector Machine Algorithm for Fault Diagnosis of Induction Motors

Artificial Immune Based Support Vector Machine Algorithm for...

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2007 International Aegean Conference on Electrical Machines and Power Electronics, vol.2

作者： I. AYDIN M. KARAKOSE E. AKIN Computer Technology and Programming Education ProgramKemaliye H. A. AKIN Technical Vocational School of Higher Education Erzincan University Kemaliye Erzincan Turkey Computer Engineering Department Firat University Elazig Turkey

The use of induction motors is widespread in industry. Many researchers have studied the condition monitoring and detecting the faults of induction motors at an early stage. Early detection of motor faults results in fast unscheduled maintenance. In this study, a new artificial immune based support vector machine algorithm is proposed for fault diagnosis of induction motors. Support vector machines (SVMs) have become one of the most popular classification methods in soft computing, recently. However, classification accuracy depends on kernel and penalty parameters. Artificial immune system has abilities of learning, memory and self adaptive control. The kernel and penalizes parameters of support vector machine are tuned using artificial immune system. The training data of support vector machine are extracted from three phase motor current. The new feature vector is constructed based on park's vector approach. The phase space of this feature vector is constructed using nonlinear time series analysis. Broken rotor bar and stator short circuit faults are classified in combined phase space using support vector machines. The experimental data are taken from a three phase induction motor. One, two and three broken rotor bar faults and 10% short circuit of stator faults are detected successfully.

关键词： Support vector machines Artificial immune system Time series analysis Fault detection and diagnosis Induction motors Stator and broken rotor bar faults

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