检索结果-内蒙古大学图书馆

IEEE International Ultrasonics Symposium

作者： J. Y. Zhang W. J. Xu J. Carlier E. Moulin D. Remiens X. M. Ji Y. P. Huang S. M. Chen School of Computer National University of Defense Technology Changsha 410073 P. R. China Departement d'Opto-Acousto-Electronique IEMN UMR CNRS 8520 Universite de Valenciennes 59313 Valenciennes France ASIC and System State Key Lab Department of Microelectronics Fudan University Shanghai 200433 P. R. China

ISBN: (纸本)9781467345613

High-frequency ultrasonic array transducers are essential for high resolution imaging in clinical analysis and Non Destructive Evaluation (NDE). However, the fabrication of piezoelectric array transducers is a great challenge due to the small features in elaborating piezoelectric array films. This paper describes a MEMS based self-aligned mask-free process for fabrication of ZnO linear array transducers of more than 100MHz. A four-step-rotation deposition approach is proposed and investigated, that improves the lateral growth in ZnO array deposition. The ratio of vertical to lateral growth is improved by 40% compared to one-step deposition method. The results prove that the reduction of the lateral growth helps to achieve full-kerfed ZnO array with smaller pitch.

关键词： Fabrication process Transducers automatic calibration zinc oxides Nondestructive Testing arrays Microelectromechanical systems High frequency Lateral

来源：评论

学校读者我要写书评

暂无评论

Automated modeling of custom processors for DCT algorithm

Automated modeling of custom processors for DCT algorithm

引用

Proceedings of the International Convention MIPRO

作者： D. Ivošević V. Sruk Faculty of Electrical Engineering and Computing Department of Electronic Microelectronics Computer and Intelligent System University of Zagreb Croatia

The needs for automated digital system design rise with constant technology improvements and time-to-market shortening. High-level synthesis tools cope with this problem by raising the design specification to a higher level. We have implemented the methodology of custom processor automated modeling for DCT algorithm. This algorithm is often used in signal and image processing applications. At front end, the methodology assumes C code input specification as it is the case of many high-level synthesis tools. C programming language popularity offers the applicability for a broader spectrum of users. At back end, logic synthesis tools produce the FPGA implementation of the algorithm. The results are evaluated in terms of execution cycles required for completing the algorithm and processor's datapath components allocations, and compared to previous work.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Energy and thermal aware mapping for mesh-based NoC architectures using multi-objective ant colony algorithm

Energy and thermal aware mapping for mesh-based NoC architec...

引用

IEEE International Conference on computer Research and Development

作者： Liu, Yanhua Ruan, Ying Lai, Zongsheng Jing, Weiping Dept. of Electronic Computer and Software Systems Institute of Microelectronics Circuit and System East China Normal University Shanghai China Dept. of Electronic Engineering Jiangsu Provincial Key Lab. of ASIC Design Nantong University Nantong China

ISBN: (纸本)9781612848372

Where IP cores to be mapped must be carefully solved for any given application in order to optimize different performance metrics in Network-on-Chip (NoC) design flow. The optimization of different performance metrics simultaneously may cause a negative effect on each other because of the strong correlation between these performance metrics. In this paper, we propose a multi-objective ant colony algorithm (MOACA) that maps IP cores onto mesh-based NoC architectures. This algorithm is an efficient way to find the pareto-optimal front which optimizes energy consumption and hotspot temperature of NoC. The algorithm has been implemented and evaluated for synthetic generated benchmarks. Experimental results confirm the efficiency, accuracy and scalability of the algorithm. © 2011 IEEE.

关键词： Network-on-chip

来源：评论

学校读者我要写书评

暂无评论

An efficient shared memory based virtual communication system for embedded SMP cluster

An efficient shared memory based virtual communication syste...

引用

IEEE International Conference on Networking, Architecture and Storage

作者： Yin, Wenxuan Gao, Xiang Zhu, Xiaojing Guo, Deyuan Graduate University of Chinese Academy of Sciences Beijing China Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China Loongson Technology Corporation Limited Beijing China Institute of Microelectronics Tsinghua University Beijing China

ISBN: (纸本)9780769545097

With the prevalence of multi-core processors, it is a trend that the embedded cluster deploys SMP nodes to gain more computing power. As a crucial issue, the MPI interprocess communication has been suffering the contradiction between high performance and embedded constraints. Moreover, there is a big performance gap between intra- and inter-node communication for different infrastructures. In this paper, we design a virtual communication system called SMVN, which extends the shared memory mechanism typically used in intra-node case into the inter-node case. The SMVN utilizes the HT inter-chip interconnect interface in Godson-3A SMP nodes to build a mesh topology. It is Ethernet compatible by simulating bottom layers of TCP/IP protocol. With the design, the node interconnection can get rid of NICs, cables and switches. Furthermore, we exploit the zero-copy scheme and other optimizations to improve the performance. We port the MPICH2 library by socket channel and formulate its process allocation. The MPI latency and bandwidth tests show that the performance difference between two levels is small. The inter-node bandwidth is 27.3MB/s, which is more than twice the theoretical peak value of 100Mb Ethernet and reaches 84% of the intra-node performance. © 2011 IEEE.

关键词： Bandwidth

来源：评论

学校读者我要写书评

暂无评论

Resolving Degradation Mechanism in Carbon and Beryllium Doped HBT’s Using Pulsed Mode Current Stress

引用

MRS Online Proceedings Library 2011年第1期378卷 777-782页

作者： Y. C. Chou G. P. Li C. S. Wu Peter Chu C. K. Pao T. C. Cisco Department of Electrical and Computer Engineering University of California Irvine USA Microelectronics Division Hughes Aircraft Company Torrance USA Radar System Group El Segundo USA

The reliability of high performance carbon and beryllium-doped heterojunction bipolar transistors (HBT’s) is investigated using a pulsed mode current stress. After the current stress, the collector current reduction (measured at a fixed Vbe) and the inverted collector current ratio change (measured at two different reverse Vbe biases) are used as measures of HBT degradation due to dopant acceptors migration. For carbon and beryllium doped HBT’s, degradation was found to be only significant beyond a threshold current density (Jth), showing that the carbon doped devices have a higher Jth than that of the Be-doped HBT’s. Beyond the Jth, the device degradation is insensitive to the stress current density but depends on the total stress charge. As a result, the device degradation mechanisms of electric field assisted dopant and carrier recombination enhanced dopant migration can be distinguished under pulsed mode current stress.

关键词：

来源：评论

学校读者我要写书评

暂无评论

Actual tasks and trends in developing multidomain MEMS models for educational purposes

Actual tasks and trends in developing multidomain MEMS model...

引用

International Conference on Perspective Technologies and Methods in MEMS Design (MEMSTECH)

作者： Andrzej Napieralski Michal Szermer Mykhaylo Lobur Oleh Matviykiv Anatolii Petrenko Volodymyr Ladogubets Department of Microelectronics & Computer Science TUL Lodz Poland CAD Department LPNU Lviv Ukraine System Design Department NUKPI Kyiv Ukraine

In this paper the instructions for preparing camera ready paper for International Conference MEMSTECH 2011 are given.

关键词： Micromechanical devices Solid modeling Computational modeling Educational institutions Design automation Fabrication

来源：评论

学校读者我要写书评

暂无评论

Low power discrete voltage assignment under clock skew scheduling 11

Low power discrete voltage assignment under clock skew sched...

引用

Asia and South Pacific Design Automation Conference

作者： Li Li Jian Sun Yinghai Lu Hai Zhou Xuan Zeng Electrical Engineering and Computer Science Department Northwestern University USA State Key Laboratory of ASIC & System Microelectronics Department Fudan University China

ISBN: (纸本)9781424475162

Multiple Supply Voltage (MSV) assignment has emerged as an appealing technique in low power IC design, due to its flexibility in balancing power and performance. However, clock skew scheduling, which has great impact on criticality of combinational paths in sequential circuit, has not been explored in the merit of MSV assignment. In this paper, we propose a discrete voltage assignment algorithm for sequential circuit under clock scheduling. The sequential MSV assignment problem is first formulated as a convex cost dual network flow problem, which can be optimally solved in polynomial time assuming delay of each gate can be chosen in continuous domain. Then a mincut-based heuristic is designed to convert the unfeasible continuous solution into feasible discrete solution while largely preserving the global optimality. Besides, we revisit the hardness of the general discrete voltage assignment problem and point out some misunderstandings on the approximability of this problem in previous related work. Benchmark test for our algorithm shows 9.2% reduction in power consumption on average, in compared with combinational MSV assignment. Referring to the continuous solution obtained from network flow as the lower bound, the gap between our solution and the lower bound is only 1.77%.

关键词： Delay Clocks Logic gates Power demand Sequential circuits Scheduling

来源：评论

学校读者我要写书评

暂无评论

An Efficient Shared Memory Based Virtual Communication system for Embedded SMP Cluster

An Efficient Shared Memory Based Virtual Communication Syste...

引用

International Conference on Networking, Architecture, and Storage (NAS)

作者： Wenxuan Yin Xiang Gao Xiaojing Zhu Deyuan Guo Key Laboratory of Computer System and Architecture Institute of Computing Technology Chinese Academy and Sciences Beijing China Institute of Microelectronics Tsinghua University Beijing China

With the prevalence of multi-core processors, it is a trend that the embedded cluster deploys SMP nodes to gain more computing power. As a crucial issue, the MPI inter-process communication has been suffering the contradiction between high performance and embedded constraints. Moreover, there is a big performance gap between intra- and inter-node communication for different infrastructures. In this paper, we design a virtual communication system called SMVN, which extends the shared memory mechanism typically used in intra-node case into the inter-node case. The SMVN utilizes the HT inter-chip interconnect interface in Godson-3A SMP nodes to build a mesh topology. It is Ethernet compatible by simulating bottom layers of TCP/IP protocol. With the design, the node interconnection can get rid of NICs, cables and switches. Furthermore, we exploit the zero-copy scheme and other optimizations to improve the performance. We port the MPICH2 library by socket channel and formulate its process allocation. The MPI latency and bandwidth tests show that the performance difference between two levels is small. The inter-node bandwidth is 27.3 MB/s, which is more than twice the theoretical peak value of 100 Mb Ethernet and reaches 84% of the intra-node performance.

关键词： Program processors IP networks Protocols computer architecture Bandwidth Resource management Synchronization

来源：评论

学校读者我要写书评

暂无评论

Positive bias temperature instability degradation of InGaAs n-MOSFETs with Al2O3 gate dielectric

Positive bias temperature instability degradation of InGaAs ...

引用

International Electron Devices Meeting (IEDM)

作者： G. F. Jiao W. Cao Y. Xuan D. M. Huang P. D. Ye M. F. Li State Key Laboratory ASIC & System Department Microelectronics Fudan University Shanghai China School of Electrical and Computer Engineering and Birck Nanotechnology Center Purdue University West Lafayette IN USA

CP measurements show that PBTI stress induced interface trap area density ΔN it in InGaAs/Al 2 O 3 n-MOSFET is very small and has power law time evolution At 0.22 in the stress phase, and is partially recovered in the recovery phase. However the DC I s -V g measurements show large degradations of negative ΔV g and sub-threshold swing S in the sub-threshold region and are recovered in the recovery phase, also show degradation of positive ΔV g in the on-current region and continuing degradation in the recovery phase until reaching a stable state. The I s -V g degradation is mainly contributed by generation of near interface slow oxide traps under stress with recoverable donor trap energy density ΔD SOX DONOR in the InGaAs energy gap with a tail extended to the conduction band energy, and permanent acceptor trap energy density ΔD SOX ACCEPTOR in the conduction band energy with a tail extended to the energy gap. This trap model explains all experimental details perfectly.

关键词： Stress Degradation Stress measurement MOSFET circuits Electron traps Silicon Indium gallium arsenide

来源：评论

学校读者我要写书评

暂无评论

Actual tasks and trends in developing multidomain MEMS models for educational purposes

Actual tasks and trends in developing multidomain MEMS model...

引用

作者： Napieralski, Andrzej Szermer, Michal Lobur, Mykhaylo Matviykiv, Oleh Petrenko, Anatolii Ladogubets, Volodymyr Dept. of Microelectronics and Computer Science TUL Wolczanska Str. 221/223 Lodz 90-924 Poland CAD Department LPNU Mytropolyta Andreya Str. 5/323 Lviv Ukraine System Design Dept. NUKPI Panasa Myrnogo Str. 26/19 Kyiv 03056 Ukraine

ISBN: (纸本)9789662191196

关键词： Cameras

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：