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Midwest Symposium on Circuits and systems (MWSCAS)

作者： Hoda S Abdel-Aty-Zohdy Mostafa Hashem Sherif Adam Smiarowski Microelectronics System Design Lab Electrical and Computer Engineering Oakland University Rochester MI USA

Three alternative bio-inspired approaches are proposed to investigate telecommunication system reliability and defect tracking. They employ a recent model for the failure discovery in the associated system software. These are: half-sibling and a clone (HSAC) genetic algorithm; a recurrent dynamic neural network (RDNN) requiring parametric adjustments and using wavelets as basis; another RDNN with Adaptive parameters to incoming stream of input data, such that the error in failure intensity is minimized, subject to the model constraints. Each approach aims to improve speed of convergence, reliability, noise tolerance, and suitability for hardware implementation. Simulation results seem to favor the ARDNN since it iterates (about 10) on the shape of the wavelet basis and provide adequate recovery of the data in the form of piecewise linear differential.

关键词： Telecommunication network reliability system software Cloning Genetic algorithms Neural networks Recurrent neural networks Convergence Noise shaping Hardware Shape

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A Fast Capacitance Extraction Engine

A Fast Capacitance Extraction Engine

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2006 8th International Conference on Solid-State and Integrated Circuit Technology

作者： Shilei Sun Jintao Xue Li Liu Gaofeng Wang Computer School Wuhan University Institute of Microelectronics & Information Technology Wuhan University State Key Laboratory of ASIC & System Fudan University

ISBN: (纸本)1424401607

A fast interconnect capacitance extraction engine is realized and presented *** a fast multipole accelerated Generalized Minimal Residual(GMRES) based three-dimensional(3-D) field solver,this software tool can quickly and accurately extract parasitic capacitances of arbitrary interconnects embedded in piece-wise constant *** engine is also capable of performing fast and accurate capacitance extraction for critical nets in Radio Frequency(RF) applications,IC designs,and MicroElectroMechanical systems(MEMS).The architecture of this extraction engine is *** examples are included to validate the extraction engine and demonstrate the capabilities of this extraction engine.

关键词： GMRES A Fast Capacitance Extraction Engine

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Introducing RapidHDL: A New Library to Design FPGA Hardware in Microsoft. Net and Automatically Generate Verilog Netlists

Introducing RapidHDL: A New Library to Design FPGA Hardware ...

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IEEE International Conference on Electro-Information Technology

作者： Jacob N. Allen Hoda S. Abdel-aty-zohdy Robert L. Ewing Microelectronics System Design Lab Department of Electrical and Computer Engineering Oakland University Rochester MI USA Information Directorate Air Force Research Laboratory USA

RapidHDL is introduced as a new object oriented hardware description library for C# developers. RapidHDL seeks to speed up FPGA development by applying best practices used in software engineering to increase productivity. Logic is rapidly defined in component classes using a structure of truth-table definitions, sink nodes, source nodes, and pass-through nodes. Hardware simulation co-runs with C# programs, and a linked-list of clock events simulates propagation delays. A standardized testing framework allows the developer to write test benches, hardware, and software in a single language. Algorithms are presented to automatically transform RapidHDL objects to Verilog netlist that can be synthesized by calling 3rd party tools

关键词： Field programmable gate arrays Hardware design languages Software libraries Object oriented modeling Discrete event simulation Software testing Best practices Software engineering Productivity Logic

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A Compact Correlation Filter For On-Chip Learning in a Spiking Neural Network

A Compact Correlation Filter For On-Chip Learning in a Spiki...

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： Jacob N. Allen Hoda S. Abdel-Aty-Zohdy Robert L. Ewing Microelectronics System Design Laboratory Department of Elect. and Computer Engineering Oakland University Rochester MI USA Member IEEE Information Directorate Air Force Research Labs Wright-Patterson Air Force Base Ohio 45433

A Hebbian learning algorithm based on proportion sampling is presented that can be used to implement on-chip learning for a binary spiking neural network. A correlation filter estimates when statistical independence has been obtained between subsequent samples. Simulation shows that the correlation filter reduces falsely learned connections in environments were inputs are randomly activated an average of 83% of the total time. A correlation filter for 255 binary samples is implemented using 21 gates and a surface area of .0008cm2 for a .5μ fabrication process. Compared to traditional neural networks, the spiking neural network learned an odor in a single epoch resulting in only a 7% error, while classical learning algorithms required multiple epochs and typically resulted in 30% error.

关键词： Filters Network-on-a-chip Neural networks Neurons Hebbian theory Working environment noise microelectronics Sampling methods Active noise reduction Jacobian matrices

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Dynamic PECT Effect for Nanotransducers and Hybrid Devices

Dynamic PECT Effect for Nanotransducers and Hybrid Devices

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Midwest Symposium on Circuits and systems (MWSCAS)

作者： F. Lincoln Vogel Hoda S. Abdel-Aty-Zohdy Robert L. Ewing GraphiTech Inc. St. Clair Shores MI 48080-1567 Microelectronics System Design Laboratory Electrical and Computer Engineering Oakland University Rochester MI USA Information Directorate Air Force Research Laboratory OH USA

Recent advances in nanotechnology have opened the door to the use of hybrid devices in integrated system-on-a-chip. The Piezo Electrochemical Transducer (PECT) effect device uses nano-dimensioned graphite fibers, where the PECT effect can be effectively used to control current and voltage levels. The PECT effect, discovered (in early 1980's) and named by co-author F. L. Vogel, uses graphite fiber intercalated with sulfuric acid (H2SO4) to shrink parallel to the graphite planes (basal plane), whereas the reverse PECT effect causes the graphite fiber to expand. The reverse PECT effect appears by reversing the direction of the electrolysis current. This paper explores the physical properties of PECT and its applications to developing novel solid-state hybrid devices, including new kinds of transducers and transistors based on graphite that will have a significant impact on future bio-inspired integrated circuits and nano-technology.

关键词： Nanoscale devices Optical fiber devices Transducers Nanotechnology system-on-a-chip Voltage control Electrochemical processes Solid state circuits Application specific integrated circuits Hybrid integrated circuits

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High temperature stable [Ir3Si-TaN]/HfLaON CMOS with large work-function difference

High temperature stable [Ir3Si-TaN]/HfLaON CMOS with large w...

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2006 International Electron Devices Meeting, IEDM

作者： Wu, C.H. Hung, B.F. Chin, Albert Wang, S.J. Chen, W.J. Wang, X.P. Li, M.-F. Zhu, C. Jin, Y. Tao, H.J. Chen, S.C. Liang, M.S. Inst. of Microelectronics Dept. of Electronics Eng. National Cheng Kung Univ. Tainan Taiwan Dept. of EE Nat'l Chiao-Tung U. U. System of Taiwan Hsinchu Taiwan Graduate Inst. of Materials Eng. National Ping-Tung University of Science and Technology Taiwan SNDL Dept. of Electrical and Computer Eng. National Univ. of Singapore Singapore Singapore Taiwan Semiconductor Manufacturing Corp. Science-Based Industrial Park Hsinchu Taiwan

We report novel 1000C-stable [Ir3Si-TaN]/HfLaON CMOS for the first time, where the self-aligned and gate-first process are full compatible to current VLSI. Good Φm-eff of 5.08 and 4.24 eV, low Vt of -0.10 and 0.18 V,... 详细信息

ISBN: (纸本)1424404398

关键词： CMOS integrated circuits

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High Temperature Stable [Ir3Si-TaN]/HfLaON CMOS with Large Work-Function Difference

High Temperature Stable [Ir3Si-TaN]/HfLaON CMOS with Large W...

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International Electron Devices Meeting (IEDM)

作者： C. H. Wu B. F. Hung Albert Chin S. J. Wang W. J. Chen X. P. Wang M.-F. Li C. Zhu Y. Jin H. J. Tao S. C. Chen M. S. Liang Institute of Microelectronics Department of Electronics Engineering National Cheng Kung University Tainan Taiwan Nano-Science Technology Ctr Department of EE. Nat'l Chiao-Tung U. U. System of Taiwan Hsinchu Taiwan Graduate Institute of Materials Engineering National Pingtung University of Science and Technology Taiwan SNDL Department of Electrical & Computer Engineering National University of Singapore Singapore Taiwan Semiconductor Manufacturing Corporation Hsinchu Taiwan

The authors report novel 1000degC-stable [Ir 3 Si-TaN]/HfLaON CMOS for the first time, where the self-aligned and gate-first process are full compatible to current VLSI. Good Phi m-eff of 5.08 and 4.24 eV, low V t of -0.10 and 0.18 V, high mobility of 84 and 217 cm 2 /Vs at 1.6 nm EOT, and small 85degC BTI <20 mV (10 MV/cm for 1 hr) are measured

关键词： Temperature Hafnium compounds Crystallization Dielectrics CMOS technology Leakage current Thermal stability Amorphous materials computer aided manufacturing Very large scale integration

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Special section on VLSI design and CAD algorithms

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IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND computer SCIENCES 2006年第12期E89A卷 3377-3377页

作者： Onodera, Hidetoshi Department of Communications and Computer Engineering Graduate School of Informatics Kyoto University Japan SIG-SLDM (System LSI Design Methodology) IPSJ Japan Univ. of Tokyo Japan Kyushu Univ. Japan Tokyo Inst. of Tech. Japan Kyushu Inst. of Tech. Japan JAIST Japan Kobe Univ. Japan Waseda Univ. Japan Kumamoto Univ. Japan Sanyo Japan Fujitsu Lab. Hong Kong Gunma Univ. Japan Nagoya Univ. Japan Osaka Univ. Japan NEC Tokyo Metropolitan Univ. Japan Hokkaido Univ. Japan Matsushita Japan Toshiba Microelectronics Japan Univ. of Shizuoka Japan Hitachi Japan

No abstract available

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Generalized quadrature bandpass sampling with FIR filtering

Generalized quadrature bandpass sampling with FIR filtering

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IEEE International Symposium on Circuits and systems (ISCAS)

作者： Yi-Ran Sun S. Signell Laboratory of Electronics and Computer System LECS Institute of Microelectronics and Information Technology IMIT Royal Institute of Technology Stockholm Sweden

In this paper, generalized quadrature bandpass sampling (BPS) in voltage-mode with inherent FIR filtering is presented. By using the theory of sampling equivalence, this sampling strategy is comparable to another strategy, charge sampling with intrinsic IIR filtering. The theoretical analysis and simulation results show that this inherent FIR filtering not only has the advantage of rejecting or attenuating images and interference, but is also helpful in suppressing noise aliasing. A realizable implementation of the proposed sampling strategy by uniform quadrature BPS (UQBPS) promises to suppress noise aliasing in BPS systems to a large extent.

关键词： Finite impulse response filter Sampling methods Band pass filters IIR filters Image sampling Voltage Filtering theory Image analysis Analytical models Interference suppression

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Strain-induced very low noise RF MOSFETs on flexible plastic substrate

Strain-induced very low noise RF MOSFETs on flexible plastic...

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2005 Symposium on VLSI Technology

作者： Kao, H.L. Chin, Albert Hung, B.F. Lai, J.M. Lee, C.F. Li, M.-F. Samudra, G.S. Zhu, C. Xia, Z.L. Liu, X.Y. Kang, J.F. Dept. of Electronics Eng. Nat'l Chiao-Tung Univ. Univ. System of Taiwan Hsinchu Taiwan SNDL Dept. of Electrical and Computer Eng. National Univ. of Singapore Singapore Singapore Institute of Microelectronics Peking University Beijing 100871 China

ISBN: (纸本)4900784001

Using microstrip line design to screen substrate resistance generated RF noise, very low 1. l dB min. noise figure (NFmin) and high 12 dB associate gain are measured at 10 GHz of 0.18 μm MOSFET on plastic without de-embedding. The die on plastic was thinned to 30μm that allows applying uniaxial strain to further lower the 10 GHz NFmin to only 0.92 dB and comparable well with the 0.13 μm and 90nm nodes MOSFETs.

关键词： MOSFET devices

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