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IEEE/ACM International Symposium on Microarchitecture (MICRO)

作者： Qiang Wu V.J. Reddi Youfeng Wu Jin Lee D. Connors D. Brooks M. Martonosi D.W. Clark Depts. of Computer Science Electrical Engineering Princeton University USA Department of Electrical and Computer Engineering University of Colorado Boulder USA Programming Systems Laboratory Intel Corporation USA Division of Engineering and Applied Science Harvard University USA

Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardware, OS time-interrupts, or static-compiler techniques. However, substantially greater gains can be realized when control opportunities are also explored in a dynamic compilation environment. There are several advantages to deploying DVFS and managing energy/performance tradeoffs through the use of a dynamic compiler. Most importantly, dynamic compiler driven DVFS is fine-grained, code-aware, and adaptive to the current microarchitecture environment. This paper presents a design framework of the run-time DVFS optimizer in a general dynamic compilation system. A prototype of the DVFS optimizer is implemented and integrated into an industrial-strength dynamic compilation system. The obtained optimization system is deployed in a real hardware platform that directly measures CPU voltage and current for accurate power and energy readings. Experimental results, based on physical measurements for over 40 SPEC or Olden benchmarks, show that significant energy savings are achieved with little performance degradation. SPEC2K FP benchmarks benefit with energy savings of up to 70% (with 0.5% performance loss). In addition, SPEC2K INT show up to 44% energy savings (with 5% performance loss), SPEC95 FP save up to 64% (with 4.9% performance loss), and Olden save up to 61% (with 4.5% performance loss). On average, the technique leads to an energy delay product (EDP) improvement that is 3times-5times better than static voltage scaling, and is more than 2times (22% vs. 9%) better than the reported DVFS results of prior static compiler work. While the proposed technique is an effective method for microprocessor voltage and frequency control, the design framework and methodology described in this paper have broader potential to address other energy and power issues such as di/dt and thermal control

关键词： Dynamic compiler Microprocessors Performance loss Voltage control Hardware Energy measurement Dynamic voltage scaling Frequency Energy management Microarchitecture

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Automatic discovery of translation collocations from bilingual corpora 16

Automatic discovery of translation collocations from bilingu...

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16th European Conference on Artificial Intelligence, ECAI 2004

作者： Barrachina, Sergio Vilar, Juan Miguel Dpt. of Computer Engineering and Science Universitat Jaume I Castellón Spain Dpt. of Programming Languages and Computer Systems Universitat Jaume I Castellón Spain

ISBN: (纸本)9781586034528

We describe a method to automatically discover translation collocations from a bilingual corpus and how these improve a machine translation system. The process of inference of collocations is iterative: An alignment is used to derive an initial set of collocations, these are used in turn to improve the alignment and this new alignment is used to generate new collocations. This process is repeated until no more collocations are found. The final alignment and the set of collocations are used to train a translation model. We use a model that is based on finite state transducers and word clusters and has been modified to work with collocations in addition to single words. We present experiments in which we show that automatic collocations improve translation quality without prior linguistic information.

关键词： Alignment

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Optimised asynchronous self-timing for superconducting RSFQ logic circuits

Optimised asynchronous self-timing for superconducting RSFQ ...

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AFRICON Conference

作者： H.R. Gerber C.J. Fourie W.J. Perold Applied computer programming and computer systems Electronics and quantum electronics Department of Electronic and Electrical Engineering University of Stellenbosch

Rapid single flux quantum (RSFQ) logic is a digital circuit technology that in recent years has presented itself as an alternative to semiconductors in the application of ultra high speed, very low power applications. The optimal timing of digital circuits operating at hundreds of GHz is still a complex problem for both RSFQ and semiconductor technologies. The fact that most RSFQ gates require a clock signal to function makes this even more complex. Various RSFQ timing schemes have been adapted from semiconductor design methodologies, and some have been designed specifically for RSFQ. Currently, synchronous clocking schemes outperform other schemes, but with the scale of RSFQ circuits ever increasing, the proper use of timing schemes are becoming more crucial. This paper describes a new asynchronous self-timing scheme where the details of clock distribution and clocking are built into the logic gates. Tests were done on the newly developed asynchronous logic gates and an asynchronous full adder was implemented and tested

关键词： Superconducting logic circuits Logic circuits Clocks Timing Logic testing Digital circuits Logic gates Design methodology Circuit testing Adders

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Authentication and autoconfiguration for MANET nodes

Authentication and autoconfiguration for MANET nodes

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International Conference on Embedded and Ubiquitous Computing, EUC 2004

作者： Buiati, Fabio Puttini, Ricardo De Sousa, Rafael Barenco Abbas, C.J. García Villalba, L.J. University of Brasília Department of Electrical Engineering Brasília70910-900 Brazil Department of Computer Systems and Programming Complutense University of Madrid–UCM Juan del Rosal 8 DespachoMadrid431 28040 Spain

ISBN: (纸本)354022906X

In this paper we propose a secure autoconfiguration model for Manet. Our design is based in a distributed and self-organization certification service, which provides node identification and authentication for the autoconfiguration protocol. We have defined some modifications in the Dynamic Configuration and Distribution Protocol (DCDP) in order to extend the protocol functionalities to include security-aware node identification and authentication services. The overall security is also enforced with intrusion detection techniques. © Springer-Verlag Berlin Heidelberg 2004.

关键词： Intrusion detection

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EkSarva: an intelligent collaboration framework

EkSarva: an intelligent collaboration framework

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International IEEE Conference on Intelligent Systems, IS

作者： R. Reddy S. Selliah V. Bharadwaj Jinqiao Yu S. Kankanahalli S. Reddy Smart Internet Programming Laboratory Concurrent Engineering Research Center Lane Department of Computer Science and Electrical Engineering West Virginia University Morgantown WV USA

Ubiquitous computing and universal network connectivity have given rise to expectations of building a Digital Society, where many aspects of business and social activities may be accomplished by remote participants. Intelligent, context-aware, and workflow-centric collaboration is an essential prerequisite to fulfill that expectation. EkSarva is a framework, which enables realization of such collaborations in diverse domains. This is accomplished by identifying the key concepts and their inter-relationships (dubbed the PPP/SST paradigm), which form the foundation of this framework. The key concepts include: (a) Project, (b) Person, (c) Place, (d) Signal, (e) Situation, and (f) Transcript. This paper describes how these concepts collectively can give rise to an intelligent collaboration environment.

关键词： Collaboration Collaborative work Internet Java computer networks Intelligent networks Signal processing Intelligent structures Intelligent agent Laboratories

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The Effects of Algorithm Visualizations with Storylines on Retention: An Experimental Study

The Effects of Algorithm Visualizations with Storylines on R...

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IEEE Symposium on Visual Languages and Human Centric Computing (VL/HCC)

作者： C.D. Hundhausen R. Patterson J. Lee Brown S. Farley Visualization and End User Programming Laboratory College of Electrical Engineering and Computer Science Washington State University Pullman WA USA Department of Psychology Washington State University Pullman WA USA

Algorithm visualizations graphically illustrate how algorithms work. In prior ethnographic studies of a computer science course in which students were required to construct and present their own algorithm visualizations, we observed that visualizations based on storylines tended to stimulate increased audience interest and involvement. This observation, coupled with the empirical research that substantiates the value of stories as mnemonic devices, raises an interesting research question: Do visualizations with storylines actually help students remember the procedural behavior of an algorithm better than visualizations that do not involve storylines? To investigate this question, we conducted an experimental study that compared the memorability of algorithm descriptions involving differing degrees of spatial and verbal embellishment. The study failed to detect significant differences. We reflect on our lack of significant results, and suggest two alternative paths for future research into the value of story-based algorithm visualization

关键词： Visualization computer science Laboratories Testing programming profession Educational institutions Psychology Motion pictures Feedback Algorithm design and analysis

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Switched Capacitor Network Analysis by Means of TCM

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Journal of Donghua University(English Edition) 2004年第1期21卷 100-103页

作者：徐静波徐望人 College of Electronic & Electrical Engineering Shanghai University of Engineering Science Shanghai 200336 College of Information science and technology Donghua University Shanghai 200051he totally coded method (TCM) reveals the same objective law which governs the gain calculating for signal flow graph as Mason formula does. This algorithm is carried out merely in the domain of code operation. Based on pure code algorithm it is more efficient because figure searching is no longer necessary. The code-series (CS) which are organized from node association table have the holoinformation nature so that both the content and the sign of each gain-term can be determined via the coded method. The principle of this method is obvious and it is suited for computer programming. The capability of the computeraided analysis for Switched Capacitor (SCN) can be enhanced.

The totally coded method (TCM) reveals the same objective law, which governs the gain calculating for signal flow graph as Mason formula does. This algorithm is carried out merely in the domain of code operation. Based on pure code algorithm, it is more efficient because figure searching is no longer necessary. The code-series ( CS ), which are organized from node association table, have the holoinformation nature, so that both the content and the sign of each gain-term can be determined via the coded *** principle of this method is obvious and it is suited for computer programming. The capability of the computeraided analysis for Switched Capacitor (SCN) can be enhanced.

关键词： signal flow graph algorithm coded method SCN.

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Preface

Lecture Notes in Computer Science (including subseries Lectu...

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Lecture Notes in computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2004年 2981卷 V-VI页

作者： Müller-Schloer, Christian Ungerer, Theo Bauer, Bernhard University of Hannover Institute of Systems Engineering System and Computer Architecture - SRA Appelstr. 4 Hannover Germany University of Augsburg Institute of Informatics Augsburg Germany University of Augsburg Department of Software Engineering and Programming Languages Augsburg Germany

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Incremental and iterative monolingual clustering algorithms 8

Incremental and iterative monolingual clustering algorithms

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8th European Conference on Speech Communication and Technology, EUROSPEECH 2003

作者： Barrachina, Sergio Vilar, Juan Miguel Dpt. of Computer Engineering and Science Universidad Jaume i Spain Dpt. of Programming Languages and Computer Systems Universidad Jaume i Spain

To reduce speech recognition error rate we can use better statistical language models. These models can be improved by grouping words into word equivalence classes. Clustering algorithms can be used to automatically do this word grouping. We present an incremental clustering algorithm and two iterative clustering algorithms. Also, we compare them with previous algorithms. The experimental results show that the two iterative algorithms perform as well as previous ones. It should be pointed out that one of them, that uses the leaving one out technique, has the ability to automatically determine the optimum number of classes. These iterative algorithms are used by the incremental one. On the other hand, the proposed incremental algorithm achieves the best results of the compared algorithms, its behavior is the most regular with the variation of the number of classes and can automatically determine the optimum number of classes.

关键词： Clustering algorithms

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Scalable QoS approach in a core internet network

Scalable QoS approach in a core internet network

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International Conference on Web engineering, ICWE 2003

作者： Barenco Abbas, Cláudia J. García Villalba, L. Javier Dept. Electric Engineering University of Brasilia Brazil Dept. Computer Systems and Programming Complutense University of Madrid Spain

ISBN: (纸本)9783540450689

A special attention about scalability has to be paid to QoS solutions for Core Internet Networks as they deal with a lot of flows and demand many resources. This paper analyses and proposes integrated solutions from the physical layer (SDH/SONET and DTM) to the IP layer (IntServ and DiffServ), concentrating not only on scalability, but also QoS guarantees. © Springer-Verlag Berlin Heidelberg 2003.

关键词： Scalability

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