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On the refinement of non-interference

On the refinement of non-interference

引用

Computer Security Foundations Workshop

作者： J. Graham-Cumming J.W. Sanders Programming Research Group Oxford University Computing Laboratory Oxford UK

It is known that functional refinement does not preserve the security properties of a system. The authors propose a trace-based method for specifying the security properties of a system and a method which ensures that this security is preserved under refinement. They include an example to illustrate the use of the definitions and make use of non-interference (as defined in their notation).< >

关键词： Multilevel systems Information security Investments Laboratories Functional programming Natural languages Computer languages Proposals Displays Interference

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Time interval semantics and implementation of a real-time programming language

Time interval semantics and implementation of a real-time pr...

引用

Euromicro Conference on Real-Time Systems

作者： He Jifeng J. Bowen Programming Research Group Oxford University Computing Laboratory Oxford UK

The authors present a real-time programming language, including concurrency, which could be used in the formal development of embedded systems. The semantics of the language is provided in the form of a time interval semantics and also a number of algebraic refinement laws. The laws allow convenient reasoning and transformation of programs. In particular, a compiler for a sequential subset of the language is defined as a set of theorems relating high-level program constructs to a low-level machine specified as an interpreter in the high-level language. In addition, a prototype compiler may be produced very directly from Ihe lheorems in Ihe form of a logic program.

关键词： Computer languages Real time systems Concurrent computing Program processors Prototypes Logic Embedded computing Embedded system

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An object model of data, based on the ODMG industry standard for database applications

An object model of data, based on the ODMG industry standard...

引用

International Seminar on Client/Server computing. Seminar Proceedings (Digest No. 1995/184)

作者： K.R. Sujithan Programming Research Group Oxford University Computing Laboratory Oxford UK

The computational requirements of modern information systems, coupled with the inherent limitations of the relational databases, are stimulating research into post-relational database systems. The recent advances in object databases resulting from the integration of object-oriented programming capabilities with database capabilities, seem highly promising. The Object Database Management group (ODMG) as part of the Object Management group (OMG) has proposed a de facto standard known as ODMG-93 for object databases, which is rapidly gaining acceptance. The author introduces the relevant aspects of the object technology within the OMG framework, their Common Object Request Broker Architecture (CORBA), and discusses how this technology integrates with, and extends the client-server model. The author surveys the main elements of ODMG data model, particularly the datatypes supported, and introduces the elements of both, ODL (Object Definition Language) for defining the structure of the database, and OQL (Object Query Language) for defining queries over the database. Finally, some results are highlighted from the author's work on a calculus for the declarative representation of the OQL queries, suitable for an efficient implementation.

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Towards a declarative framework for hardware-software codesign 94

Towards a declarative framework for hardware-software codesi...

引用

International Workshop on Hardware/Software Codesign (CODES)

作者： W. Luk T. Wu Programming Research Group Oxford University Computing Laboratory Oxford UK

ISBN: (纸本)9780818663154

We present an experimental framework for mapping declarative programs, written in a language known as Ruby, into various combinations of hardware and software. Strategies for parametrised partitioning into hardware and software can be captured concisely in this framework, and their validity can be checked wing algebraic reasoning. The method has been used to guide the development of prototype compilers capable of producing, from a Ruby expression, a variety of implementations involving field programmable gate arrays (FPGAs) and microprocessors. The viability of this approach is illustrated using a number of examples for two reconfigurable systems, one containing an array of Algotronix devices and a PC host, and the other containing a transputer and a Xilinx device.< >

关键词： Software tools Field programmable gate arrays Process design Laboratories Software prototyping Prototypes Program processors Microprocessors Hardware design languages Signal design

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Managing external workload with BSP Time Warp

Managing external workload with BSP Time Warp

引用

Simulation Winter Conference

作者： M.Y.H. Low Programming Research Group Computing Laboratory University of Oxford Oxford UK

This paper describes an extension to the existing BSP Time Warp (Bulk Synchronous Parallel Time Warp) dynamic load-balancing algorithm to allow the management of interruption from external workload. Experiments carried out on a manufacturing simulation model using different partition strategies with and without interruption from external workload show that significant performance improvement can be achieved with external workload management.

关键词： Computational modeling Protocols Virtual manufacturing Heuristic algorithms Concurrent computing Time warp simulation Costs Laboratories Partitioning algorithms Interference

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Hardware-software codesign of multidimensional programs

Hardware-software codesign of multidimensional programs

引用

IEEE Workshop on FPGAs for Custom computing Machines

作者： W. Luk T. Wu I. Page Programming Research Group Oxford University Computing Laboratory Oxford UK

Presents a method for parametrised partitioning of multidimensional programs for acceleration using a hardware coprocessor. The method involves a divide-and-conquer structure, with the "divide" and "merge" phases carried out by a general-purpose processor, while the "conquer" phase is handled by application-specific hardware. The partitioning strategy has been captured in a simple functional language, and we have automated the production of partitioned programs in this language. Our approach has been tested on an FPGA-based system using a number of computer vision algorithms, including the Canny edge detector, and the performance is compared against executing the programs on the PC host.< >

关键词： Multidimensional systems Hardware Programmable logic arrays Computer vision Partitioning algorithms Field programmable gate arrays Laboratories Acceleration Coprocessors Software testing

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Hardware/software codesign for FPGA-based systems

Hardware/software codesign for FPGA-based systems

引用

Annual Hawaii International Conference on System Sciences (HICSS)

作者： J.M. Saul Computing Laboratory Programming Research Group Oxford University Oxford UK

A new codesign compiler called Dash (Design Automation for Software and Hardware) provides a co-synthesis and co-simulation environment for mixed FPGA/processor architectures. It compiles a C-like description to a solution containing both processors and custom hardware, and allows the descriptions of FPGA-based processors to be heavily parametrised. The user may add instructions to the processors, and the Dash software architecture allows the user to add facilities for targeting these extra instructions to the compiler. This system is being used to design a number of case studies, and a single-chip codesign of an Internet video game is used to illustrate the design flow.

关键词： Hardware Field programmable gate arrays Software systems Computer architecture Design automation Application software Software tools Acceleration Laboratories Hip

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Dynamic load-balancing for BSP Time Warp

Dynamic load-balancing for BSP Time Warp

引用

Annual Symposium on Simulation

作者： M.Y.H. Low Programming Research Group Computing Laboratory University of Oxford Oxford UK

The performance of a parallel simulation system depends very much on partitioning simulation workload evenly among the set of processors in the computing environment to ensure load-balance between processors. Most parallel simulation systems employ user-defined static partitioning. However static partitioning requires in-depth domain knowledge of the specific simulation model in the study. It is not effective if the workload of a simulation model could not be quantified accurately or changes over time during a simulation run. Dynamic load-balancing allows the simulation system to automatically balance the workload of different simulation models without user's input. In this paper the use of dynamic load-balancing in the context of the BSP Time Warp optimistic protocol is examined. Based on the BSP cost model, a dynamic load-balancing algorithm for the BSP Time Warp protocol is developed. Using different simulation models, the paper shows that to achieve consistent performance, the dynamic load-balancing algorithm for BSP Time Warp needs to consider both computation and communication workload, as well as lookaheads between processors.

关键词： Computational modeling Costs Protocols Concurrent computing Heuristic algorithms Time warp simulation Computational efficiency Algorithm design and analysis Parallel programming Load modeling

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Transformation techniques for serial array design

Transformation techniques for serial array design

引用

International Conference on Application Specific Array Processors

作者： W.W.C. Luk Programming Research Group Oxford University computing Laboratory Oxford UK

This paper describes a design framework for developing application-specific serial array circuits. Starting from a description of the state-transition logic or a fully-parallel architecture, correctness-preserving transformations are employed to derive a wide range of implementations with different space-time trade-offs. The approach has been used in synthesising designs based on field-programmable gate arrays, and is illustrated by the development of a number of circuits including sorters and convolvers.< >

关键词： Circuits Signal design Equations Erbium Calculus

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An improved simplex method for function minimization

An improved simplex method for function minimization

引用

IEEE International Conference on Systems, Man and Cybernetics

作者： Yuguang Huang W.F. McColl Programming Research Group Oxford University Computing Laboratory Oxford UK

In this paper, an improved method based on Nelder and Mead's simplex method (1965) is described for unconstrained function minimization. The information of the function values evaluated in the previous steps is combined into the direction determination of the succeeding simplex. In this way, the new method reflects a more reasonable descendant search nature of the simplex method. The performance of this improved method over the traditional approach is compared based on the standard subroutine fmins of the MATLAB.

关键词： Minimization methods Functional programming Laboratories Algorithms MATLAB Reflection Shape

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