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A Survey on Architectures, Hardware Acceleration and Challenges for In-Network Computing

ACM TRANSACTIONS ON RECONFIGURABLE TECHNOLOGY AND SYSTEMS 2025年第1期18卷 1-34页

作者： Nickel, Matthias Goehringer, Diana Tech Univ Dresden Dresden Germany Tech Univ Dresden Ctr Tactile Internet Human Loop CeTI Dresden Germany

By moving data and computation away from the end user to more powerful servers in the cloud or to cloudlets at the edge, end user devices only need to compute locally for small amounts of data and when low latency is required. However, with the advent of 6G and internet-of-Everything, the demand for more powerful networks continues to grow. The introduction of Software-Defined Networking and Network Function Virtualization has allowed us to rethink networks and use them for more than just routing data to servers. In addition, the use of more powerful network devices is bringing new life to the concept of active networks in the form of in-network computing. In-Network Computing provides the ability to move applications into the network and process data on programmable network devices as they are transmitted. In this work, we provide an overview of in-network computing and its enabling technologies. We take a look at the programmability and different hardware architectures for SmartNICs and switches, focusing primarily on accelerators such as FPGAs. We discuss the state of the art and challenges in this area, and look at CGRAs, a class of hardware accelerators that have not been widely discussed in this context.

关键词： In-Network Computing Software-Defined Networking FPGA CGRA SoC

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A V -Band 2-Gb/s 6.5-dBm Low-Power Transmitter in CMOS With On-Chip Antenna and Consumption Adaptivity Down to 700 nW

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IEEE JOURNAL OF SOLID-STATE CIRCUITS 2025年第2期60卷 410-420页

作者： An, Xin Morath, Helmuth P. E. Protze, Florian Wagner, Jens Ellinger, Frank Tech Univ Dresden Chair Circuit Design & Network Theory CCN Ctr Tactile Internet Human In the Loop CeTI D-01069 Dresden Germany

This article presents and investigates a V -band transmitter (TX) for low-power wireless communication supporting on-off keying (OOK) and four-/eight-level pulse amplitude modulation (PAM4/8). To prove the concept, the circuit is implemented in a 22-nm fully depleted silicon-on-insulator (FD-SOI) complementary metal oxide semiconductor (CMOS) technology. The TX consumes 11.7 mW at full speed. Furthermore, the TX supports low-power mode with as low as 700 nW of dc power. The maximum data rate is 2 Gb/s. By applying dynamic data rate to dc-power adaptivity (DDDA), the dc power can be significantly reduced as the data rates decreases. This maintains the energy-per-bit below 10 pJ/b for data rates greater than 100 kb/s with a best value of 3.9 pJ/b and allows the dc power to be greatly reduced down to 700 nW at data rates below 20 kb/s. The measured maximum transmission power is 6.5 dBm. Moreover, the TX achieves 10-dBm effective isotropic radiated power (EIRP) with an on-chip 3-D antenna. The core area of the TX is only 0.19 mm 2 . To the best knowledge of the authors, the proposed TX is the first reported TX with DDDA and achieves the lowest dc power in comparison to similar designs that have been reported to date.

关键词： Wireless sensor networks Wireless communication System-on-chip Power amplifiers Logic gates Power harmonic filters Voltage-controlled oscillators Bondwire antenna consumption adaptivity duty cycling millimeter-wave (mmW) on-off keying (OOK) pulse amplitude modulation (PAM) wireless sensor network (WSN) wireless sensor network (WSN)

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Comprehensive Rheological Study of Post-Consumer Recycled Polypropylene: Analyzing the Influence of Waste Origin on Material Flow Properties

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JOURNAL OF APPLIED POLYMER SCIENCE 2025年第0期

作者： Frankenbach, Leopold Alexander Lukoschek, Stephanie Cherif, Chokri Tech Univ Dresden Inst Text Machinery & High Performance Mat Technol Dresden Germany TUD Dresden Univ Technol Ctr Tactile Internet Human Loop CeTI Dresden Germany

Recycling of post-consumer waste has emerged as a key strategy to reduce environmental impact and conserve resources, particularly in the production of sustainable polymers. The development of high-quality recycled polypropylene (rPP) from household waste, such as the Systalen recyclate produced by Der Gr & uuml;ne Punkt (Green Dot), exemplifies this progress. Systalen is manufactured using a patented purification and recycling process designed to produce consistent, high-quality rPP from post-consumer waste streams, significantly reducing CO2 emissions compared to virgin plastics. This study provides a comprehensive rheological characterization of Systalen rPP, focusing on the influence of its waste origin on the material's flow properties. Advanced rheological methods, including oscillatory shear and rotation rheometry, were used to evaluate viscoelastic properties, flow stability, and processing behavior. Results reveal notable variations in flow characteristics due to the heterogeneous composition and potential contaminants inherent to post-consumer waste, impacting shear thinning behavior, complex viscosity, and relaxation times. This research highlights the necessity of optimized processing strategies tailored to such recyclates to ensure their consistent performance. The findings emphasize the potential of Systalen rPP as a reliable secondary raw material for a wide range of applications (e.g., textile industry), supporting circular economy initiatives and reducing reliance on virgin resources.

关键词： extrusion recycling textiles

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Ultra-Low-Power 0.35-V 0.63-nW/kHz Multi-Stacked Clock Oscillator With Adjustable Frequency and Duty-Cycling

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IEEE ACCESS 2025年 13卷 57994-58007页

作者： Seyyedrezaei, Seyyedmohsen Wagner, Jens Ellinger, Frank Tech Univ Dresden Chair Circuit Design & Network Theory D-01069 Dresden Germany Tech Univ Dresden Ctr Tactile Internet Human Inthe Loop CeTI D-01069 Dresden Germany

This paper presents the analysis, design, and characterization of an on-chip ultra-low-power clock oscillator for sensor nodes, implemented in 130nm BiCMOS technology. The design employs a multi-stacked inverter-based ring oscillator topology which utilizes variable RC features to tune the oscillation frequency. It is demonstrated that incorporating resistive coupling in the inverter stages helps to minimize frequency deviation around 12.1-13.5% for 10% of power supply variations and consequently achieves frequency stability improvement. To the best knowledge of the authors, this is the first time that a multi-stacked technique is utilized in the inverter stages of an oscillator to make the leakage current negligible reducing power consumption. With an adaptive delay line, the design is enabled to produce an adjustable duty-cycling output. The proposed oscillator consumes 510pW from a 0.35V power supply at 810 Hz operation frequency and achieves a power efficiency of 0.63 nW/kHz, positioning it among the most efficient Hz-to-kHz oscillators. The design occupies an area of 0.038mm(2).

关键词： Transistors Ring oscillators Power demand Leakage currents Clocks Stacking MOSFET System-on-chip Circuit stability Inverters Clock generation clock oscillator duty-cycling leakage current low voltage relaxation oscillator ring oscillator stacking technique ultra-low power consumption

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CFO-CR: Carrier Frequency Offset Methodology for High-Rate Common Randomness Generation

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IEEE ACCESS 2025年 13卷 15469-15488页

作者： Kumar Herooru Sheshagiri, Prashanth Reisslein, Martin Cabrera, Juan A. Fitzek, Frank H. P. Tech Univ Dresden Deutsch Telekom Chair Commun Networks D-01062 Dresden Germany Arizona State Univ Sch Elect Comp & Energy Engn Tempe AZ 85287 USA Tech Univ Dresden Ctr Tactile Internet Human In The Loop CeTI D-01062 Dresden Germany

Common Randomness (CR) provides sequences of random variables at two physically separated locations. Ideally, the random variables at the two locations should be identical, i.e., have low probability of discrepancy, and should have high entropy. Previous CR research has focused on CR for physical layer security (mainly physical layer secret key generation), where a low CR generation rate, i.e., a low rate of CR bits per second is sufficient. However, emerging semantic communication paradigms, e.g., identification via channels, require high CR rates. We develop and evaluate a Carrier Frequency Offset (CFO) based methodology for high-rate CR generation from reciprocal observations of a common wireless channel between two distinct wireless terminals. The proposed CFO-CR methodology proceeds in several stages, including channel probing, random parameter extraction, noise reduction, quantization, information reconciliation, and randomization. Our evaluations with single-carrier software-defined radios, for which we make measurement traces publicly available, indicate that high-rate CR generation should observe (probe) the CFO and employ a Savitzky Golay low-pass filter with a low cut-off frequency for noise reduction in conjunction with multi-bit quantization, Gray code encoding, and a shuffling based randomization. We provide insights into the tradeoffs between the reconciliation cost for correcting bit discrepancies and the CR generation parameters. Our proposed CFO-CR methodology can generate 2048 bits of CR at a comparatively low reconciliation cost of 72 bytes while only making 256 channel observations and passing all common randomness tests. For generating 2048 bits of CR, other state-of-the-art approaches either require more channel observations ( $\ge 2048$ ) or incur a higher reconciliation cost ( $\ge 450$ bytes).

关键词： Quantization (signal) Low-pass filters Entropy Integrated circuits Noise reduction Noise measurement Noise Generators Servers Random variables Channel probing channel reciprocity correlation identification over channels randomness extraction random shuffling Savitzky Golay filter

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Promoting formative self-assessment through peer assessment: peer work quality matters for writing performance and internal feedback generation

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INTERNATIONAL JOURNAL OF EDUCATIONAL TECHNOLOGY IN HIGHER EDUCATION 2025年第1期22卷 1-26页

作者： Alemdag, Ecenaz Narciss, Susanne Tech Univ Dresden Psychol Learning & Instruct Dresden Germany Europa Univ Flensburg Inst Educ Sci Flensburg Germany Tech Univ Dresden Ctr Tactile Internet Human Loop CeTI Dresden Germany

Generating quality and accurate internal feedback in self-assessment is challenging for higher education students. Assessing peer works has been linked to enhancing concurrent and follow-up self-assessments in prior research and theoretical models. However, empirical evidence concerning how peer work quality influences subsequent behaviors in online learning environments is scarce and contradictory. Hence, this study aimed to investigate the effects of the quality of the assessed peer works on writing performance and the amount, content, and accuracy of internal feedback via an online experiment. The participants were 164 university students who completed abstract writing and assessment tasks in an online setting. Specifically, they wrote an abstract for a study;provided feedback on two low-quality peer abstracts (PF- -), one high-quality and one low-quality (PF+ -) abstract, or two high-quality abstracts (PF+ +);self-scored and generated internal feedback for their abstracts;and revised their abstracts. The groups' initial and revised abstracts, self-scorings, and internal feedback were analyzed. The findings revealed that the PF+ + and PF+ - groups had significantly higher revised writing performance, more feedback comments expressing problems in their writings and proposing specific suggestions for improvement, and more accuracy in self-scoring and problem detection than the PF- - group. Indicating the impact of the peer work quality, this study suggests using at least one high-quality work for (online) peer assessment to enhance writing performance and self-assessment accuracy.

关键词： Feedback Self-assessment Peer assessment Formative assessment Exemplars Writing Online learning

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Energy-Efficient Aggressive Duty-Cycling of V-Band Power Amplifiers

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IEEE ACCESS 2025年 13卷 64638-64652页

作者： Becker, Maximilian Gottfried Gunia, Marco Mendez, Diego Ellinger, Frank Tech Univ Dresden Chair Circuit Design & Network Theory CCN D-01069 Dresden Germany Pontificia Univ Javeriana Elect Engn Dept Bogota 110231 Colombia Tech Univ Dresden Ctr Tactile Internet Human In the Loop CeTI D-01069 Dresden Germany

In addition to implementing the core functionality, a design goal for modern circuits is reduced energy consumption. When options for improving active state efficiency are eventually exhausted, the next step is to aggressively minimize the duration a circuit is active to reduce overall energy consumption. Consequently, this article presents a top-down study on efficient duty-cycling of power amplifiers (PAs), spanning system-level considerations down to experimental measurements of a proposed V-band PA. A thorough analysis of the duty-cycling characteristics in a wireless transmitter reveals the significance of fast and efficient switching, particularly if minimal latency is desired and if energy consumption should scale linearly with required data rate. To be able to assess PAs in that regard, the related key characteristics as well as transient RF power measurements are discussed. To enable aggressive duty-cycling at circuit level, the switching process is studied for integrated millimeter-wave (mmWave) class-E PAs. Despite intrinsic switched mode operation at RF, transitions from sleep to active state are not instantaneous, but two phases are revealed: operating point switching (OPS) and large-signal rise in the load network. A kickstarter circuit for speeding up this transition is investigated. To prove these concepts, a two-stage 51 GHz 14 dBm SiGe PA capable of fast and efficient operational state switching is designed and fabricated. Its duty-cycling performance is measured in detail for both single-tone and modulated signals showing turn-on times in the nanosecond range. The results demonstrate highly efficient duty-cycling of data transmission at a cycle duration of just 1 mu s for minimum latency. This article aims to allow system and circuit designers to better evaluate requirements for and performance of switchable mmWave PAs in context of duty-cycled communications.

关键词： BiCMOS integrated circuits duty-cycling class-E class-E mmWave mmWave power amplifiers power amplifiers transmitter transmitter transmitter

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Electric Truck Sound Design: A User-Centered Psychoacoustic Approach to Acoustic Vehicle Alerting Systems

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JOURNAL OF THE AUDIO ENGINEERING SOCIETY 2025年第4期73卷 207-219页

作者： Kullukcu, Berkay Rosenkranz, Robert Altinsoy, Ercan Tech Univ Dresden Inst Acoust & Speech Commun Chair Acoust & Hapt D-01069 Dresden Saxony Germany Tech Univ Dresden Ctr Tactile Internet Human Loop CeTI D-01069 Dresden Saxony Germany Tech Univ Dresden Res Cluster Life D-01069 Dresden Saxony Germany

Electric vehicles (EVs), especially trucks, are becoming more common and present a distinct acoustic challenge compared with typical internal combustion engine vehicles. Their silent functioning poses a safety concern to pedestrians. This study seeks to provide a user-centered and psychoacoustically informed design methodology for acoustic vehicle alerting systems (AVAS), especially for electric trucks. Building on the preliminary findings of a semantic differential analysis that compared the perceived sound characteristics of internal combustion engine vehicles and EVs with and without AVAS, the study describes a design methodology. The procedure used in the study incorporates qualitative methods, such as open-ended surveys and jury tests, and quantitative methods incorporating psychoacoustical components. The emphasis is on balancing the intended "electric" and "truck-like" sound characteristics. The work describes a unique design method for user-centered and psychoacoustically informed AVAS for EVs that contributes to the expanding work to develop effective and user-friendly solutions for improving electric truck AVAS perception in urban contexts.

关键词： Trucks

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Multi-UE 5G RAN Measurements: A Gamut of Architectural Options

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IEEE ACCESS 2025年 13卷 1846-1866页

作者： Ingo Grohmann, Andreas Seidel, Mauri Itting, Sebastian A. W. Cheng, Ray-Guang Reisslein, Martin Fitzek, Frank H. P. Tech Univ Dresden Deutsch Telekom Chair Commun Networks D-01062 Dresden Germany Ctr Tactile Internet Human In The Loop CeTI D-01187 Dresden Germany Natl Taiwan Univ Sci & Technol Dept Elect & Comp Engn Taipei 106 Taiwan Arizona State Univ Sch Elect Comp & Energy Engn Tempe AZ 85287 USA

The Radio Access Network (RAN) of Fifth Generation (5G) communication systems critically influences the overall performance and cost of a 5G system. 5G RANs allow for a gamut of implementations ranging from closed (carrier-grade) implementations by traditional vendors that are expensive and configured by the vendor to RANs that are compliant with the specifications of the O-RAN ALLIANCE, i.e., to so-called O-RANs. O-RANs are available in closed-source and open-source implementations;O-RANs can be configured by the operator and are cheaper than the closed RANs. Understanding the packet-level performance characteristics of these different 5G RAN implementations is a prerequisite for informed network planning and deployment, particularly for Non-Public Networks (NPNs) for specific use cases. Existing measurement studies have mainly considered a single User Equipment (UE);however, practical networks typically operate with multiple UEs. We conduct packet-level measurements for concurrent over-the-air transmissions to (downstream) and from (upstream) multiple UEs for a wide range of packet transmission rates. We consider current representative implementations of three RAN architectural options: closed RAN (based on Nokia system), closed-source O-RAN (based on Airspan system), and open-source O-RAN (based on srsRAN Project system). We find that the one-way packet delays and the packet loss probabilities can vary sharply among the multiple concurrently operating UEs (which are identical in model and configuration) in the closed RAN and open-source O-RAN;whereas, the packet-level performance tends to be more consistent among the UEs in the closed-source O-RAN. Our measurement results provide a baseline for future research on refining RAN operations for multiple concurrent packet flows.

关键词： 5G mobile communication Open RAN Costs 3GPP Packet loss Standards Interoperability Delays Companies Wireless networks 5G O-RAN Non-Public Network (NPN) open-source packet delay packet loss probability Radio Access Network (RAN) testbed

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Design and development of electrostatic brakes on the filament level

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SCIENTIFIC REPORTS 2025年第1期15卷 1-13页

作者： Boehnke, Philippa R. C. Schenk, Nadja Boehmer, Carola Winger, Hans Kruppke, Iris Nocke, Andreas Mersch, Johannes Altinsoy, Ercan Cherif, Chokri Tech Univ Dresden Ctr Tactile Internet Human Inthe Loop CeTI D-01069 Dresden Germany Tech Univ Dresden Inst Text Machinery & High Performance Mat Technol D-01069 Dresden Germany Tech Univ Dresden Inst Acoust & Speech Commun Chair Acoust & Hapt D-01069 Dresden Germany

The Cluster of Excellence 'Centre for tactile internet with human-in-the-loop (ceti)'1 addresses developments and inventions for the use in or as smart devices in many areas, such as Industry 4.0, medicine and skill learning. The application of sensor units in smart textiles is widespread and used in various industry branches. Besides sensors, the development of textile actuating units is a relevant research topic. This paper discusses a theoretical actuator concept that leads to a ready-to-implement fiber-based electrostatic brake concept (passive actuator). Generally, the set-up is similar to a capacitor. Two different variants are presented according to the design of the dielectric and outer electrode layer. The dielectric material, its thickness, manufacturing process, future properties and implementation possibilities of the concepts are considered. Finally, a proof of concept with first results is presented.

关键词： Electrostatic brake Capacitor Electrically conductive Yarn Theoretical concepts Passive actuator Proof-of concept

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