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IKGN: Intention-aware Knowledge Graph Network for POI Recommendation

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IKGN: Intention-aware Knowledge Graph Network for POI Recomm...

IEEE International Conference on data Mining (ICDM)

作者： Xiaoyu Zhu Chenyang Bu Bingbing Dong Shengwei Ji Yi He Xindong Wu Key Laboratory of Knowledge Engineering with Big Data (the Ministry of Education of China) Hefei University of Technology School of Computer Science and Information Engineering Hefei University of Technology China School of Artificial Intelligence and Big Data Hefei University China Department of Computer Science Old Dominion University USA Research Center for Knowledge Engineering Zhejiang Lab China

Point-of-Interest (POI) recommendation, pivotal for guiding users to their next interested locale, grapples with the persistent challenge of data sparsity. Whereas knowledge graphs (KGs) have emerged as a favored tool to mitigate the issue, existing KG-based methods tend to overlook two crucial elements: the intention steering users’ location choices and the high-order topological structure within the KG. In this paper, we craft an Intention-aware Knowledge Graph (IKG) that harmonizes users’ visit histories, movement trajectories, and location categories to model user intentions. Building upon IKG, our novel Intention-aware Knowledge Graph Network (IKGN) delves deeper into the POI recommendation by weighing and propagating node embeddings through an attention mechanism, capturing the unique locational intent of each user. A sequential model like GRU is then employed to ensure a comprehensive representation of users’ short- and long-term location preferences. An empirical study on two real-world datasets validates the effectiveness of our proposed IKGN, with it markedly outshining seven benchmark rival models in both Recall and NDCG metrics. The code of IKGN is available at https://***/Jungle123456/IKGN.

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Graph Neural Networks for Vulnerability Detection: A Counterfactual Explanation

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arXiv 2024年

作者： Chu, Zhaoyang Wan, Yao Li, Qian Wu, Yang Zhang, Hongyu Sui, Yulei Xu, Guandong Jin, Hai School of Computer Science and Technology Huazhong University of Science and Technology China School of Electrical Engineering Computing and Mathematical Sciences Curtin University Australia School of Big Data and Software Engineering Chongqing University China School of Computer Science and Engineering University of New South Wales Australia School of Computer Science University of Technology Sydney Australia National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan430074 China

Vulnerability detection is crucial for ensuring the security and reliability of software systems. Recently, Graph Neural Networks (GNNs) have emerged as a prominent code embedding approach for vulnerability detection, owing to their ability to capture the underlying semantic structure of source code. However, GNNs face significant challenges in explainability due to their inherently black-box nature. To this end, several factual reasoning-based explainers have been proposed. These explainers provide explanations for the predictions made by GNNs by analyzing the key features that contribute to the outcomes. We argue that these factual reasoning-based explanations cannot answer critical what-if questions: "What would happen to the GNN's decision if we were to alter the code graph into alternative structures?" Inspired by advancements of counterfactual reasoning in artificial intelligence, we propose CFExplainer, a novel counterfactual explainer for GNN-based vulnerability detection. Unlike factual reasoning-based explainers, CFExplainer seeks the minimal perturbation to the input code graph that leads to a change in the prediction, thereby addressing the what-if questions for vulnerability detection. We term this perturbation a counterfactual explanation, which can pinpoint the root causes of the detected vulnerability and furnish valuable insights for developers to undertake appropriate actions for fixing the vulnerability. Extensive experiments on four GNN-based vulnerability detection models demonstrate the effectiveness of CFExplainer over existing state-of-the-art factual reasoning-based explainers. © 2024, CC BY.

关键词： Graph neural networks

FusionANNS: An Efficient CPU/GPU Cooperative Processing Architecture for Billion-scale Approximate Nearest Neighbor Search

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arXiv 2024年

作者： Tian, Bing Liu, Haikun Tang, Yuhang Xiao, Shihai Duan, Zhuohui Liao, Xiaofei Zhang, Xuecang Zhu, Junhua Zhang, Yu National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab/Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology China Huawei Technologies Co. Ltd China

Approximate nearest neighbor search (ANNS) has emerged as a crucial component of database and AI infrastructure Ever-increasing vector datasets pose significant challenges in terms of performance, cost, and accuracy for ANNS services None of modern ANNS systems can address these issues simultaneously. We present FusionANNS, a high-throughput, low-latency cost-efficient, and high-accuracy ANNS system for billion scale datasets using SSDs and only one entry-level GPU The key idea of FusionANNS lies in CPU/GPU collabo rative filtering and re-ranking mechanisms, which signifi cantly reduce I/O operations across CPUs, GPU, and SSDs to break through the I/O performance bottleneck. Specifically we propose three novel designs: (1) multi-tiered indexing to avoid data swapping between CPUs and GPU, (2) heuristic re-ranking to eliminate unnecessary I/Os and computations while guaranteeing high accuracy, and (3) redundant-aware I/O deduplication to further improve I/O efficiency. We imple ment FusionANNS and compare it with the state-of-the-art SSD-based ANNS system–SPANN and GPU-accelerated in memory ANNS system–RUMMY. Experimental results show that FusionANNS achieves 1) 9.4-13.1× higher query per second (QPS) and 5.7-8.8× higher cost efficiency compared with SPANN;2) and 2-4.9× higher QPS and 2.3-6.8× higher cost efficiency compared with RUMMY, while guaranteeing low latency and high accuracy. Copyright © 2024, The Authors. All rights reserved.

关键词： Nearest neighbor search

DeepGATGO: A Hierarchical Pretraining-Based Graph-Attention Model for Automatic Protein Function Prediction

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arXiv 2023年

作者： Li, Zihao Jiang, Changkun Li, Jianqiang College of Computer Science and Software Engineering Shenzhen University Shenzhen China National Engineering Lab for Big Data System Computing Technology Shenzhen University Shenzhen China

Automatic protein function prediction (AFP) is classified as a large-scale multi-label classification problem aimed at automating protein enrichment analysis to eliminate the current reliance on labor-intensive wet-lab methods. Currently, popular methods primarily combine protein-related information and Gene Ontology (GO) terms to generate final functional predictions. For example, protein sequences, structural information, and protein-protein interaction networks are integrated as prior knowledge to fuse with GO term embeddings and generate the ultimate prediction results. However, these methods are limited by the difficulty in obtaining structural information or network topology information, as well as the accuracy of such data. Therefore, more and more methods that only use protein sequences for protein function prediction have been proposed, which is a more reliable and computationally cheaper approach. However, the existing methods fail to fully extract feature information from protein sequences or label data because they do not adequately consider the intrinsic characteristics of the data itself. Therefore, we propose a sequence-based hierarchical prediction method, DeepGATGO, which processes protein sequences and GO term labels hierarchically, and utilizes graph attention networks (GATs) and contrastive learning for protein function prediction. Specifically, we compute embeddings of the sequence and label data using pre-trained models to reduce computational costs and improve the embedding accuracy. Then, we use GATs to dynamically extract the structural information of non-Euclidean data, and learn general features of the label dataset with contrastive learning by constructing positive and negative example samples. Experimental results demonstrate that our proposed model is no longer limited to specific biological populations and exhibits better scalability in GO term enrichment analysis on large-scale datasets. Copyright © 2023, The Authors. All rights reser

关键词： Gene Ontology

DarkFed: A data-Free Backdoor Attack in Federated Learning

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arXiv 2024年

作者： Li, Minghui Wan, Wei Ning, Yuxuan Hu, Shengshan Xue, Lulu Zhang, Leo Yu Wang, Yichen School of Software Engineering Huazhong University of Science and Technology China National Engineering Research Center for Big Data Technology and System China Services Computing Technology and System Lab China Hubei Engineering Research Center on Big Data Security China Hubei Key Laboratory of Distributed System Security China School of Cyber Science and Engineering Huazhong University of Science and Technology China School of Computer Science and Technology Huazhong University of Science and Technology China School of Information and Communication Technology Griffith University Australia

Federated learning (FL) has been demonstrated to be susceptible to backdoor attacks. However, existing academic studies on FL backdoor attacks rely on a high proportion of real clients with main task-related data, which is impractical. In the context of real-world industrial scenarios, even the simplest defense suffices to defend against the state-of-the-art attack, 3DFed. A practical FL backdoor attack remains in a nascent stage of development. To bridge this gap, we present DarkFed. Initially, we emulate a series of fake clients, thereby achieving the attacker proportion typical of academic research scenarios. Given that these emulated fake clients lack genuine training data, we further propose a data-free approach to backdoor FL. Specifically, we delve into the feasibility of injecting a backdoor using a shadow dataset. Our exploration reveals that impressive attack performance can be achieved, even when there is a substantial gap between the shadow dataset and the main task dataset. This holds true even when employing synthetic data devoid of any semantic information as the shadow dataset. Subsequently, we strategically construct a series of covert backdoor updates in an optimized manner, mimicking the properties of benign updates, to evade detection by defenses. A substantial body of empirical evidence validates the tangible effectiveness of DarkFed. Copyright © 2024, The Authors. All rights reserved.

关键词： Semantics

A Delay-Driven Iterative Technology Mapping Framework

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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2024年

作者： Liu, Junfeng Ni, Liwei Chen, Lei Li, Xing Zhao, Qinghua Li, Xingquan Ma, Shuai Pengcheng Laboratory Shenzhen China Beihang University School of Computer Science and Engineering Beijing China Huawei Noah's Ark Lab Hong Kong Hong Kong Hefei University School of Artificial Intelligence and Big Data Hefei China

Technology mapping is the pivotal synthesis step that translates abstract logical models into technology-dependent implementations using the designated library, e.g., standard cells for ASICs. The efficient solutions heavily rely on the gate selection guided by estimated delay. However, estimating these delays is sophisticated due to the absence of actual interconnect load and transition time during the mapping. In this paper, we revisit the difficulties of the delay-driven mapping problem and explore three key insights to address these. Inspired by the insights, we first design a structure-Aware load-slew model that integrates input transitions and output loads for gate delay estimations. Benefiting from the model, we propose a delay-iterative framework that progressively reduces the overall circuit delay by further aligning library characteristics with logical network structures. Finally, experiments with 130nm and 7nm libraries show its superiority, which averagely reduces circuit delay by 10% with NLDM, and 6% in delay after P&R, as compared to ABC. © 2024 IEEE.

关键词： Delay circuits

PROMPT-DRIVEN TARGET SPEECH DIARIZATION

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arXiv 2023年

作者： Jiang, Yidi Chen, Zhengyang Tao, Ruijie Deng, Liqun Qian, Yanmin Li, Haizhou National University of Singapore Singapore Shanghai Jiao Tong University China Huawei Noah's Ark Lab China Shenzhen Research Institute of Big Data Shenzhen China School of Data Science The Chinese University of Hong Kong Shenzhen China

We introduce a novel task named 'target speech diarization', which seeks to determine 'when target event occurred' within an audio signal. We devise a neural architecture called Prompt-driven Target Speech Diarization (PTSD), that works with diverse prompts that specify the target speech events of interest. We train and evaluate PTSD using sim2spk, sim3spk and sim4spk datasets, which are derived from the Librispeech. We show that the proposed framework accurately localizes target speech events. Furthermore, our framework exhibits versatility through its impressive performance in three diarization-related tasks: target speaker voice activity detection, overlapped speech detection and gender diarization. In particular, PTSD achieves comparable performance to specialized models across these tasks on both real and simulated data. This work serves as a reference benchmark and provides valuable insights into prompt-driven target speech processing. Copyright © 2023, The Authors. All rights reserved.

关键词： Speech processing

Fast Parallel Recovery for Transactional Stream Processing on Multicores

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Fast Parallel Recovery for Transactional Stream Processing o...

International Conference on data Engineering

作者： Jianjun Zhao Haikun Liu Shuhao Zhang Zhuohui Duan Xiaofei Liao Hai Jin Yu Zhang National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China School of Computer Science and Engineering Nanyang Technological University Singapore

ISBN: (数字)9798350317152

ISBN: (纸本)9798350317169

Transactional stream processing engines (TSPEs) have gained increasing attention due to their capability of processing real-time stream applications with transactional semantics. However, TSPEs remain susceptible to system failures and power outages. Existing TSPEs mainly focus on performance improvement, but still face a significant challenge to guarantee fault tolerance while offering high-performance services. We revisit commonly-used fault tolerance approaches in stream processing and database systems, and find that these approaches do not work well on TSPEs due to complex data dependencies. In this paper, we propose a novel TSPE called MorphStreamR to achieve fast failure recovery while guaranteeing low performance overhead at runtime. The key idea of MorphStreamR is to record intermediate results of resolved dependencies at runtime, and thus eliminate data dependencies to improve task parallelism during failure recovery. MorphStreamR further mitigates the runtime overhead by selectively tracking data dependencies and incorporating workload-aware log commitment. Experimental results show that MorphStreamR can significantly reduce the recovery time by up to 3.1 x while experiencing much less performance slowdown at runtime, compared with other applicable fault tolerance approaches.

关键词： Fault tolerance Runtime Fault tolerant systems Semantics Parallel processing Real-time systems Power system reliability

GraSU: A fast graph update library for fpga-based dynamic graph processing 21

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GraSU: A fast graph update library for fpga-based dynamic gr...

2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2021

作者： Wang, Qinggang Zheng, Long Huang, Yu Yao, Pengcheng Gui, Chuangyi Liao, Xiaofei Jin, Hai Jiang, Wenbin Mao, Fubing National Engineering Research Center for Big Data Technology and System Service Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology China

ISBN: (纸本)9781450382182

Existing FPGA-based graph accelerators, typically designed for static graphs, rarely handle dynamic graphs that often involve substantial graph updates (e.g., edge/node insertion and deletion) over time. In this paper, we aim to fill this gap. The key innovation of this work is to build an FPGA-based dynamic graph accelerator easily from any off-the-shelf static graph accelerator with minimal hardware engineering efforts (rather than from scratch). We observe\em spatial similarity of dynamic graph updates in the sense that most of graph updates get involved with only a small fraction of vertices. We therefore propose an FPGA library, called GraSU, to exploit spatial similarity for fast graph updates. GraSU uses a differential data management, which retains the high-value data (that will be frequently accessed) in the specialized on-chip UltraRAM while the overwhelming majority of low-value ones reside in the off-chip memory. Thus, GraSU can transform most of off-chip communications arising in dynamic graph updates into fast on-chip memory accesses. Our experiences show that GraSU can be easily integrated into existing state-of-the-art static graph accelerators with only 11 lines of code modifications. Our implementation atop AccuGraph using a Xilinx Alveo#8482;\U250 board outperforms two state-of-the-art CPU-based dynamic graph systems, Stinger and Aspen, by an average of 34.24× and 4.42× in terms of update throughput, improving further overall efficiency by 9.80× and 3.07× on average. © 2021 ACM.

关键词： Field programmable gate arrays (FPGA)