Voltage instability of power system comes from increasing load rapidly, and causes bus voltage to drop. When voltage is out of control and it can be voltage collapse. This paper presents the fuzzy modeling approach to...
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Session Initiation Protocol (SIP) [1] is adopted as the main signaling protocol for the IP Multimedia Subsystem (IMS). Large dep.oyment of SIP servers in Next Generation Networks (NGN) requires studying the behavior a...
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This paper presents an approach based on Monte Carlo Simulation (MCS) to solve the Capacitated Vehicle Routing Problem (CVRP) with maximum traveling distance per route and additional costs per service, which introduce...
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As more and more devices are equipped with multiple network interfaces, the multihomed technology is becoming an important technology that can provide more reliable connections against the network failure and better d...
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This paper proposes a field-programmable gate array (FPGA)-based integrated circuit (IC) for computing apparent powers and power factors of power systems. In a nonsinusoidal and unbalanced three-phase power system, th...
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This paper proposes a field-programmable gate array (FPGA)-based integrated circuit (IC) for computing apparent powers and power factors of power systems. In a nonsinusoidal and unbalanced three-phase power system, the calculation of apparent powers and power factors has many definitions. Load characteristics of harmonic and unbalance can not be expressed in the traditional apparent power and power factor, which only consider the fundamental and three-phase balanced sinusoidal conditions. This paper utilizes the FPGA chip to develop the platform to implement the calculation methods of apparent powers and power factors. The proposed design scheme is developed using the very high speed integrated-circuit hardware description language (VHDL), which provides high flexibility and technology indep.ndence. This paper discussed the effective power and power factor, the arithmetic power and power factor, and the fundamental power and power factor. The design of filters for the computation of fundamental frequency components is given. ModelSim is used at first to simulate the calculation of apparent powers and power factors to ensure the accuracy of timing and function. Research results show that the designed chip can compute accurately the apparent powers and power factors considering the effects of nonsinusoidal and unbalanced conditions.
The paper deals with the modelling of riveted joints in aircraft structures with Finite Element Method. Presented works were carried out within Eureka project No. E!3496 called IMPERJA. The goal of the IMPERJA project...
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ISBN:
(纸本)9789048127450
The paper deals with the modelling of riveted joints in aircraft structures with Finite Element Method. Presented works were carried out within Eureka project No. E!3496 called IMPERJA. The goal of the IMPERJA project is to increase the fatigue life of riveted joints, which will lead to an increase of the aircraft service life, a smaller number of inspections and lower operation costs of an aircraft. The project assumed FEM modelling of the operating aircraft's structure at three different complexity levels, namely considering the complete structure, a structural detail and a single riveted joint. The paper presents analyses of various rivet models and calculations of a structure and a riveted joint. In the first part examples of various models, at global and local level, were presented and usefulness of them was discussed, influence of the following simplification was analysed;• neglection of rivets in a model (elements are jointed continuously) • rivet as a rigid element (MPC) • neglection of contact phenomenon • neglection of secondary bending • neglection of residual stresses after riveting process The basis of the analysis was the asymmetric butt joint model with 14 rivets. The model which took into account secondary bending and contact phenomenon was analysed as well. The method of modelling residual stresses with temperature and thermal coefficient was used. In the second part, the example of analysis of riveted joint was demonstrated for a wing of PZL M28 Skytruck aircraft. It's is a twin-engine, high-wing, cantilever monoplane of all-metal structure with maximum take-off and landing weight 7500 kg. A submodeling technique was used there. At first, part of the wing model, based on a CAD model, was built. It includes 7 ribs and 6 bulkheads between them. Dimensions of the model eliminate stress perturbation, connected with boundary conditions, in the area near the middle rib. It was a shell model. The boundary conditions were taken on a basis of operation data
In the present paper, the analytic mathematical model of a test case central heating system is developed in the form of a nonlinear neutral time delay model with time varying delay which in turn is simplified to a neu...
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In the present paper, the analytic mathematical model of a test case central heating system is developed in the form of a nonlinear neutral time delay model with time varying delay which in turn is simplified to a neutral time delay model with constant time delay. In the process it is shown that the influence of the delay is significant, thus its incorporation to the model is of high importance while the constant delay approximation imposes only small error. A PID controller is derived to control the temperature of a room, which is modeled as a first order differential equation. The controller parameters are evaluated using a metaheuristic algorithm.
An important approach to reduce power dissipation is reducing the number of instructions executed by the processor. To achieve this goal, this paper introduces a novel instruction scheduling algorithm that executes an...
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ISBN:
(纸本)9781605581095
An important approach to reduce power dissipation is reducing the number of instructions executed by the processor. To achieve this goal, this paper introduces a novel instruction scheduling algorithm that executes an instruction only when its result is required by another instruction. In this manner, it not only does not execute useless instructions, but also reduces the number of instructions executed after a mispredicted branch. The cost of the extra hardware is 161 bytes for 128 instruction window size. Measurements done using SPEC CPU 2000 benchmarks show that the average number of executed instructions is reduced by 13.5% while the average IPC is not affected. Copyright 2008 ACM.
An important approach to reduce power dissipation is reducing the number of instructions executed by the processor. To achieve this goal, this paper introduces a novel instruction scheduling algorithm that executes an...
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An important approach to reduce power dissipation is reducing the number of instructions executed by the processor. To achieve this goal, this paper introduces a novel instruction scheduling algorithm that executes an instruction only when its result is required by another instruction. In this manner, it not only does not execute useless instructions, but also reduces the number of instructions executed after a mispredicted branch. The cost of the extra hardware is 161 bytes for 128 instruction window size. Measurements done using SPEC CPU 2000 benchmarks show that the average number of executed instructions is reduced by 13.5% while the average IPC is not affected.
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