With increasing complexity of 3D geometric models and growing demand for advanced modeling functionality, significant effort is being devoted to the design of efficient, reliable, and scalable algorithms for digital g...
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ISBN:
(纸本)953184089X
With increasing complexity of 3D geometric models and growing demand for advanced modeling functionality, significant effort is being devoted to the design of efficient, reliable, and scalable algorithms for digital geometry processing. We introduce a multi-scale surface representation that enables sophisticated editing functionality at different approximation levels, using the concept of scale-space. The key issue is the interconnection between successive levels in the hierarchy. We use a fairing operator-a geometric low-pass filter to generate successively smoother approximation levels of a given input surface, and use a decomposition operator to encode each level relative to the next smoother level using normal displacements to ensure intuitive detail preservation. As a result, users can edit the surface at different approximation levels to perform coarse-scale edits on the whole model as well as very localized modifications on the surface detail.
For automatic or context-aware systems a major issue is user trust, which is to a large extent determined by system reliability. For systems based on sensor input which are inherently uncertain or even uncomplete ther...
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ISBN:
(纸本)1595930892
For automatic or context-aware systems a major issue is user trust, which is to a large extent determined by system reliability. For systems based on sensor input which are inherently uncertain or even uncomplete there is little hope that they will ever be perfectly reliable. In this paper we test the hypothesis if explicitly displaying the current confidence of the system increases the usability of such systems. For the example of a context-aware mobile phone, the experiments show that displaying confidence information increases the user's trust in the system. Copyright 2005 ACM.
The high power consumption of a processor is becoming a critical problem for both battery-powered devices and highperformance computers. Any reductions in the operating frequency of the processor and its supply voltag...
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ISBN:
(纸本)0889864640
The high power consumption of a processor is becoming a critical problem for both battery-powered devices and highperformance computers. Any reductions in the operating frequency of the processor and its supply voltage can lead to significant savings in energy consumption (and heat dissipation) but cause longer execution times. In this paper, the problem of performance-lossless software energy reduction for variable-voltage processors is introduced based on the analysis of voltage scaling characteristic. We discuss compile-time energy reduction techniques which identifies voltage scaling opportunities to achieve energy savings without performance loss. The problem is formulated in terms of mixed integer linear programming formulation, which can sufficiently exploit the difference of voltage scaling characteristics of subtasks. The model can be built by using program profiling results or some necessary parameters, and the heuristic algorithm is presented. Experiment results demonstrate the effectiveness of our strategy by using known benchmark programs on a dedicated processor simulator. Finally the performance of the heuristic algorithm is studied and the impact of the transition overheads is analyzed as well.
Instruction queues consume a significant amount of power in a high-performance processor. The wakeup logic delay is also a critical timing parameter. This paper compares a commonly used CAM-based instruction queue org...
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ISBN:
(纸本)0769524516
Instruction queues consume a significant amount of power in a high-performance processor. The wakeup logic delay is also a critical timing parameter. This paper compares a commonly used CAM-based instruction queue organization with a new pointer-based design for delay and energy efficiency. A design and pre-layout of all critical structures in 70nm technology is performed for both organizations. The pointer-based design is shown to use 10 to 15 times less power than the CAM-based design, dep.nding on queue size, for a 4-wide issue, 5GHz processor. The results also demonstrate the importance of evaluating all steps of instruction queue access: allocation, issue and wakeup rather than wakeup alone, especially for power consumption.
The new field of testing of timed-IUT (Implementation Under Test with time constraints) is rapidly evolving, with new and extended test generation methods using timed automata. Most methods, however, key their algorit...
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ISBN:
(纸本)9781932415537
The new field of testing of timed-IUT (Implementation Under Test with time constraints) is rapidly evolving, with new and extended test generation methods using timed automata. Most methods, however, key their algorithms towards transformation of a timed-IUT into a regular, un-timed IUT;thus, avoiding the need of redefining well known test generation algorithms. In this paper we wish to demonstrate that as far as the well known synchronizing sequence problem, it is preferable to adapt the standard algorithm to meet the special needs of a timed-IUT, sidestepping a costly transformation. We propose a new method of generating a timed- synchronizing sequence, which allows direct testing of a timed-IUT. An example is used to show the relevance of this method.
In the environment of distance learning, most of current systems available are unable to share the experience of developing material content and can not provide subsequent learning result analysis. In order to overcom...
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Maximizing lifetime throughput, i.e. increasing the total number of produced components in a pre-existing production line, is a continuous and never-ending process in industry. In order to attain a high lifetime throu...
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Security engineering deals with modeling, analysis, and implementation of complex security mechanisms. The dynamic nature of such mechanisms makes it difficult to anticipate undesirable emergent behavior. In this work...
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The purpose of this paper is to design and implement the remote control lab using PDA (Personal Digital Assistant). This system integrates different fields of technology. They are Internet control, mobile control, and...
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The next evolutionary step in enhancing video communication fidelity over wired and wireless networks is taken by adding scene dep.h. Three-dimensional video using integral imaging (II) based capture and display subsy...
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The next evolutionary step in enhancing video communication fidelity over wired and wireless networks is taken by adding scene dep.h. Three-dimensional video using integral imaging (II) based capture and display subsystems has shown promising results and is now in the early prototype stage. We have created a ray-tracing based interactive simulation environment to generate II video sequences as a way to assist in the development, evaluation and quick adoption of these new emerging techniques into the whole communication chain. A generic II description model is also proposed as the base for the simulation environment. This description model facilitate optically accurate II rendering using MegaPOV, a customized version of the open-source ray tracing package POV-Ray. By using MegaPOV as a rendering engine the simulation environment fully incorporate the scene description language of POV-Ray to exactly define a virtual scene. Generation and comparability of II video sequences adhering to different II-techniques is thereby greatly assisted, compared to experimental research. The initial development of the simulation environment is focused on generating and visualizing II source material adhering to the optical properties of different II-techniques published in the literature. Both temporally static as well as dynamic systems are considered. The simulation environment's potential for easy dep.oyment of integral imaging video sequences adhering to different II-techniques is demonstrated.
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