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Comments on "Analysis of self-stabilizing clock synchronization by means of stochastic Petri nets"

IEEE Transactions on computers 1994年第12期43卷 1453-1456页

作者： G. Ciardo C. Lindemann Department of Computer Science College of William and Mary Williamsburg VA USA GMD Institute for Computer Architecture and Software Technology (GMD-FIRST) Technische Universitat Berlin Berlin Germany

We point out some errors in the combinatorial approach for the steady-state analysis of a deterministic and stochastic Petri net (DSPN) presented by M. Lu, D. Zhang, and T. Murata (1990). However, the methodology for analyzing the self-stability of fault-tolerant clock synchronisation (FCS) systems introduced in that paper is applicable for FCS systems with many clocking modules, even if the combinatorial approach is not valid. This is due to the progress in improving the efficiency of the DSPN solution algorithm made in recent years. We show that the explicit computation of the steady-state solution of the DSPN can be performed with reasonable computational effort on a modern workstation by the software package DSPNexpress.< >

关键词： Clocks Synchronization Stochastic processes Petri nets Electromagnetic compatibility Stochastic systems Steady-state Fault tolerant systems Probability distribution Performance analysis

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Nonnumeric search results on the EM-4 distributed-memory multiprocessor 94

Nonnumeric search results on the EM-4 distributed-memory mul...

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Supercomputing Conference

作者： A. Sohn M. Sato S. Sakai Y. Kodama Y. Yamaguchi Computer and Information Science Department New Jersey Institute of Technology Newark NJ USA Computer Architecture Section Electro Technical Laboratory Tsukuba Ibaraki Japan

ISBN: (纸本)9780818666056

Numeric scientific problems have been the main focus of supercomputing as their numerous implementations on various multiprocessors indicate. Nonnumeric problems on the other hand have received very little attention for parallel implementation due to their irregular behaviors and a large amount of resource usage. This report presents our experiences implementing difficult nonnumeric problems on the EM-4 multiprocessor, believing that supercomputers should also be able to effectively execute nonnumeric problems if they are to be considered 'supercomputers'. We selected two typical search problems, the Eight-Puzzle and the Tower-of-Hanoi. Two parallel search techniques we used to implement the search problems, unidirectional and bidirectional heuristic search. A total of eight different programs have been implemented on the EM-4 multiprocessor with realistic problem sizes. Execution results demonstrate that the parallel bidirectional heuristic search can solve the tree depth 20 to 40 of the Eight-Puzzle in an optimal or near optimal number of iterations in less than two seconds, and is highly scalable as it gives over 40-fold speedup for both problems on 80 processors.< >

关键词： Concurrent computing Search problems Supercomputers Artificial intelligence Runtime Information science computer architecture Laboratories Buildings Parallel machines

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A minimal window system architecture for distributed environment

A minimal window system architecture for distributed environ...

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EUROMICRO Conference

作者： Jinsoo Yoon Yigal Hoffner Kilnam Chon Department of Computer Science Korea Advanced Institute of Science and Technology Daejeon South Korea Architecture and Project Management Limited Cambridge UK

ISBN: (纸本)0818664304

In this paper, we assert that window system plays a fundamental role in supporting multiple interaction channels distributed over a finite number of I/O devices. For historical as well as technical reasons, window systems usually deal with the issues which concern distribution of window system components, heterogeneity, user interface, multimedia, and distributed application support. We propose a minimal window system architecture which allows separate treatment of these issues. The minimal window-system architecture serves as a basis for discussing the influence of these issues on each other. Also in the viewpoint of the transparency facilities inherent in a distributed system, a window system model based on the minimal window system is proposed for the distributed environment.< >

关键词： Application software computer architecture User interfaces Distributed computing Multimedia systems Workstations computer science Project management Operating systems computer networks

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Optimization Of Critical Paths In Circuits With Level-sensitive Latches 94

Optimization Of Critical Paths In Circuits With Level-sensit...

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IEEE International Conference on computer-Aided Design

作者： T.M. Burks K.A. Sakallah Systems Technology and Architecture Division IBM Corporation Austin TX USA Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor MI USA

ISBN: (纸本)9780897916905

A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a sufficient set of constraints to ensure that, when all slacks are non-negative, the corresponding circuit will be free of late signal timing problems. Cycle stealing is directly permitted by the formulation. However, moderate restrictions may be necessary to ensure that the timing constraint graph is acyclic. Forcing the constraint graph to be acyclic allows a broad range of existing optimization algorithms to be easily extended to better optimize circuits with level-sensitive latches. We describe the extension of two such algorithms, both of which attempt to solve the problem of selecting parts from a library to minimize area subject to a cycle time constraint.

关键词： Latches Delay effects Flip-flops Costs Timing Utility programs Combinational circuits Sequential circuits Circuit analysis Libraries

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Parallel bidirectional heuristic search on the EM-4 multiprocessor

Parallel bidirectional heuristic search on the EM-4 multipro...

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International Symposium on Parallel and Distributed Processing (IPDPS)

Solving search problems takes a large amount of computational resources both in terms of execution time and memory usage. This report presents experimental results of Parallel Bidirectional Heuristic Search (PBiHS) on the 80-processor EM-4 multithreaded data-flow multiprocessor. The PBiHS searches from two directions in parallel while search in each direction is also performed in parallel. Important data structures are distributed to all processors to help reduce the execution time of realistic problem sizes down to a few seconds or less. We implement two search problems, the Eight Puzzle and the Tower of Hanoi, and execute on the target multiprocessor. Execution results demonstrate that the Parallel Bidirectional Heuristic Search can solve the tree depth 20-40 of the Eight-Puzzle and the 3-9 disks of the Tower of Hanoi in an optimal or near optimal number of iterations in less than two seconds, is highly scalable as it gives over 40-fold speedup on 80 processors, and yields on the average 10-fold improvement over unidirectional search for the 8-Puzzle while generating a far less number of nodes.< >

关键词： Search problems Poles and towers Artificial intelligence Concurrent computing Data structures Parallel processing Information science computer architecture Laboratories Buildings

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Predicting the drape of woven cloth using interacting particles 94

Predicting the drape of woven cloth using interacting partic...

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21st Annual Conference on computer Graphics and Interactive Techniques, SIGGRAPH 1994

作者： Breen, David E. House, Donald H. Wozny, Michael J. European Computer-Industry Research Centre Design Research Center Rensselaer Polytechnic Institute Arabellastrasse 17 MunichD-81925 Germany Visualization Laboratory Texas A and M University Department of Computer Science Williams College College of Architecture College StationTX77843-3137 United States National Institute of Standards and Technology Design Research Center Rensselaer Polytechnic Institute MEL 220/B322 GaithersburgMD20899 United States

ISBN: (纸本)0897916670

We demonstrate a physically-based technique for predicting the drape of a wide variety of woven fabrics. The approach exploits a theoretical model that explicitly represents the microstructure of woven cloth with interacting particles, rather than utilizing a continuum approximation. By testing a cloth sample in a Kawabata fabric testing device, we obtain data that is used to tune the model's energy functions, so that it reproduces the draping behavior of the original material. Photographs, comparing the drape of actual cloth with visualizations of simulation results, show that we are able to reliably model the unique large-scale draping characteristics of distinctly different fabric types. © ACM 1994.

关键词： Weaving

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A NEW TOKEN RING PROTOCOL AND ITS PERFORMANCE FOR SINGLE AND DUAL RING LAN SYSTEMS

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INTERNATIONAL JOURNAL OF COMMUNICATION SYSTEMS 1994年第3期7卷 247-260页

作者： OBAIDAT, MS Department of Electrical Engineering City University of New York The City College Convent Ave. at 140th Street New York NY 10031 U.S.A. Mohammad S. Obaidat:received his B.S.E.E. with distinction from Aleppo University and M.S.E.E. and Ph.D. in Electrical and Computer Engineering from The Ohio State University Columbus Ohio. His previous posts were in the Departments of Electrical and Computer Engineering at Jordan University of Science and Technology and the University of Missouri. At present he is an Associate Professor in the Department of Electrical Engineering at The City College of The City University of New York. Dr. Obaidat is an Associate Editor of theIEEE Transactions on Systems Man and Cybernetics and The Society for Computer Simulation monthly journalSIMULATION.Dr. Obaidat is on the editorial boards ofIEEE Transactions on Instrumentation and measurementandACM Applied Computing Review.He has guest edited a special issue of theSimulation Journalon high speed networking and another issue on high performance computing. He is listed on who is who in the East of USA. Dr. Obaidat has published over 90 technical refereed articles. His research interests are high performance computing/computers performance evaluation of computer systems and networks parallel computing: architecture and algorithms neural networks computer networks pattern recognition image processing and instrumentation and measurement.

This paper presents a new protocol for token ring local computer networks and its performance for single and dual ring networks using simulation modelling. The proposed protocol is a modification of the IEEE 802.5 token ring standard. In this protocol, a station can start transmission if it receives a free token or a data packet passing its interface logic. Idle stations are skipped whenever there is at least one station that has a ready packet to transmit. This is achieved by using two of the reserved bits in the frame status (FS) field. The bits used are called transmission reservation bits (TR-bits). The TR-bits are reset by the sending station and set by the first station that has data to transmit during the round trip of the associated packet along the ring. It is found that the proposed modified token ring (MTR) protocol provides better throughout and delay performance for both the single and dual ring networks. The reduction in mean delay of the MTR as compared to the standard token ring (STR) reaches about 45 per cent under heavy traffic conditions. Moreover, it is found that the performance of the MTR decreases as the packet size increases but remains higher than the corresponding performance of the STR for both the single and dual ring networks. The MTR provides a maximum throughput improvement of about 6 per cent over the STR for both dual and single ring cases. Finally, the proposed protocol (MTR) is easy to implement, with no extra hardware and has low cost/performance characteristics.

关键词： TOKEN RING LAN PROTOCOLS PERFORMANCE EVALUATION DISCRETE-EVENT SIMULATION

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USING VIRTUAL ENVIRONMENTS IN THE DESIGN OF SHIPS

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NAVAL ENGINEERS JOURNAL 1994年第3期106卷 91-106页

作者： JONS, OP RYAN, JC JONES, GW Otto P. Jons:received a Diplom Ing. in shipbuilding from the Technical University of Hanover W. Germany and an MS in naval architecture and marine engineering from MIT. He then joined Litton Ship Systems where he was responsible for the preliminary design of the DD-963 hull structure and then for ship system integration as manager LHA ship systems engineering department. From 1972 to 1974 he was the principal research scientist at Hydronautics. In 1974 as technical director he helped establish the Crystal City office of Designers and Planners. Mr. Jons was one of the co-founders of Advanced Marine Enterprises Inc. in 1976 where he serves as corporate vice president engineering. J. Christopher Ryan:earned his bachelors and masters degrees in naval architecture from Webb Institute and MIT respectively. He spent three years at the advanced marine technology division of Litton Industries working on the DD-963 class ship design and related computer aided design projects. He subsequently went to the Navy Department concentrating on early stage design of surface combatants for twelve years including work on the FFG-7 Sea Control Ship CSGN and CVV aircraft carrier projects. He then shifted focus and became the Technical Director for the Computer Supported Design Program in NavSea for five years. Mr. Ryan has served in several supervisory positions within the Ship Design Group in NavSea since that time. He is currently the director of the future ship concepts division. Gary W. Jones:graduated from the University of Tennessee in 1971 with a BS in mechanical engineering and followed up with graduate work at George Washington University and the University of Maryland. Mr. Jones was with the Naval Sea Systems Command from 1971 until 1988 where he was a naval architect in the submarine section of the hull form design division. In 1988 he was detailed to the Defense Advanced Research Projects Agency (DARPA) where he became the program manager for the advanced submarine technology program's hydrodynamic hydroac

A major contributor to the expense and length of time to design, build, and test new systems has been the need to build and test hardware prototypes to determine their effectiveness in meeting operational requirements. Recent and dramatic advances in computer simulation technologies hold forth the promise of revolutionizing design and acquisition strategies by providing the means to validate end users' requirements prior to hardware construction. By designing and operationally testing virtual prototypes in a virtual environment, these technologies will soon offer naval architects the ability to build and launch ships in computer-based cyberspace in lieu of the shipbuilder's ways. The authors of this paper provide the background for these developments, explore the significance and ramifications of these technologies to the current process of ship and system design, outline challenges lying ahead, and present their vision and recommendations for future development.

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White Paper: Naval Modeling and Simulation: Charting a Path to the User

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Naval Engineers Journal 1994年第4期106卷 209-211页

作者： Ricketts, J. Bruce THE AUTHOR:received his B.S. in naval architecture from the U.S. Naval Academy in J 983. After graduation Mr. Ricketts served eight years active duty service. His tours included Main Propulsion Assistant and Navigation Assistant aboard USS Caron (DD-970) Fire Control Officer and Chief Engineer aboard USS Ticonderoga (CG-47) and Weapons Officer and Combat Systems Officer aboard USS Philippine Sea (CG-58). He also performed additional duty at the David Taylor Model Basin in support of ship trials and future naval force analysis studies. He remains in the Naval Reserves where he is a Lieutenant Commander with NRL SCI & TECH 206. Mr. Ricketts currently works as a Research and Design Engineer for Analysis and Technology Inc. in support of computer analysis work being performed at the Carderock Division Naval Surface Warfare Center and is a member of ASNE SNAME and the Surface Navy Association. The views expressed herein are the personal opinions of the author and are not necessarily the official views of the Department of Defense or any military department thereof.

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Autonomous systems demand new computer system architectures and new development strategies

Autonomous systems demand new computer system architectures ...

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International Conference on Industrial Electronics, Control and Instrumentation

作者： B. Svensson P.-A. Wiberg Department of Computer Engineering Chalmers University of Technology Goteborg Sweden Centre for Computer Architecture Halmstad University Halmstad Sweden

This paper addresses two related problem areas with regard to autonomous systems, namely (i) appropriate architectures of the embedded computing systems, and (ii) appropriate system development strategies and tools. Adaptivity and learning are identified as important characteristics of autonomous systems. A modular architecture capable of executing multiple-neural-network systems with real-time learning and control abilities is described. This architecture is based on distributed nodes of massively parallel processing elements communicating by means of a scalable high bandwidth medium. The nodes and the medium operate in a time-deterministic manner. Further, it is argued that autonomous systems must be developed through a process of system alteration-change-orientation rather than the phase-oriented specify-design-implement-and-test model which is common today. A tool which, in cooperation with the system architecture, supports this paradigm is described. Required functions of the development tool are, e.g., inspection and visualization of data, change of software and hardware functions, and ability to cope with changes in the mechanical structure, including sensors and actuators, all while the autonomous system is in action. A graphical, interactive design environment that meets these demands is outlined.< >

关键词： computer architecture Embedded computing Real time systems Control systems Parallel processing Bandwidth Inspection Data visualization Software tools Hardware

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