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Biosensors: Label-Free and Regenerative Electrochemical Microfluidic Biosensors for Continual Monitoring of Cell Secretomes (Adv. Sci. 5/2017)

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Advanced Science 2017年第5期4卷 n/a-n/a页

作者： Su Ryon Shin Tugba Kilic Yu Shrike Zhang Huseyin Avci Ning Hu Duckjin Kim Cristina Branco Julio Aleman Solange Massa Antonia Silvestri Jian Kang Anna Desalvo Mohammed Abdullah Hussaini Su-Kyoung Chae Alessandro Polini Nupura Bhise Mohammad Asif Hussain HeaYeon Lee Mehmet R. Dokmeci Ali Khademhosseini Biomaterials Innovation Research Center Department of Medicine Brigham and Women's Hospital Harvard Medical School Boston MA 02139 USA Harvard-MIT Division of Health Sciences and Technology Massachusetts Institute of Technology Cambridge MA 02139 USA Izmir Katip Celebi University Faculty of Engineering and Architecture Department of Biomedical Engineering 35620 Izmir Turkey Department of Metallurgical and Materials Engineering Faculty of Engineering and Architecture Eskisehir Osmangazi University 26040 Eskisehir Turkey Biosensor National Special Laboratory Key Laboratory of Biomedical Engineering of Ministry of Education Department of Biomedical Engineering Zhejiang University Hangzhou Zhejiang 310027 P. R. China Politecnico di Torino Department of Electronics and Telecommunications (DET) Corso Duca degli Abruzzi 24 10129 Torino Italy Programa de Doctorado en Biomedicina Universidad de los Andes Santiago 7620001 Chile Department of Electrical and Computer Engineering King Abdulaziz University Jeddah 21589 Saudi Arabia Department of Pharmaceutical Sciences Northeastern University Boston MA 02115 USA Department of Bioindustrial Technologies College of Animal Bioscience and Technology Konkuk University Hwayang-dong Kwangjin-gu Seoul 05029 Republic of Korea Department of Physics King Abdulaziz University Jeddah 21569 Saudi Arabia

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On-Chip Generating FPGA Configuration Bitstreams to Reduce Applycation-Independent Test Time

On-Chip Generating FPGA Configuration Bitstreams to Reduce A...

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The 4th International Workshop on Advanced Technologies in Programmable System on Chip(第四届片上可编程系统前沿技术研讨会)

作者： Da Wang Fei Wang Paolo Ienne Yu Hu Dongrui Fan Haigang Yang Key Laboratory of Computer System and Architecture Institute of Computing TechnologyCASBeijing100190China System on Programmable Chip Research DepartmentInstitute of ElectronicsCASBeijing100190China Processor Architecture LaboratoryEPFLLausanneSwitzerland

FPGA application independent test is very time-consuming due to repetitively loading of test configuration bitstreams into the FPGA and applying test *** shows that over 95%of FPGA application independent test time is spent on loading the test configuration ***,reducing the number of loading times could significantly reduce the FPGA test *** this paper,a new approach which can significantly reduce the FPGA test time will be *** this new approach,a configuration SRAM routing strategy is used first to enhance the correlation of the test bitstream configurations,then,on-chip test configuration generation structures are designed to transform a test bitstream configuration into other ones within limited *** results show that the proposed technique can at least reduce the configuration loading time by 81%,while getting 100%test *** hardware overhead is less than 1.2%upon the whole chip without any performance penalty.

关键词： FPGA test test configuration generation design-for-testability

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IEC 61850 GOOSE transfer time measurement in development stage

IEC 61850 GOOSE transfer time measurement in development sta...

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2013 IEEE 22nd International Symposium on Industrial electronics, ISIE 2013

作者： Gonzalez-Redondo, Miguel J. Moreno-Munoz, Antonio Pallares-Lopez, Victor Real-Calvo, Rafael J. Lopez, Manuel A. Ortiz Moreno-Garcia, Isabel M. Department of Computer Architecture Electronics and Electronics Technology University of Córdoba Córdoba Spain

ISBN: (纸本)9781467351942

IEC 61850 is one of the crucial standards within the Smart Grid concept. For performance evaluation of communications between Intelligent Electronic Devices (IED) in Power Utility Automation, the standard defines the Transfer Time. Measurement of such parameter is not available for end user, but in development stage it is possible. Third party products can be used to reduce development time of IEC 61850 compliant devices. An initial performance evaluation of these products can be achieved through the measurement of the Transfer Time. © 2013 IEEE.

关键词： Thermoelectric equipment

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Improved model free learning control method for nonlinear system

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Journal of Information and Computational Science 2013年第6期10卷 1797-1803页

作者： Song, Yang Lin, Yan Zhang, Mingxia Qin, Pinle Department of Nave Architecture and Ocean Engineering Dalian University of Technology Dalian 116024 China School of Electronics and Computer Science and Technology North University of China Taiyuan 030051 China

Based on the basic theory and deficient points of Model-free Learning Adaptive Control (MFLAC) method, the Multi-innovation (MI) theory and Particle Swarm Optimization (PSO) algorithm were introduced into the improved measures. The simulation results show that the proposed controller has faster convergence rate and better tracking performance. The improved method, MI-MFLAC based on PSO, has the advantage of simplicity and effectiveness. The method is easy to implement for nonlinear system. Copyright © 2013 Binary Information Press.

关键词： Nonlinear systems

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Automatic complex instruction identification for efficient application mapping onto ASIPs

Automatic complex instruction identification for efficient a...

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IEEE Latin American Symposium on Circuits and Systems (LASCAS)

作者： Alexandre S. Nery Nadia Nedjah Felipe M. G. França Lech Jozwiak Henk Corporaal Department of Electrical Engineering - Electronic Systems Eindhoven University of Technology The Netherlands Department of Electronics Engineering and Telecommunications Universidade do Estado do Rio de Janeiro Brazil LAM - Computer Architecture and Microelectronics Laboratory Universidade Federal do Rio de Janeiro Brazil

Instruction Set Customization is a well-known technique to enhance the performance and efficiency of Application-Specific Processors (ASIPs). An extensive application profiling can indicate which parts of a given application, or class of applications, are most frequently executed, enabling the implementation of such frequently executed parts in hardware as custom instructions. However, a naive ad hoc instruction set customization process may identify and select poor instruction extension candidates, which may not result in a significantly improved performance with low circuit-area and energy footprints. In this paper we propose and discuss an efficient instruction set customization method and automatic tool, which exploit the maximal common subgraphs (common operation patterns) of the most frequently executed basic blocks of a given application. The speed results from our tool for a VLIW ASIP are provided for a set of benchmark applications. The average execution time reduction ranges from 30% to 40%, with only a few custom instructions.

关键词： VLIW Hardware Ray tracing Program processors Registers Libraries Convolution

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Wikipedia articles representation with matrix'u

Wikipedia articles representation with matrix'u

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9th International Conference on Distributed Computing and Internet technology, ICDCIT 2013

作者： Szymański, Julian Department of Computer Systems Architecture Faculty of Electronics Telecommunications and Informatics Gdańsk University of Technology Poland

ISBN: (纸本)9783642360701

In the article we evaluate different text representation methods used for a task of Wikipedia articles categorization. We present the Matrix'u application used for creating computational datasets of Wikipedia articles. The representations have been evaluated with SVM classifiers used for reconstruction human made categories. © 2013 Springer-Verlag Berlin Heidelberg.

关键词： Text processing

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Ranking images using customized fuzzy dominant color descriptors

Ranking images using customized fuzzy dominant color descrip...

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10th International Conference on Flexible Query-Answering Systems, FQAS 2013

作者： Soto-Hidalgo, J.M. Chamorro-Martínez, J. Martínez-Jiménez, P. Sánchez, Daniel Department of Computer Architecture Electronics and Electronic Technology University of Córdoba Spain Department of Computer Science and Artificial Intelligence University of Granada Spain European Centre for Soft Computing Mieres Asturias Spain

ISBN: (纸本)9783642407680

In this paper we describe an approach for defining customized color descriptors for image retrieval. In particular, a customized fuzzy dominant color descriptor is proposed on the basis of a finite collection of fuzzy colors designed specifically for a certain user. Fuzzy colors modeling the semantics of a color name are defined as fuzzy subsets of colors on an ordinary color space, filling the semantic gap between the color representation in computers and the subjective human perception. The design of fuzzy colors is based on a collection of color names and corresponding crisp representatives provided by the user. The descriptor is defined as a fuzzy set over the customized fuzzy colors (i.e. a level-2 fuzzy set), taking into account the imprecise concept that is modelled, in which membership degrees represent the dominance of each color. The dominance of each fuzzy color is calculated on the basis of a fuzzy quantifier representing the notion of dominance, and a fuzzy histogram representing as a fuzzy quantity the percentage of pixels that match each fuzzy color. The obtained descriptor can be employed in a large amount of applications. We illustrate the usefulness of the descriptor by a particular application in image retrieval. © 2013 Springer-Verlag Berlin Heidelberg.

关键词： Color

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IEC 61850 GOOSE transfer time measurement in development stage

IEC 61850 GOOSE transfer time measurement in development sta...

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IEEE International Symposium on Industrial electronics (ISIE)

作者： Miguel J. González-Redondo Antonio Moreno-Muñoz Víctor Pallarés-López Rafael J. Real-Calvo Manuel A. Ortíz López Isabel M. Moreno-García Department of Computer Architecture Electronics and Electronics Technology University of Córdoba Cordoba Spain

ISBN: (纸本)9781467351942

关键词： IEC standards Time measurement Performance evaluation Servers Substations Software

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Very short term pitch angle optimization in wind turbines: A machine learning approach

Very short term pitch angle optimization in wind turbines: A...

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2013 4th International Conference on Power Engineering, Energy and Electrical Drives, POWERENG 2013

作者： Yesilbudak, Mehmet Kabalci, Ersan Sagiroglu, Seref Colak, Ilhami Department of Electronics and Automation Vocational College of Haci Bektas Veli Nevsehir University Nevsehir Turkey Department of Electrical and Electronics Engineering Faculty of Engineering and Architecture Nevsehir University Nevsehir Turkey Department of Computer Engineering Faculty of Engineering Gazi University Ankara Turkey Department of Electrical and Electronics Engineering Faculty of Technology Gazi University Ankara Turkey

ISBN: (纸本)9781467363921

This paper proposes a pitch angle forecasting model based on the k-nearest neighbor classification. Air temperature, atmosphere pressure, wind direction, wind speed, rotor speed and wind power parameters were represented as a 6-dimensional attribute tuple in the forecasting model. Euclidean, Manhattan and Minkowski distance metrics for measuring the proximity between training and test tuples, mean absolute, mean absolute percentage, and normalized root mean square error metrics for measuring the forecasting accuracy were embedded into the forecasting model. The k-nearest neighbor classifier with Manhattan distance metric for k=1 achieved MAE, MAPE and NRMSE as 0.001°, 0.245% and 0.324%, respectively as the best forecasting accuracy. However, as the worst forecasting accuracy, MAE, MAPE and NRMSE were achieved as 0.015°, 3.236% and 2.613%, respectively for Minkowski distance metric and k=10. © 2013 IEEE.

关键词： Wind turbines

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A reconfigurable ray-tracing Multi-Processor SoC with hardware replication-aware instruction set extension

A reconfigurable ray-tracing Multi-Processor SoC with hardwa...

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13th International Conference on Algorithms and architectures for Parallel Processing, ICA3PP 2013

作者： Nery, Alexandre S. Nedjah, Nadia França, Felipe M.G. Jozwiak, Lech Corporaal, Henk LAM - Computer Architecture and Microeletronics Laboratory Systems Engineering and Computer Science Program COPPE Federal University of Rio de Janeiro Brazil Department of Electronics Engineering and Telecommunications Faculty of Engineering State University of Rio de Janeiro Brazil Department of Electrical Engineering - Electronic Systems Eindhoven University of Technology Netherlands

ISBN: (纸本)9783319038582

Application code and processor parallelization, together with instruction set customization, are the most common and effective ways to enhance the performance and efficiency of application-specific processors (ASIPs). Both the effective code parallelization and data/task parallelism exploitation, as well as effective instruction set customization, enable an ASIP to achieve a significant performance improvement using limited extra hardware resources. However, a naive parallelization or instruction set customization may not result in the required performance improvement, leading to a waste of computing and energy resources. Therefore, when performing parallelization or custom instruction selection, complex tradeoffs between processing speed, circuit area and power consumption must be closely observed. In this paper, we propose and discuss an efficient ASIP-based Multi-Processor System-on-a-Chip (MPSoC) design for ray-tracing, exploiting application parallelism and hardware replication-aware instruction set customization. Without hardware sharing among the custom instructions units, the proposed parallel ray-tracer MPSoC design with custom instructions achieves 77% speed up in comparison to a single microprocessor design with the default instruction set. However, with the replication-aware instruction set customization, the speed up increases to 81%. © Springer International Publishing Switzerland 2013.

关键词： Integrated circuit design

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