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作者： Corredor, John Moure, Juan Carlos Rexachs, Dolores Franco, Daniel Luque, Emilio Universitat Autonoma de Barcelona Computer Architecture and Operating System Department Barcelona Spain

A current challenge for computer users is to fully exploit performance of new Multicore systems. We propose a methodology for students in computational science to analyze the effect of memory hierarchy on application performance. The analysis is proposed in a experimental environment consisting of different systems with different configurations of the memory hierarchy. The new Multicore systems put tremendous pressure on memory hierarchy systems. The pressure is because, unfortunately, the effectiveness of the computing power offered by Multicore, is affected by the data communications inter-chip and off-chip to the memory hierarchy, leading to significant problems in performance for many parallel applications. In the scope of computer science, it is important that students understand these problems. This methodology was successfully applied to students, where they acquired a significant improvement in their parallel application metrics assessment as was demonstrated in our evaluation.

关键词： Students

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Predicting parallel applications performance using signatures: The workload effect

Predicting parallel applications performance using signature...

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9th ACS/IEEE International Conference on computer systems and Applications, AICCSA 2011

作者： Canillas, J. Martinez Wong, A. Rexachs, D. Luque, E. Department of Computer Architecture and Operating System Universitat Autònoma de Barcelona Barcelona Spain

ISBN: (纸本)9781457704741

Being able to accurately estimate how an application will perform in a specific computational system provides many useful benefits and can result in smarter decisions. In this work we present a novel approach to model the behavior of message passing parallel applications. Based in the concept of signatures, which are the most relevant parts of an application (phases), we are able to build a model that allows us to predict the application execution time in different systems with variable input data size. Executing these signatures with different input data sizes defines a program's behavior partial function. Using regression we can generalize this behavior function to predict an application performance in a target system with other input data size within a predefined range. We explain our methodology and in order to validate the proposal present results using a synthetic program and well known applications. © 2011 IEEE.

关键词： Message passing

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Including the workload effect in the parallel program signature

Including the workload effect in the parallel program signat...

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13th IEEE International Workshop on FTDCS 2011, the 8th International Conference on ATC 2011, the 8th International Conference on UIC 2011 and the 13th IEEE International Conference on HPCC 2011

作者： Canillas, J. Martinez Wong, A. Rexachs, D. Luque, E. Department of Computer Architecture and Operating System Universitat Autònoma de Barcelona Barcelona Spain

ISBN: (纸本)9780769545387

Performance prediction and application behavior modeling have been the subject of extensive research that aims to estimate applications performance with acceptable precision. In this paper we present a novel approach to model the behavior of message passing parallel applications. There are many dimensions to consider while predicting a deterministic application behavior. Two dimensions that affect an application performance are the computational resources available and the size of its input data used in the computation. Based on the concept of signatures, we are able to build a model that allows us to predict applications execution time in different systems with variable input data size within a predefined range. Our approach generates signatures, which consist of the most relevant parts of an application (phases). Executing these phases for different workloads partially defines a program's behavior function. By using regression analysis we are able to generalize this behavior function to predict an application performance in a target system with any input data size within a predefined range. We explain our methodology and in order to validate the proposal, we present results using a synthetic program and well-known applications. We were able to estimate the total execution time for a input data size range with an average error of 4% executing, at most, three signatures that represent less than the 10% of the total application execution time. © 2011 IEEE.

关键词： Regression analysis

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A tool for efficient execution of SPMD applications on multicore clusters

A tool for efficient execution of SPMD applications on multi...

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作者： Muresano, Ronal Rexachs, Dolores Luque, Emilio Universitat Autonoma de Barcelona Computer Architecture and Operating System Department C.P 08293 Barcelona Spain

A challenge for parallel programmers is to efficiently execute traditional MPI applications, designed to be run in a cluster of single core nodes, on a multicore cluster. Multicore clusters include communication heterogeneities which have to be handled carefully to improve efficiency and speedup. This research presents an execution tool developed for SPMD applications which is focused on managing communications heterogeneities, distributing the workload among cores and enhancing parallel performance on multicore clusters. Our tool has been designed through using an execution methodology which includes mapping and scheduling strategies. The tool integrates five modules which give programmers a method to execute their applications efficiently. This tool is centered on improving SPMD applications designed to use MPI for communications. These applications were selected because they are the most commonly used in parallel computing. Also, these applications are chosen due to their data synchronization and communications volumes which can generate communication imbalance issues. The novel contribution of this tool is to permit programmers to find a minimum execution time, while the efficiency level is maintained over a defined threshold. Our tool has been tested in different multicore clusters and with a set of scientific applications. The results obtained show a considerable improvement in the applications efficiency when the tool is applied.

关键词： Efficiency

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A Tool for Selecting the Right Target Machine for Parallel Scientific Applications

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Procedia computer Science 2013年 18卷 1824-1833页

作者： Javier Panadero Alvaro Wong Dolores Rexachs Emilio Luque Computer Architecture and Operating System Department Universitat Autonoma de Barcelona Barcelona SPAIN

Analyzing and predicting performance in parallel applications is a great challenge for scientific programmers due to its com- plexity. Analyzing parallel application behavior is not a trivial process and it requires spending a large amount of time and effort to understand the behavior of the application algorithms during execution. We have developed PAS2P toolkit from PAS2P methodology. This methodology strives to characterize the behavior of MPI applications to identify and extract repre- sentative phases and create a signature, which will be used to analyze the application behavior and predict its execution time in different target systems. Applying this methodology is a non-trivial process for users, for this reason we have developed the proposal toolkit, which allows users to make the whole process, from creating a signature to executing it on target systems, in user-space in an easy and fully automatic way. PAS2P toolkit has been validated, making clear the advantages of the signature, with its execution time being much lower than the whole application execution time (around 7% of the total execution time), with a high quality prediction of around 96%.

关键词： Performance toolkit Performance Prediction Parallel Application Signature

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Accelerating BWA Aligner Using Multistage Data Parallelization on Multicore and Manycore architectures

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Procedia computer Science 2016年 80卷 2438-2442页

作者： Shaolong Chen Miquel A. Senar Department of Computer Architecture & Operating System Universitat Autònoma de Barcelona Spain

Nowadays, rapid progress in next generation sequencing (NGS) technologies has drastically decreased the cost and time required to obtain genome sequences. A series of powerful computing accelerators, such as GPUs and Xeon Phi MIC, are becoming a common platform to reduce the computational cost of the most demanding processes when genomic data is analyzed. GPU has received more attention at literature so far. However, Xeon Phi constitutes a very attractive approach to improve performance because applications don’t need to be rewritten in a different programming language specifically oriented to it. Sequence alignment is a fundamental step in any variant analysis study and there are many tools that cope with this problem. We have selected BWA, one of the most popular sequence aligner, and studied different data management strategies to improve its execution time on hybrid systems made of multicore CPUs and Xeon Phi accelerators. Our main contributions are focused on designing new strategies that combine data splitting and index replication in order to achieve a better balance in the use of system memory and reduce latency penalties. Our experimental results show significant speed-up improvements when such strategies are executed in our hybrid platform, taking advantage of the combined computing power of a standard multicore CPU and a Xeon Phi accelerator.

关键词： Xeon Phi Sequence alignment Data parallelization Multicore processors Manycore processors

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Active learning processes to study memory hierarchy on Multicore systems

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Procedia computer Science 2010年第1期1卷 921-930页

作者： John Corredor Juan Carlos Moure Dolores Rexachs Daniel Franco Emilio Luque Universitat Autònoma de Barcelona o Computer Architecture and Operating System Department Barcelona SPAIN

A current challenge for computer users is to fully exploit performance of new Multicore systems. We propose a methodology for students in computational science to analyze the effect of memory hierarchy on application performance. The analysis is proposed in a experimental environment consisting of different systems with different configurations of memory hierarchy. New Multicore systems put tremendous pressure on memory hierarchy systems. The pressure is because, unfortunately, the effectiveness of the computing power offered by Multicore is affected by the data communications inter-chip and off-chip to the memory hierarchy, leading to significant problems in performance for many parallel applications. In the scope of computer science, it is important that students understand these problems. This methodology was successfully applied to students, where they acquired a significant improvement in their parallel application metrics assessment as was demonstrated in our evaluation.

关键词： Active learning Hierarchy memory Performance counters

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Analyzing the data behavior of parallel application for extracting performance knowledge.

Analyzing the data behavior of parallel application for extr...

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2019 International Conference on High Performance Computing and Simulation, HPCS 2019

作者： Tirado, Felipe Wong, Alvaro Rexachs, Dolores Luque, Emilio Universidad Autónoma de Barcelona Computer Architecture and Operating System Department Barcelona Spain Departamento de Computacion e Industrias Universidad Catolica Del Maule Talca Chile

ISBN: (纸本)9781728144849

When performance tools are used to analyze an application with thousands of processes, the data generated can be bigger than the memory size of the cluster node, causing this data to be loaded in swap memory. In HPC systems, moving data to swap is not always an option. This problem causes scalability limitations that affect the user experience and it presents serious restrictions for executing on a large scale. In order to obtain knowledge about the application's performance, the performance tools usually instrument the application to generate the data. When the instrumented parallel application is executed with thousands of processes, the data generated may be higher than the memory size of the compute node used to analyze the data in order to obtain the knowledge. Performance tools such as PAS2P predict the execution time in target machines. In order to predict the performance, PAS2P carries out a data analysis with the data in each application process. The data collected is analyzed sequentially, which results in an inefficient use of system resources. To solve this, we propose designing a parallel method to solve the problem when we manage a high volume of data, decreasing its execution time and increasing scalability, improving the PAS2P toolkit to generate performance knowledge defined by the application's behavior phases. © 2019 IEEE.

关键词： Scalability

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An Optimization for MapReduce Frameworks in Multi-core architectures

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Procedia computer Science 2013年 18卷 2587-2590页

作者： Tharso Ferreira Antonio Espinosa Juan Carlos Moure Porfidio Hernández Computer Architecture and Operating System Department Universitat Auto‘noma of Barcelona 08193 Bellaterra Barcelona Spain

MapReduce simplifies parallel programming, abstracting the programmer responsibilities as synchronization and task man- agement. The paradigm allows the programmer to write sequential code which is automatically parallelized. The MapReduce frameworks developed today are designed for situations where all keys generated by the Map phase must fit into main memory. However certain types of workload have a distribution of keys that provoke a growth of intermediate data structures, exceeding the amount of available main memory. Based on the behavior of MapReduce frameworks in multi-core architectures for these types of workload, we promote an extension of the original strategy of MapReduce for multi-core architectures. We present an extension in memory hierarchy, hard disk and main memory, which has as objective to reduce the use of main memory, as well as reducing the page faults, caused by the use of swap. The main goal of our extension is to ensure an acceptable performance of MapReduce, when intermediate data structures do not fit in main memory and it is necessary to make use of a secondary memory.

关键词： MapReduce Multicore Processors Threads Main Memory Virtual Memory

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Benchmark based on application signature to analyze and predict their behavior 7th

Benchmark based on application signature to analyze and pred...

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7th International Conference on Cloud Computing and Big Data, JCC and BD 2019

作者： Tirado, Felipe Wong, Alvaro Rexachs, Dolores Luque, Emilio Departamento de Computación e Industrias Universidad Católica del Maule Talca Chile Computer Architecture and Operating System Department Universidad Autónoma de Barcelona Barcelona Spain

ISBN: (纸本)9783030277123

Currently, there are benchmark sets that measure the performance of HPC systems under specific computing and communication properties. These benchmarks represent the kernels of applications that measure specific hardware components. If the user’s application is not represented by any benchmark, it is not possible to obtain an equivalent performance metric. In this work, we propose a benchmark based on the signature of an MPI application obtained by the PAS2P method. PAS2P creates the application signature in order to predict the execution time, which we believe will be very adjusted in relation to the execution time of the full application. The signature has two performance qualities: the bounded time to execute it (a benchmark property) and the quality of prediction. Therefore, we propose to extend the signature by giving the benchmark capacities such as the efficiency of the application over the HPC system. The performance metrics will be performed by the benchmark proposed. The experimentation validates our proposal with an average error of prediction close to 7%. © Springer Nature Switzerland AG 2019.

关键词： Benchmarking

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