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An Efficient Network-on-Chip Router for Dataflow architecture

Journal of computer Science & technology 2017年第1期32卷 11-25页

作者： Xiao-Wei Shen Xiao-Chun Ye Xu Tan Da Wang Lunkai Zhang Wen-Ming Li Zhi-Min Zhang Dong-Rui Fan Ning-Hui Sun State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China School of Computer and Control Engineering University of Chinese Academy of Sciences Beijing 100049 China Department of Computer Science The University of Chicago IL 60637 U.S.A.

Dataflow architecture has shown its advantages in many high-performance computing cases. In dataflow computing, a large amount of data are frequently transferred among processing elements through the network-on-chip （NoC）. Thus the router design has a significant impact on the performance of dataflow architecture. Common routers are designed for control-flow multi-core architecture and we find they are not suitable for dataflow architecture. In this work, we analyze and extract the features of data transfers in NoCs of dataflow architecture： multiple destinations, high injection rate, and performance sensitive to delay. Based on the three features, we propose a novel and efficient NoC router for dataflow architecture. The proposed router supports multi-destination; thus it can transfer data with multiple destinations in a single transfer. Moreover, the router adopts output buffer to maximize throughput and adopts non-flit packets to minimize transfer delay. Experimental results show that the proposed router can improve the performance of dataflow architecture by 3.6x over a state-of-the-art router.

关键词： multi-destination router network-on-chip dataflow architecture high-performance computing

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CUDA 2D stencil computations for the Jacobi method

CUDA 2D stencil computations for the Jacobi method

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10th International Conference on Applied Parallel and Scientific Computing, PARA 2010

作者： Cecilia, José María García, José Manuel Ujaldón, Manuel Computer Engineering and Technology Department University of Murcia Spain Computer Architecture Department University of Malaga Spain

ISBN: (纸本)9783642281501

We are witnessing the consolidation of the GPUs streaming paradigm in parallel computing. This paper explores stencil operations in CUDA to optimize on GPUs the Jacobi method for solving Laplace's differential equation. The code keeps constant the access pattern through a large number of loop iterations, that way being representative of a wide set of iterative linear algebra algorithms. Optimizations are focused on data parallelism, threads deployment and the GPU memory hierarchy, whose management is explicit by the CUDA programmer. Experimental results are shown on Nvidia Teslas C870 and C1060 GPUs and compared to a counterpart version optimized on a quadcore Intel CPU. The speed-up factor for our set of GPU optimizations reaches 3-4x and the execution times defeat those of the CPU by a wide margin, also showing great scalability when moving towards a more sophisticated GPU architecture and/or more demanding problem sizes. © 2012 Springer-Verlag.

关键词： Iterative methods

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March U: A test for unlinked memory faults

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IEE PROCEEDINGS-CIRCUITS DEVICES AND SYSTEMS 1997年第3期144卷 155-160页

作者： vandeGoor, AJ Gaydadjiev, GN Department of Electrical Engineering Section Computer Architecture & Digital Technique Delft University of Technology Mekelweg 4 Delft 2628 CD The Netherlands

Short and efficient memory tests is the goal of every test designer. To reduce the cost of production tests, often a simple test which covers most of the faults, e.g. all simple (unlinked) faults, is desirable to eliminate most defective parts;a more costly test can be used thereafter to eliminate the remainder of the bad parts. Such a test-cost efficient approach is used by most manufacturers. In addition, system power-on tests are not allowed a long test time while a high fault coverage is desirable. The authors propose a new realistic fault model (the disturb fault model), and a set of tests for unlinked faults. These tests have the property of covering all simple (unlinked) faults at a very reasonable test time compared with existing tests.

关键词： memory tests March tests memory faults fault model simple faults disturb fault

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YOLO-LLTS: Real-Time Low-Light Traffic Sign Detection via Prior-Guided Enhancement and Multi-Branch Feature Interaction

arXiv

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arXiv 2025年

作者： Lin, Ziyu Wu, Yunfan Ma, Yuhang Chen, Junzhou Zhang, Ronghui Wu, Jiaming Yin, Guodong Lin, Liang Guangdong Key Laboratory of Intelligent Transportation System School of intelligent systems engineering Sun Yat-sen University Guangzhou510275 China Department of Architecture and Civil Engineering Chalmers University of Technology Sven Hultins gata 6 GothenburgSE-412 96 Sweden School of Mechanical Engineering Southeast University Nanjing211189 China School of Computer Science and Engineering Sun Yat-sen University Guangzhou510275 China

Detecting traffic signs effectively under low-light conditions remains a significant challenge. To address this issue, we propose YOLO-LLTS, an end-to-end real-time traffic sign detection algorithm specifically designed for low-light environments. Firstly, we introduce the High-Resolution Feature Map for Small Object Detection (HRFM-TOD) module to address indistinct small-object features in low-light scenarios. By leveraging high-resolution feature maps, HRFM-TOD effectively mitigates the feature dilution problem encountered in conventional PANet frameworks, thereby enhancing both detection accuracy and inference speed. Secondly, we develop the Multi-branch Feature Interaction Attention (MFIA) module, which facilitates deep feature interaction across multiple receptive fields in both channel and spatial dimensions, significantly improving the model’s information extraction capabilities. Finally, we propose the Prior-Guided Enhancement Module (PGFE) to tackle common image quality challenges in low-light environments, such as noise, low contrast, and blurriness. This module employs prior knowledge to enrich image details and enhance visibility, substantially boosting detection performance. To support this research, we construct a novel dataset, the Chinese Nighttime Traffic Sign Sample Set (CNTSSS), covering diverse nighttime scenarios, including urban, highway, and rural environments under varying weather conditions. Experimental evaluations demonstrate that YOLO-LLTS achieves state-of-the-art performance, outperforming the previous best methods by 2.7% mAP50 and 1.6% mAP50:95 on TT100K-night, 1.3% mAP50 and 1.9% mAP50:95 on CNTSSS, and achieving superior results on the CCTSDB2021 dataset. Moreover, deployment experiments on edge devices confirm the real-time applicability and effectiveness of our proposed approach. Copyright © 2025, The Authors. All rights reserved.

关键词： Traffic signs

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TRIPS: A distributed explicit data graph execution (EDGE) microprocessor 19

TRIPS: A distributed explicit data graph execution (EDGE) mi...

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19th IEEE Hot Chips Symposium, HCS 2007

作者： Govindan, Madhu Saravana Sibi Burger, Doug Keckler, Steve Computer Architecture and Technology Laboratory Department of Computer Sciences University of Texas Austin United States

ISBN: (纸本)9781467388696

This article consists of a collection of slides from the author's conference resentation on TRIPS, a distributed explicit data graph execution (EDGE) microprocessor. Some of the specific topics discussed include: architecture design and processing capabilties;performance evaluation;the special features of EDGE;networked microarchitectures;the TRIPS execution model;tile-level microarchitectures;implementation techniques;and opportunities for improvement. © 2007 IEEE.

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Applying support vector machines and mutual information to book losses prediction

Applying support vector machines and mutual information to b...

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2010 6th IEEE World Congress on Computational Intelligence, WCCI 2010 - 2010 International Joint Conference on Neural Networks, IJCNN 2010

作者： Mora, A.M. Herrera, L.J. Urquiza, J. Rojas, I. Merelo, J.J. Department of Architecture and Computer Technology ETSIIT University of Granada Spain

ISBN: (纸本)9781424469178

This work presents a feasible solution to the problem of book losses prediction from financial and general data in companies. The specific problem tackled in this work corresponds to a real dataset of Spanish companies. A Mutual Information-based criterion has been applied in order to reduce the initial set of variables, and a Support Vector Machine classifier has been designed to perform the prediction. The results show that the proposed approach obtains an important reduction of the number of variables needed to perform the prediction, improving the generalization capabilities of the model. The accuracy rates were above the 84% in the test set, much better than those obtained by other soft-computing algorithms (such as Genetic Programming, Self-Organizing Maps or Artificial Neural Networks) working with the same dataset and presented in previous works. The proposed approach shows to be promising and could be determinant in providing the experts with the right tools for the selection of the relevant factors and for the prediction in this difficult problem. © 2010 IEEE.

关键词： Forecasting

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Universal mechanisms for data-parallel architectures 36

Universal mechanisms for data-parallel architectures

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36th International Symposium on Microarchitecture, MICRO 2003

作者： Karthikeyan Sankaralingam Keckler, S.W. Mark, W.R. Burger, D. Computer Architecture and Technology Laboratory Department of Computer Sciences University of Texas at Austin United States

ISBN: (纸本)076952043X

Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper presents a classification scheme for data-parallel program attributes, and proposes micro-architectural mechanisms to support applications with diverse behavior for using a single reconfigurable architecture. We focus on the following four broad kinds of data-parallel programs - DSP/multimedia, scientific, networking, and real-time graphics workloads. While all of these programs exhibit high computational intensity, coarse-grain regular control behavior, and some regular memory access behavior, they show wide variance in the computation requirements, fine grain control behavior, and the frequency of other types of memory accesses. Based on this study of application attributes, this paper proposes a set of general micro-architectural mechanisms that enable a baseline architecture to be dynamically tailored to the demands of a particular application. These mechanisms provide efficient execution across a spectrum of data-parallel application and can be applied to diverse architectures ranging from vector cores to conventional superscalar cores. Our results using a baseline TRIPS processor show that the configurability of the architecture to the application demands provides harmonic mean performance improvement of 5%-55% over scalable yet less flexible architectures, and performs competitively against specialized architectures. © 2003 IEEE.

关键词： Application programs

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Smart environment application architecture

Smart environment application architecture

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2nd International Conference on Pervasive Computing Technologies for Healthcare 2008, PervasiveHealth

作者： Salvador, Zigor Larrea, Mikel Lafuente, Alberto Department of Computer Architecture and Technology University of the Basque Country Spain

ISBN: (纸本)9789639799158

Pervasive computing is a field where many different entities come into play. In particular, development of useful applications in the field of pervasive healthcare requires dealing with substantial levels of complexity regarding the management of the pervasive environment where users and applications coexist. Service oriented middleware architectures simplify the task of creating those applications and turn the management of pervasive environments into a productive activity. We present our ongoing approach to the design of such a middleware architecture, known as the Smart Environment Application architecture.

关键词： Ubiquitous computing

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Terahertz time-domain spectroscopy of boron nitride nanotube-reinforced PMMA composites

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Polymer Testing 2025年 147卷

作者： Zhai, Min Gou, Feilin Ke, Changhong He, Wenlong Zhai, Cong Locquet, Alexandre Citrin, D.S. College of Electronics and Information Engineering Shenzhen University Guangdong Shenzhen518060 China Department of Mechanical Engineering State University of New York at Binghamton BinghamtonNY13902 United States School of Transportation and Civil Engineering and Architecture Foshan University Guangdong Foshan528000 China School of Electrical and Computer Engineering Georgia Institute of Technology AtlantaGA30332 United States Georgia Tech-CNRS IRL2958 Georgia Tech-Europe 2 Rue Marconi Lorraine Metz57070 France

Polymethyl methacrylate (PMMA) reinforced with boron nitride nanotubes (BNNT) at weight fill factors fw of 0.2 and 0.5 wt % are characterized by terahertz time-domain spectroscopy (THz-TDS). It is known that the introduction of BNNTs in polymer composites can provide thermal conduction paths and significantly reduce interface thermal resistance. Despite the low values of fw, the presence of the BNNTs has a significant effect on the optical constants, either due to the intrinsic contribution of the BNNTs or due to extrinsic effects such as induced strain in the PMMA matrix. Negligible THz birefringence observed in the polarization-resolved THz transmission measurements indicates a high degree of isotropy of the BNNT dispersed in the PMMA. Assuming an intrinsic effect and the validity of modified Maxwell–Garnett theory regardless of the inclusion shape, the frequency-dependent optical constants of BNNTs are extracted. The refractive index of BNNTs varies roughly linearly from n(ν=500GHz)≈1.8 to n(ν=1.5THz)≈1.75, while the absorption coefficient increases from α(ν=500GHz)≈10 cm−1 to α(ν=1.5THz)≈45 cm−1. The extracted THz dielectric properties of the BNNTs trend toward reported values for bulk h-BNs. © 2025 The Authors

关键词： Terahertz spectroscopy

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Energy-aware load balancing of parallel evolutionary algorithms with heavy fitness functions in heterogeneous CPU-GPU architectures

Energy-aware load balancing of parallel evolutionary algorit...

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作者： Escobar, Juan José Ortega, Julio Díaz, Antonio Francisco González, Jesús Damas, Miguel Department of Computer Architecture and Technology CITIC University of Granada Spain

By means of the availability of mechanisms such as Dynamic Voltage and Frequency Scaling (DVFS) and heterogeneous architectures including processors with different power consumption profiles, it is possible to devise scheduling algorithms that are aware of both runtime and energy consumption in parallel programs. In this paper, we propose and evaluate a multi-objective (more specifically, a bi-objective) approach to distribute the workload among the processing cores in a given heterogeneous parallel CPU-GPU architecture. The aim of this distribution may be either to save energy without increasing the running time or to reach a trade-off among time and energy consumption. The parallel programs considered here are master-worker evolutionary algorithms where the evaluation of the fitness function for the individuals in the population demands the most part of the computing time. As many useful bioinformatics and data mining applications exhibit this kind of parallel profile, the proposed energy-aware approach for workload scheduling could be frequently applied. © 2018 John Wiley & Sons, Ltd.

关键词： Energy utilization

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