Service discovery is critical for mapping logical resource name to physical resources in large-scale distributed systems. The traditional Domain Name System (DNS) deployed on the Internet, however, suffers from slow-d...
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This paper investigates an update strategy for the Univariate Marginal Distribution Algorithm (UMDA) probabilistic model inspired by the equations of the Ant Colony Optimization (ACO) computational paradigm. By adapti...
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A series of plate impact experiment with alumina specimens in different thicknesses were conducted on a gas gun in order to further investigate the delayed failure phenomenon under shock loading. With the aid of the V...
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A series of plate impact experiment with alumina specimens in different thicknesses were conducted on a gas gun in order to further investigate the delayed failure phenomenon under shock loading. With the aid of the VISAR technique, a evident recompression signal was observed in the history of rear free surface of specimen, which indicates the generation of the failure wave. According to the experimental results, the failure wave trajectory was explored. The results show that the failure wave is generated with a delayed time of about 0.105 μs behind the shock wave front, and propagates into the stressed body with a velocity about 5.051 km/s under the impact stress of 7.16 GPa. The physical mechanism of this phenomenon is discussed in the end.
This work introduces AmIVital, a Spanish project which aims to provide a platform that meets the bases of AAL (Ambient Assisted Living) and facilitates the development of applications and business models for an emergi...
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Hardware components can contain hidden backdoors, which can be enabled with catastrophic effects or for ill-gotten profit. These backdoors can be inserted by a malicious insider on the design team or a third-party IP ...
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Hardware components can contain hidden backdoors, which can be enabled with catastrophic effects or for ill-gotten profit. These backdoors can be inserted by a malicious insider on the design team or a third-party IP provider. In this paper, we propose techniques that allow us to build trustworthy hardware systems from components designed by untrusted designers or procured from untrusted third-party IP providers. We present the first solution for disabling digital, design-level hardware backdoors. The principle is that rather than try to discover the malicious logic in the design -- an extremely hard problem -- we make the backdoor design problem itself intractable to the attacker. The key idea is to scramble inputs that are supplied to the hardware units at runtime, making it infeasible for malicious components to acquire the information they need to perform malicious actions. We show that the proposed techniques cover the attack space of deterministic, digital HDL backdoors, provide probabilistic security guarantees, and can be applied to a wide variety of hardware components. Our evaluation with the SPEC 2006 benchmarks shows negligible performance loss (less than 1% on average) and that our techniques can be integrated into contemporary microprocessor designs.
While providing correct functionality has been the thrust of most software design efforts, embedded software poses several additional challenges. Among them is designing robust software which can tolerate inaccurate i...
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ISBN:
(纸本)9781450305594
While providing correct functionality has been the thrust of most software design efforts, embedded software poses several additional challenges. Among them is designing robust software which can tolerate inaccurate inputs (coming from degraded sensors), failure of software components, and wearing-out of electro-mechanical parts it controls. For this, a design space exploration is performed and several design options are evaluated for their ability to tolerate quality (or accuracy degradation) faults. While a model-based approach enables an early analysis of quality faults, modeling and analyzing the effects of quality faults is a challenge. In this work we propose a quality fault-tolerance analysis framework which is used on operation-level models of embedded software, and an abstraction of quality-faults suitable for this analysis. The proposed method consists of characterizing individual components of the model, and then using the pre-characterized behaviors to quickly evaluate the software design. Characterization is a one-time effort and results of the same can be reused when a new design is evaluated. This results in additional speedup of upto 6-10× faster evaluation of designs, thereby facilitating a quick early evaluation of design options.
Accurately monitoring changing energy usage patterns in households is a first requirement for more efficient and eco-friendly energy management. Such data is essential to the establishment of the Smart Grid, but at th...
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Sink Scheduling, in the form of scheduling multiple sinks among sink sites to leverage traffic burden, is an effective mechanism for the energy-efficiency of wireless sensor networks (WSNs). Due to the inherent diffic...
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The Ray Tracing rendering algorithm can produce high-fidelity images of 3-D scenes, including shadow effects, as well as reflections and transparencies. This is currently done at a processing speed of at most 30 frame...
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