Affymetrix High Oligonucleotide expression arrays are widely used for the high-throughput assessment of gene expression of thousands of genes simultaneously. Although disputed by several authors, there are non-biologi...
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Affymetrix High Oligonucleotide expression arrays are widely used for the high-throughput assessment of gene expression of thousands of genes simultaneously. Although disputed by several authors, there are non-biological variations and systematic biases that must be removed as much as possible through the pre-processing step before an absolute expression level for every gene is assessed. It is important to evaluate microarray pre-processing procedures not only to the detection of differentially expressed genes, but also to classification, since a major use of microarrays is the expression-based phenotype classification. Thus, in this paper, we use several cancer microarray datasets to assess the influence of five different pre-processing methods in Support Vector Machine-based classification methodologies with different kernels: linear, Radial Basis Functions (RBFs) and polynomial.
Memory optimization is an important strategy to gain high performance for sequence alignment implemented by CUDA on GPGPU. Smith-Waterman (SW) algorithm is the most sensitive algorithm widely used for local sequence a...
Memory optimization is an important strategy to gain high performance for sequence alignment implemented by CUDA on GPGPU. Smith-Waterman (SW) algorithm is the most sensitive algorithm widely used for local sequence alignment but very time consuming. Although several parallel methods have been used in some studies and shown good performances, advantages of GPGPU memory hierarchy are still not fully exploited. This paper presents a new parallel method on GPGPU using on-chip memory more efficiently to optimize parallel Smith-Waterman sequence alignment presented by Gregory M. Striemer. To minimize the cost of data transfers, on-chip shared memory is used to store intermediate results. Constant memory is also used effectively in our implementation of parallel Smith-Waterman algorithm. Using these two kinds of on-chip memory decreases long latency memory access operations, and reduces demand for global memory when aligning longer sequences. The experimental results show 1.66x to 3.16x speedup over Gregory's parallel SW on GPGPU in terms of execution time and 19.70x speedup on average and 22.43x speedup peak performance over serial SW in terms of clock cycles on our computer platform.
In this paper we introduce formal definitions of the concepts of fuzzy color and fuzzy color space. We present an approach to the automatic design of customized fuzzy color spaces on the basis of a collection of crisp...
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In this paper we introduce formal definitions of the concepts of fuzzy color and fuzzy color space. We present an approach to the automatic design of customized fuzzy color spaces on the basis of a collection of crisp colors, each crisp color being fully representative of a certain color term. The approach works on any euclidean crisp space and is based on obtaining a Voronoi diagram having the aforementioned representative crisp colors as centroids. The proposal will be illustrated building fuzzy color spaces on RGB colors on the basis of the ISCC-NBS color naming system.
Topology virtualization techniques are proposed for NoC-based many-core processors with core-level redundancy to isolate hardware changes caused by on-chip defective cores. Prior work focuses on homogeneous cores with...
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ISBN:
(纸本)9783981080162
Topology virtualization techniques are proposed for NoC-based many-core processors with core-level redundancy to isolate hardware changes caused by on-chip defective cores. Prior work focuses on homogeneous cores with symmetric performance and optimizes on-chip communication only. However, core-to-core performance asymmetry due to manufacturing process variations poses new challenges for constructing virtual topologies. Lower performance cores may scatter over a virtual topology, while operating systems typically allocate tasks to continuous cores. As a result, parallel applications are probably assigned to a region containing many slower cores that become bottlenecks. To tackle the above problem, in this paper we present a novel performance-asymmetry-aware reconfiguration algorithm Bubble-Up based on a new metric called core fragmentation factor (CFF). Bubble-Up can arrange cores with similar performance closer, yet maintaining reasonable hop distances between virtual neighbors, thus accelerating applications with higher degree of parallelism, without changing existing allocation strategies for OS. Experimental results show its effectiveness.
Pulse wave signals contain a large number of physiological and pathological information of people. The analysis of them is an important method to diagnose the status of sub-health. When pulse wave signals are detected...
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This paper proposes an audio zero-watermarking algorithm based on Fast Fourier Transform (FFT). This algorithm does not change any contents about the audio signals. It proposes a solution about the contradictions abou...
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ISBN:
(纸本)9781424451623;9781424451616
This paper proposes an audio zero-watermarking algorithm based on Fast Fourier Transform (FFT). This algorithm does not change any contents about the audio signals. It proposes a solution about the contradictions about imperceptible and robustness. The experimental results show this algorithm can effectively resist low-pass filtering, Gaussian noise and re-sampling attacks. This new audio zero-watermarking algorithm based on FFT can meet the requirements of watermarking security.
This paper presents a Park transform-based method for preprocessing stator current data from a motor and transforming it into a form that is useful for fault detection and diagnostics. The proposed method generates po...
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ISBN:
(纸本)9781849192316
This paper presents a Park transform-based method for preprocessing stator current data from a motor and transforming it into a form that is useful for fault detection and diagnostics. The proposed method generates power signatures that are invariant to the initial electrical angle of the voltage when the motor is connected to the utility, and can also adapt to variations in the electrical angle of the supply voltage over time. A modified nonlinear least squares algorithm identifies and tracks the parameters of the supply voltage over time, ensuring that the supply voltage and the argument of the Park transformation remain synchronized. Experimental results are presented that illustrate the method's effectiveness for identifying changes in the mechanical load on a 3/4 HP refrigeration compressor.
Spino Cerebellar Ataxia type 2 is an autosomal dominant cerebellar hereditary ataxia with the highest prevalence in Cuba. Typical symptoms in patients of SCA2 ataxia include modifications in latency, peak velocity, an...
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A popular way to exploit high level programming languages in FPGA designs is to use a soft-core with accompanying software development tools. However, a common shortcoming with the current soft-core offerings is their...
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A popular way to exploit high level programming languages in FPGA designs is to use a soft-core with accompanying software development tools. However, a common shortcoming with the current soft-core offerings is their limited software execution capability: the required performance for the implementation can be often reached only with instruction set extensions. In this paper, we propose and evaluate an application-specific processor design toolset that uses a multi-issue exposed data path processor architecture template. The main benefit of the architecture is scalability with respect to instruction-level parallelism (ILP). The design flow allows the designer to freely customize the data path resources in the core to exploit the ILP available in computation intensive kernels. The design toolset includes a retargetable C compiler and an architecture simulator, making design space exploration feasible. The experiments show that a relatively small soft-core tailored with the toolset provides significant speedups on software execution without using any instruction set extensions. The best measured speedup in comparison to the major commercial soft-cores was fourfold in applications from the CHStone benchmark suite, while the amount of consumed FPGA resources remained moderate.
Marital dissolutions, that include divorces and separations, are considered one of the most adverse events that can influence the health, life quality and welfare of the adults and infants implied. There have been sev...
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Marital dissolutions, that include divorces and separations, are considered one of the most adverse events that can influence the health, life quality and welfare of the adults and infants implied. There have been several researches in the sanitary and sociological field that show how these processes of breaking a life in common can deteriorate the health in both, the physic and the psychological, aspect. This paper presents the application of machine learning methods to be able to predict if a marriage, that has started a dissolution process, will end up in a friendly agreement or it will be taken to the court. In order to accomplish this task, Radial Basis Function Neural Networks in combination with Mutual Information will be able to determine which elements should be considered to make a prediction. As the experiments will show, the methodology applied is able to classify with a high accuracy and robustness a real data base. The results could be applied in order to prevent some traumas to the people involved in the dissolution in the medical aspect and to perform a better management in the legal aspects.
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