检索结果-内蒙古大学图书馆

Automatic tuning of sparse matrix-vector multiplication on multicore clusters

Science China(Information Sciences) 2015年第9期58卷 17-30页

作者： LI ShiGang HU ChangJun ZHANG JunChao ZHANG YunQuan State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences School of Computer and Communication Engineering University of Science and Technology Beijing Department of Computer Science University of Illinois at Urbana-Champaign

To have good performance and scalability, parallel applications should be sophisticatedly optimized to exploit intra-node parallelism and reduce inter-node communication on multicore clusters. This paper investigates the automatic tuning of the sparse matrix-vector(Sp MV) multiplication kernel implemented in a partitioned global address space language, which supports a hybrid thread- and process-based communication layer for multicore systems. One-sided communication is used for inter-node data exchange, while intra-node communication uses a mix of process shared memory and multithreading. We develop performance models to facilitate selecting the best configuration of threads and processes hybridization as well as the best communication pattern for Sp MV. As a result, our tuned Sp MV in the hybrid runtime environment consumes less memory and reduces inter-node communication volume, without damaging the data locality. Experiments are conducted on 12 real sparse matrices. On 16-node Xeon and 8-node Opteron clusters, our tuned Sp MV kernel gets on average 1.4X and 1.5X improvement in performance over the well-optimized process-based message-passing implementation, respectively.

关键词： Sp MV PGAS hybridization model-driven multicore clusters

来源：评论

学校读者我要写书评

暂无评论

Trikarenos: Design and Experimental Characterization of a Fault-Tolerant 28nm RISC-V-based SoC

引用

IEEE Transactions on Nuclear Science 2025年

作者： Rogenmoser, Michael Wiese, Philip Forlin, Bruno Endres Gurkaynak, Frank K. Rech, Paolo Menicucci, Alessandra Ottavi, Marco Benini, Luca Integrated Systems Laboratory ETH Zurich Switzerland Computer Architecture for Embedded Systems University of Twente Netherlands Department of Industrial Engineering University of Trento Italy Delft University of Technology Department of Space Engineering Netherlands University of Rome Department of Electronic Engineering Tor Vergata Italy Information Engineering at the University of Bologna Department of Electrical Electronic Italy

RISC-V-based fault-tolerant system-on-chip (SoC) designs are critical for the new generation of automotive and space SoC architectures. However, reliability assessment requires characterization under controlled radiation doses to accurately quantify the fault tolerance of the fabricated designs. This work analyzes the Trikarenos design, a SoC implemented in TSMC 28nm, for single event upset (SEU) vulnerability under atmospheric neutron and 200MeV proton radiation, comparing these results to simulation-based fault injection. All faults in error correction codes (ECC) protected memory are corrected by a scrubber, showing an estimated cross-section per bit of up to 1.09 × 10−14 cm2 bit−1. Furthermore, the triple-core lockstep (TCLS) mechanism implemented in Trikarenos is validated and is shown to correct errors affecting a cross-section up to 3.23 × 10−11 cm2, with the remaining uncorrectable vulnerability below 5.36 × 10−12 cm2. When augmenting the experimental analysis of fabricated chips with gate-level fault injection in simulation, 99.10% of injections into the SoC produced correct results, while 100% of injections in the TCLS-protected cores were handled *** 12.28%of all injected faults leading to a TCLS recovery, this indicates an approximate effective flip-flop cross-section of up to 1.28 × 10−14 cm2/FF. © 1963-2012 IEEE.

关键词： Radiation damage

来源：评论

学校读者我要写书评

暂无评论

Runtime Engine for Dynamic Profile Guided Stride Prefetching

引用

Journal of computer Science & technology 2008年第4期23卷 633-643页

作者：邹琼李晓峰章隆兵 Department of Computer Science University of Science and Technology of China Intel China Research Center Key Laboratorg of Computer System and Architecture Institute of Computing TechnologyChinese Academy of Sciences

Stride prefetching is recognized as an important technique to improve memory access performance. The prior work usually profiles and/or analyzes the program behavior offline, and uses the identified stride patterns to guide the compilation process by injecting the prefetch instructions at appropriate places. There are some researches trying to enable stride prefetching in runtime systems with online profiling, but they either cannot discover cross-procedural prefetch opportunity, or require special supports in hardware or garbage collection. In this paper, we present a prefetch engine for JVM （Java Virtual Machine）. It firstly identifies the candidate load operations during just-in-time （JIT） compilation, and then instruments the compiled code to profile the addresses of those loads. The runtime profile is collected in a trace buffer, which triggers a prefetch controller upon a protection fault. The prefetch controller analyzes the trace to discover any stride patterns, then modifies the compiled code to inject the prefetch instructions in place of the instrumentations. One of the major advantages of this engine is that, it can detect striding loads in any virtual code places for both regular and irregular code, not being limited with plain loop or procedure scopes. Actually we found the cross-procedural patterns take about 30% of all the prefetchings in the representative Java benchmarks. Another major advantage of the engine is that it has runtime overhead much smaller （the maximal is less than 4.0%） than the benefits it brings. Our evaluation with Apache Harmony JVM shows that the engine can achieve an average 6.2% speed-up with SPECJVM98 and DaCapo on Intel Pentium 4 platform, in spite of the runtime overhead.

关键词： stride prefetching dynamic profiling runtime system

来源：评论

学校读者我要写书评

暂无评论

DESIGN, SIMULATION AND ANALYSIS OF RSESS NETWORK

引用

Science China Mathematics 1987年第1期30卷 76-88页

作者：谭小南 Academia Sinica Beijing Department of Computer Architecture Institute of Computing Technology

This paper proposes a packet switching MIMD interconnection network called RSESS (Reverse Shuffle Exchange Supershuffle) network and presents some results of simulation and analysis of it. RSESS network has low hardware complexity O(N log(logN)) and short average delay. It benefits localized communication to a great extent. With an increase in the amount of locality of communication the network delay decreases *** important properties of favouring localized communication and being adaptable to a wide range of interconnection requests make RSESS network promising for packet communilation computers in which communications are localized. Using RSESS network, we can achieve high efficiency of communication and load sharing evenness.

关键词： work net SIMULATION AND ANALYSIS OF RSESS NETWORK DESIGN

来源：评论

学校读者我要写书评

暂无评论

Reliable Multihop Routing and Congestion Aware Chicken Swarm Optimization in Vehicular Ad-Hoc Network 3

Reliable Multihop Routing and Congestion Aware Chicken Swarm...

引用

3rd International Conference on Integrated Circuits and Communication Systems, ICICACS 2025

作者： Anitha, Cuddapah Al-Tarazi, Dalia Vignesh, G.D. Vasuki, A. Vinotha Giri, Jayant Dinesh, M. School of Computing Mohan Babu University Erstwhile Sree Vidyanikethan Engineering College Department of Computer Science and Engineering Tirupati India Zarqa University Faculty of Engineering Department of Architecture Engineering Zarqa Jordan College of Engineering University of Business and Technology Jeddah Saudi Arabia St. Joseph's College of Engineering Department of Electronics and Communication Engineering Chennai India J.P. College of Engineering Department of Computer Science and Engineering Tenkasi India Yeshwantrao Chavan College of Engineering Department of Mechanical Engineering Nagpur India Lovely Professional University Division of Research and Development Phagwara India Department of Vlsi Microelectronics Chennai India

ISBN: (纸本)9798331508456

Background: Vehicular Ad Hoc Networks (VANETs) play a crucial role in intelligent transportation by facilitating communication between vehicles and vehicles with infrastructure-based models. They encounter problems such as significant movement, overcrowding, and loss of data. This research presents a novel deep reinforcement learning-based resource allocation and congestion optimization (DRLRCO) framework aimed at improving communication efficiency and high reliability using an effective learning process. Method Used: The DRLRCO framework employs agent-based learning to ensure precise data transmission, AdMAC Protocol for dynamic packet delivery, and Congestion-Aware Chicken Swarm Optimization (CSO) to enhance network performance. Result: The DRLRCO framework surpasses reinforcement learning models for comprehensive testing. Significant enhancements involve improved accuracy, reduced data loss, minimized overhead, increased throughput, and shorter average delays for real-time communication. Conclusion: The DRLRCO framework successfully tackles congestion and data loss in vehicular communication. Future studies might involve Artificial Intelligence (AI) for traffic forecasting, experimentation among high-speed vehicles and investigating blockchain for enhanced security. © 2025 IEEE.

关键词： Deep reinforcement learning

来源：评论

学校读者我要写书评

暂无评论

Assessment of changes in a technical condition of railway bridges using a novel probabilistic algorithm

引用

Structure and Infrastructure Engineering 2025年

作者： Fabianowski, Dariusz Jakiel, Przemyslaw Rydel, Marek Bialic, Grzegorz Stanislawski, Rafal Faculty of Civil Engineering and Architecture Opole University of Technology Opole Poland Department of Computer Science Opole University of Technology Opole Poland

Planning of rehabilitation work is important for the safety of transport infrastructure. This problem needs to be properly solved, therefore a new algorithm for planning railway bridge maintenance is proposed. The input data come from periodic inspections that assess the technical condition of a bridge. These assessments are processed using hybrid Extended Fuzzy Analytic Hierarchy Process and Dominant Analytic Hierarchy Process methods. The main part of the algorithm is the Statistic Bridge Analyser, which allows a multi-variant analysis of the impact of inaccuracy and uncertainties in sub-assessments. It also takes into account a relationship between individual bridge components and estimates missing assessments using archive data. The algorithm performance has been confirmed by analysing nine different scenarios involving ranking of 10 selected railway bridges on Maintenance, Repair & Rehabilitation (MR&R) list. It has been demonstrated that even a small error in the sub-assessment of the technical condition of one element can result in a significant change in assessment of the bridge technical condition. Considering the relationship between criteria also generates changes in the final assessment of the bridge technical condition and may result in changes in position on MR&R list. This allows to avoid sudden failures, especially with limited financial resources. © 2025 Informa UK Limited, trading as Taylor & Francis Group.

关键词： Railroad bridges

来源：评论

学校读者我要写书评

暂无评论

Use of Kohonen Maps as feature selector for selective attention brain-computer interfaces

Use of Kohonen Maps as feature selector for selective attent...

引用

2nd International Work-Conference on the Interplay Between Natural and Artificial Computation, IWINAC 2007

作者： Lopez, Miguel Angel Pomares, Hector Damas, Miguel Prieto, Alberto De La Hernandez, Eva Maria Plaza Department of Computer Architecture and Computer Technology University of Granada

ISBN: (纸本)3540730524

Selective attention to visual-spatial stimuli causes decrements of power in alpha band and increments in beta. For steady-state visual evoked potentials (SSVEP) selective attention affects electroencephalogram (EEG) recordings, modulating the power in the range 8-27 Hz. The same behaviour can be seen for auditory stimuli as well, although for auditory steady-state response (ASSR), it is not fully confirmed yet. The design of selective attention based braincomputer interfaces (BCIs) has two major advantages: First, no much training is needed. Second, if properly designed, a steady-state response corresponding to spectral peaks can be elicited, easy to filter and classify. In this paper we study the behaviour of Kohonen Maps as feature selector for a selective attention to auditory stimuli based BCI system. © Springer-Verlag Berlin Heidelberg 2007.

关键词： Feature extraction

来源：评论

学校读者我要写书评

暂无评论

Signal processing and perceptrons in an auditory based brain-computer interface

Signal processing and perceptrons in an auditory based brain...

引用

8th International Conference on Hybrid Intelligent Systems, HIS 2008

作者： Lopez, M.A. Pomares, H. Prieto, A. Pelayo, F. Department of Computer Architecture and Computer Technology University of Granada

ISBN: (纸本)9780769533261

Selective attention to visual or auditory stimuli that elicits steady-state visual or auditory responses (SSVEP or ASSR respectively) amplifies the power of those flickering frequencies of the stimuli measured in the electroencephalography (EEG). The design of brain-computer interfaces (BCI) based on selective attention to auditory stimuli that elicits ASSRs has two major advantages: First, no much training is needed as selective attention is an inherent skill of human beings. Second, as the human hearing system behaves as an amplitude modulated (AM) envelope detector, if the auditory stimuli are previously AM modulated, a steady-state response signal can be easily elicited. As EEG signals are considered to be non stationary, this is an interesting approach to EEG analysis as the feature of our interest can be considered stationary, hence Fourier analysis applied. In this paper we study the behavior of a Perceptron as a classifier of a BCI system where the features for classification are extracted from EEG as responses to AM modulated auditory stimuli and how we can use it in a BCI system. © 2008 IEEE.

关键词： Brain computer interface

来源：评论

学校读者我要写书评

暂无评论

IEEE 8th VR Workshop on Sonic Interactions for Virtual Environments

IEEE 8th VR Workshop on Sonic Interactions for Virtual Envir...

引用

Virtual Reality and 3D User Interfaces Abstracts and Workshops (VRW), IEEE Conference on

作者： Stefania Serafin Ali Adjorlu Rolf Nordahl Federico Fontana Michele Geronazzo Tifanie Bouchara Florent Berthaut Romain Michon Dorte Hammershøj Lorenzo Picinali Department of Architecture Design and Media Technology Aalborg University Copenhagen Denmark Department of Mathematics Computer Science and Physics University of Udine Udine Italy Department of Engineering and Management University of Padova Vicenza Italy LISN CNRS Université Paris-Saclay France CRIStAL CNRS Univ. Lille Lille France INRIA Lyon France Department of Electronic Systems Aalborg University Denmark Dyson School of Design Engineering Imperial College London London UK

ISBN: (数字)9798331514846

ISBN: (纸本)9798331525637

Sonic interaction design is defined as the study and exploitation of sound as one of the principal channels conveying information, meaning, and aesthetic/emotional qualities in interactive contexts. This field lies at the intersection of interaction design, and sound and music *** the virtual reality community, the focus of research on topics related to auditory feedback has been rather limited when compared, for example, to the focus placed on visual feedback or even on haptic feedback. However, in such communities as film production or product sound design it is well known that sound is a powerful way to communicate meaning and emotion to a scene or a *** 2025 is the 8th of a series of workshops, whose main goal is to increase awareness among the virtual reality community of the importance of sonic elements when designing virtual/augmented/mixed reality (XR hereafter) environments. Participants to the workshop will also discuss how research in other related fields such as film sound theory, product sound design, sound and music computing, game sound design, and accessibility can inform designers of XR environments. Moreover, the workshop will feature state-of-the-art research in the field of sound for XR environments.

关键词： Visualization Three-dimensional displays Conferences Spatial audio Music Virtual environments Production Games User interfaces Haptic interfaces

来源：评论

学校读者我要写书评

暂无评论

Reliable Multihop Routing and Congestion Aware Chicken Swarm Optimization in Vehicular Ad-Hoc Network

Reliable Multihop Routing and Congestion Aware Chicken Swarm...

引用

Integrated Circuits and Communication Systems (ICICACS), IEEE International Conference on

作者： Cuddapah Anitha Dalia Al-Tarazi GD. Vignesh A. Vinotha Vasuki Jayant Giri M. Dinesh Department of Computer Science and Engineering School of Computing Mohan Babu University Erstwhile Sree Vidyanikethan Engineering College Tirupati India Department of Architecture Engineering Faculty of Engineering Zarqa university Zarqa Jordan College of Engineering University of Business and Technology Jeddah Saudi Arabia Department of Electronics and Communication Engineering St. Joseph's College of Engineering Chennai India Department of Computer Science and Engineering J.P. College of Engineering Tenkasi India Department of Mechanical Engineering Yeshwantrao Chavan College of Engineering Nagpur India Division of Research and Development Lovely Professional University Phagwara India Department of VLSI Microelectronics Saveetha School of Engineering Saveetha Institute of Medical and Technical Sciences (SIMATS) Chennai India

ISBN: (数字)9798331508456

ISBN: (纸本)9798331508463

关键词： Vehicular ad hoc networks Routing Throughput Synchronization Resource management Dedicated short range communication Particle swarm optimization Artificial intelligence Vehicle dynamics Testing

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：