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International Conference on Emerging Technologies and Factory Automation (ETFA)

作者： Huiyun Sheng Michael Schwarz Josef Börcsök Department of Computer architecture and System programming University of Kassel Kassel Germany

ISBN: (纸本)9781467347358

This paper proposes a continuous, non-invasive blood pressure monitoring system concept, which uses a safety microprocessor to connect sensors for building a body sensor network. The changes in Pulse Transit Time (PTT) can be detected with the sensor network. The microprocessor gathers the PTT and other vital signs of the patient to derive changes in blood pressure. Through the new Bluetooth protocol for safety systems, the current blood pressure value can be sent to a variety of terminals present in the wireless network, such as mobile phone, PC and medical monitoring systems. The 1oo2 architecture of the used microprocessor can provide high safety to a rating of safety integrity level 3 (SIL3), thus the whole network can meet the safety required in medical care systems.

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FPGA-based wireless sensor network platform for safety systems

FPGA-based wireless sensor network platform for safety syste...

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International Conference on Telecommunications (ICT)

作者： Ali Hayek Bashier Machmur Yusuf Suna Josef Börcsök Computer Architecture and System Programming University of Kassel Kassel Germany

Sensor communication applications not only require high performance processing but also flexible and reliable computing. Today, standard microprocessor systems are still application oriented and aren't suitable by implication for reliability-related and safety-related applications. In order to achieve a certain safety integrity level (SIL), several measures, methodologies and especially additional components should be considered, which leads to more and more complex systems. For this reason, new application devices should be targeted. In this context, reconfigurable devices such as SRAM-based Field Programmable Gates Arrays (FPGAs) provide a suitable solution due to their flexibility, and the necessary computing performance at affordable design cost and time. In fact, SRAM-Based FPGAs are nowadays frequently used in embedded communication systems due to their design flexibility and reconfigurability. This paper presents a prototyping platform for an FPGA-based safety-related communication system for a wireless sensor network. As a case study an acceleration sensor application is introduced.

关键词： Field programmable gate arrays Hardware Safety computer architecture Acceleration Monitoring Software

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FPGA-based wireless sensor network for safety-related cognitive systems

FPGA-based wireless sensor network for safety-related cognit...

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International Symposium on Telecommunications (BIHTEL)

作者： Ali Hayek Yusuf Suna Michael Schreiber Josef Börcsök Chair for Computer Architecture and System Programming University of Kassel Kassel Germany

Wireless sensor networks for monitoring and steering industrial systems have emerged as an important new application area for wireless embedded technology in safety-related systems. Therefore several hardware platforms can be targeted. Due to their flexibility and reconfigurability along with high performance and power efficiency, modern Field Programmable Gate Arrays (FPGAs) are an excellent platform to realize such intelligent sensor networks. On one hand, FPGAs can integrate embedded processors and on-chip memory into a single die and can be easily configured to interface with a wide variety of popular communications protocols like SPI, UART and I2C, which are used for sensor communication. On the other hand, the reconfigurability of FPGAs supports the design of self-organizing computing systems, which are increasingly used in sensor applications. In this paper an FPGA-based wireless smart sensor network that integrates acceleration sensors for increasing safety aspects in cognitive systems used for industrial communication is presented.

关键词： Field programmable gate arrays Wireless LAN Robot sensing systems Acceleration Graphical user interfaces Software Hardware

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SRAM-based FPGA design techniques for safety related systems conforming to IEC 61508 a survey and analysis

SRAM-based FPGA design techniques for safety related systems...

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International Conference on Advances in Computational Tools for Engineering Applications, ACTEA

作者： Ali Hayek Josef Börcsök Chair of Computer Architecture and System Programming University of Kassel Kassel Germany

With the announcement and development of safety standards such as IEC 61508 and DO-254 standards a basis for the implementation of qualitative and quantitative analyzes in the areas of reliability and safety for electronic safety-related systems was laid. Especially with the publication of the second edition of the standard IEC 61508 standard and the introduction of new aspects such as on-chip redundancy and the use of integrated systems in such systems is becoming increasingly attractive. SRAM-based FPGAs are considered as the mainstream FPGA technology and represent an excellent platform for the development of system-on-chips due to their complexity and programming flexibility. In this paper, the implementation of FPGA-based safety-related systems according to the standard IEC 61508 is targeted. First, the advantages and challenges of FPGAs for the use in such systems are presented. Afterwards, measures and methodologies are discussed, which are required for the implementation of such systems. Finally suitable FPGA implementation of these measures is presented.

关键词： Field programmable gate arrays Safety IEC standards Hardware Software systematics

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New scientific contributions to the prediction of the reliability of critical systems which based on imperfect debugging method and the increase of quality of service

New scientific contributions to the prediction of the reliab...

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International Symposium on Telecommunications (BIHTEL)

作者： Ossmane Krini Josef Börcsök Computer Architecture and System Programming University of Kassel Kassel Germany Universitat Kassel Kassel Hessen DE

This paper presents a new method by which it is possible to realistically predict the software reliability of critical systems. The main feature of this method is that it allows estimating the number of remaining critical faults in the software. The algorithm employs well-known methods such as Imperfect Debugging and it provides a more reliable prognosis than the methods conventionally used for this purpose. Furthermore, the new approach describes two processes of handling critical failures (one for detection and one for correction). The new algorithm also takes into account the socalled repair time, a measurement that is vitally important for a reliable prognosis. For use in the prediction model, it is mathematically described as a time function. As every programmer knows, it can be difficult to have even the simplest program run without faults. So-called software reliability models (SRM's), based on stochastic and aiming to predict the reliability of both software and hardware, have been used since the 70's. SRM's rely on certain model assumptions some of which cannot be deemed realistic anymore. Hence, for today's reliability engineering, these models are insufficient. At this point in time, though, there are hardly any methods that enable us to obtain predictions as to how the reliability of critical faults or the failure rate of critical systems behave over time. Currently, there is no mathematical model distinguishing between critical and non-critical faults, and only few models consider Imperfect Debugging (ID). The method presented here, however, is based on ID and it is able to distinguish between critical and non-critical software faults. Moreover, this new method employs a so-called Time-Delay and thus two new processes have to be designed. Mathematically, these processes describe the detection of faults and their correction, respectively. It is necessary to define appropriate distribution functions and to clearly state the requisite model assumptions.

关键词： Reliability IP networks Lead Debugging

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The relationship between diagnostic coverage and proof test interval for 1002 and 1002D architectures

The relationship between diagnostic coverage and proof test ...

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13th IFAC Symposium on Control in Transportation systems, CTS 2012

作者： Üstoǧlu, Ilker Kaymakçi, Özgür T. Börcsök, Josef Yildiz Technical University Davutpaşa Campus A209 34220 34220 Esenler Istanbul Turkey Yildiz Technical University Davutpaşa Campus A210 34220 34220 Esenler Istanbul Turkey University Kassel Faculty of Electrical Engineering / Computer Science Department of Computer Architecture and System Programming Wilhelmshöher Allee 71 34121 Kassel Germany

ISBN: (纸本)9783902823137

In order to measure the effectiveness of safety protection systems there are several design parameters. Diagnostic coverage factor is one of the most important parameter which influences all architectures. In this short paper the relationship between PFDavg, DC and TI are presented. 1002 and 1002D architectures are considered as examples. © 2012 IFAC.

关键词： architecture

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Degradable on-chip safety controller with intra-chip communication for steer-by-wire systems

Degradable on-chip safety controller with intra-chip communi...

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International Symposium on Telecommunications (BIHTEL)

作者： Ali Hayek Evzudin Ugljesa Michael H. Schwarz Josef Börcsök Adnan Salihbegovic Chair for Computer Architecture and System Programming University of Kassel Kassel Germany Faculty of electrical engineering University of Sarajevo Sarajevo Bosnia and Herzegovina

High reliability and high availability are essential aspects for all critical elements used in automotive applications. This is particularly true for control and steering systems. In this regard, numerous steer by wire (x-by-wire) concepts were developed over the years. Most of them considered only standard single microcontroller system architectures with a low degree of reliability according to international reliability and safety standards. This paper presents a novel concept for a degradable safety controller for steer-by-wire systems. Based on a safety-related 1004-architecture, the presented concept offers higher safety, reliability and availability.

关键词： Safety IEC standards ISO standards Vehicles system-on-a-chip Redundancy

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A partially automated HiL test environment for model-based development using Simulink® and OPC technology

A partially automated HiL test environment for model-based d...

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2011 23rd International Symposium on Information, Communication and Automation Technologies, ICAT 2011

作者： Chaaban, W. Schwarz, M. Batchuluun, B. Sheng, H. Börcsök, J. Department of Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9781457707469

This paper is concerned with the design procedures of an automated testing tool, developed in Matlab®/Simulink® environment, that performs software verification during runtime on a PLC (Programmable Logic Controller) or so called HiL test (Hardware-in-the-Loop) for model-based development of control applications. In addition to checking the "semantic" or "functional" correctness of the automatically generated C++ - Code with RTW (Real Time Workshop®) for algorithms designed and developed in Simulink® on hardware targets, the tool compares results obtained from the HiL test with the results of the MiL test (Model-in-the-Loop) performed in early stage of development for the same developed application. The main purpose behind this work is to develop reliable software that fulfil system requirements and to test its behaviour during realtime hardware simulation, in order to achieve the validation step which represents the terminating - step of almost all projects. © 2011 IEEE.

关键词： Simulink

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Instruction based Built-in-Testing of Instruction Select Multiplexer in Arithmetic Logic Unit

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Journal of Physics: Conference Series 2012年第1期364卷

作者： P Tsoozol J Börcsök M Schwarz Department of Computer Architecture and System Programming University of Kassel Germany

Due to the complexity of microprocessor, an efficient testing is a crucial point and serious challenge in safety systems. A new instruction opcode for ALU based Built-In-Test (BIT) is proposed in this paper. With this novel method stuck-at-fault in Multiplexer (MUX) for Arithmetic Logic Unit (ALU) can be determined. A model that consists of the command and faulty states is developed. According to the designed state model, an algorithm and pseudo program that tests the stuck-at-fault in MUX is implemented and described in this paper.

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A New Method to Detect and Correct the Critical Errors and Determine the Software-Reliability in Critical Software-system

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Journal of Physics: Conference Series 2012年第1期364卷

作者： Ossmane Krini Josef Börcsök Department of Computer Architecture and System Programming University of Kassel Germany

In order to use electronic systems comprising of software and hardware components in safety related and high safety related applications, it is necessary to meet the Marginal risk numbers required by standards and legislative provisions. Existing processes and mathematical models are used to verify the risk numbers. On the hardware side, various accepted mathematical models, processes, and methods exist to provide the required proof. To this day, however, there are no closed models or mathematical procedures known that allow for a dependable prediction of software reliability. This work presents a method that makes a prognosis on the residual critical error number in software. Conventional models lack this ability and right now, there are no methods that forecast critical errors. The new method will show that an estimate of the residual error number of critical errors in software systems is possible by using a combination of prediction models, a ratio of critical errors, and the total error number. Subsequently, the critical expected value-function at any point in time can be derived from the new solution method, provided the detection rate has been calculated using an appropriate estimation method. Also, the presented method makes it possible to make an estimate on the critical failure rate. The approach is modelled on a real process and therefore describes two essential processes - detection and correction process.

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