With increasing defect density, microprocessors, especially the embedded caches, will encounter more faults. Adding spare resources to replace defective components is a widely accepted method for yield enhancement. In...
With increasing defect density, microprocessors, especially the embedded caches, will encounter more faults. Adding spare resources to replace defective components is a widely accepted method for yield enhancement. In this work, a repair method using content addressable memory combined with spare bits, as well as a novel fault injection method is proposed. With the proposed fault injection technique, various numbers and types of faults can be flexibly injected into the silicon. A wireless sensor network system using our self-repairable microprocessor (SRP) is developed to prove the effectiveness of the proposed technique.
In this paper, we describe the formatting guidelines for ACM SIG Proceedings. Traditionally silence in VoIP applications is detected by a VAD algorithm after G.729 compression, both have high computational and energy ...
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Energy efficiency has become an important concern for the design of communication systems, particularly the wireless sensor networks where recharging battery might not be feasible. In this paper, we investigate how er...
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The purpose of this paper is to explore the collaborative planning and design process of an innovative future school. Our case study examined, modeled, and further developed this planning and design process aiming to ...
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ISBN:
(纸本)9789512295470
The purpose of this paper is to explore the collaborative planning and design process of an innovative future school. Our case study examined, modeled, and further developed this planning and design process aiming to create a more wide-ranging place and space for learning than a mere school building We wanted to find out what kind of collaboration and network management would support the participatory planning and design process, and how it would be possible to make children's and youth's opinions visible and to accomplish collaboration in the design process. The case data was collected from a SimLab™ simulation project and architecture workshops. Our findings indicate that that the process of planning and designing innovative future schools require seamless collaboration between various actors and stakeholders, such as architects, pedagogy experts, future school users, and municipal decision makers. Furthermore, the network management aspect should be taken into account to make the collaborative design process more fruitful. Especially, the role of boundary objects was observed to be important both for supporting collaboration and participation in the design process, and for making children 's and youth's opinions visible.
Since Japan is limited in area, the effective ocean space development is very important and urgent subject. Concerning a research and development of effective ocean space utilization, the MEGA-FLOAT was one of the mos...
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ISBN:
(纸本)9780791848234
Since Japan is limited in area, the effective ocean space development is very important and urgent subject. Concerning a research and development of effective ocean space utilization, the MEGA-FLOAT was one of the most famous projects in Japan that had the purpose of a floating airport construction, and the numerous R & D were conducted aiming at actual construction and those results were reported in respect of conceptual design, construction method, fluid analysis, structural dynamic analysis, environment issue etc.. However, the end was faced without achieving it, it can be said that the effect is large. After the end of that project, the realistic, small or medium size structure began to be paid to attention. As the good example of such a kind floating structure, floating pier and disaster prevention base having an advantage against an(Figure Presented) earthquake, floating restaurant etc. were constructed shown in Figure 1. In this paper, assuming the small size floating restaurant, the wave response analysis was studied, and the habitability of that structure was evaluated from the response calculation results. Concretely, the floating base part;barge type of the restaurant building was designed by the Class NK (Rules and Guidance for the survey and construction of steel ships. Part Q Steel barges). The calculation model consists of a three-story building and the base, that floating artificial base supporting the building was assumed by the elastic plate structural system, and also that building was of the frame structure system. In order to structural analysis, the restaurant model of two different structural systems was united into one body system. In this paper, it is called the hybrid structural system. Fluid effect was analyzed as the fluid-structural interaction problem. Concretely, the Boundary Integral Equation Method (BIEM) was used here, and the wave response calculation was demonstrated by that forces. The evaluation of habitability of the restaurant
Allocation order is the best for locality, which slide mark compact algorithm is based on. But traditional design made the algorithm's overhead too large. We proposed a fast slide mark compact algorithm, which red...
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Allocation order is the best for locality, which slide mark compact algorithm is based on. But traditional design made the algorithm's overhead too large. We proposed a fast slide mark compact algorithm, which reduces the overhead by mark bit table, live block pool and offset table. The results show that it achieves up to 8.9% speedup in industry-standard benchmark SPEC JVM98 on the Pentium 4, 11% improvement in dtlb miss numbers and 13.6% reduce with L2 cache miss numbers.
Cellular automata (CA) is a bio-inspired processing model for problem solving, initially proposed by Von Neumann. This approach modularizes the processing by dividing the solution into synchronous cells that change th...
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Cellular automata (CA) is a bio-inspired processing model for problem solving, initially proposed by Von Neumann. This approach modularizes the processing by dividing the solution into synchronous cells that change their states at the same time in order to get the solution. The communication between them is crucial to achieve the correct solution. On the other hand, the address-event-representation (AER) is a neuromorphic communication protocol for transferring asynchronous events between VLSI chips. These neuro-inspired implementations have been used to design sensor chips (retina, cochleas), processing chips (convolutions, filters) and learning chips, which makes it possible to develop complex, multilayer, multichip neuromorphic systems. This paper presents the fusion of both bio-inspired solutions for implementing a vision filter based on 3times3 convolutions. The GLIDER software tool for developing CA has been used to implement the filter in VHDL and synthesize it into the Spartan II 200 of the USB-AER.
The problem of selecting an adequate set of variables from a given data set of a sampled function becomes crucial by the time of designing the model that will approximate it. Several approaches have been presented in ...
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The characteristics of advanced integrated circuit technologies require architects to look for new ways to utilize large numbers of gates and mitigate the effects of high interconnect delays. Chip multiprocessors (CMP...
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The characteristics of advanced integrated circuit technologies require architects to look for new ways to utilize large numbers of gates and mitigate the effects of high interconnect delays. Chip multiprocessors (CMPs) exploit increasing transistor counts by placing multiple processors on a single die. As the chip multiprocessors (CMPs) have become the trend of high performance microprocessors, the target workloads become more and more diversified. Due to the wire delay problem and diversity of applications, neither private nor shared caches can provide both large capacity and fast access in CMPs. A novel CMP cache design, the heterogeneous CMP cache (HCC) is presented, in which chips are constructed by tiles of two different categories. L2 caches of private tiles provide lowest hit latency and L2 cache of shared tiles increases the effective cache capacity for shared data. Incorporating indirect-index cache technology to share capacity between different hierarchies, HCC provide a both capacity-effective and access-fast on-chip memory subsystem. Detailed full-system simulations are used to analyze the HCC performance for various programs, including SPEC CPU2000, SPLASH2 and commercial workloads. The result shows that HCC improves performance by 16% for single-threaded benchmarks and 9% for multi-thread benchmarks. HCC is easy to implement and the design ideas will be used in the future multi-core processors of Godson series.
This paper presents a statistical parameter analysis of the ant colony optimization algorithm that was implemented to solve the bi-criteria military path-finding problem. Three parameters have been studied using analy...
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This paper presents a statistical parameter analysis of the ant colony optimization algorithm that was implemented to solve the bi-criteria military path-finding problem. Three parameters have been studied using analysis of variance (ANOVA) in order to identify their influence in the results and the most suitable values for them: number of ants, number of iterations and exploration/exploitation factor. In addition, a mean analysis has been performed in order to complete the conclusions obtained. The study has yielded optimal values for the parameters under study, and some internal relationships between them have been identified.
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