This paper presents a robust fault diagnosis scheme for abrupt and incipient faults in nonlinear uncertain dynamical systems. A detection and approximation estimator is used for online health monitoring. Once a fault ...
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This paper presents a robust fault diagnosis scheme for abrupt and incipient faults in nonlinear uncertain dynamical systems. A detection and approximation estimator is used for online health monitoring. Once a fault is detected, a bank of isolation estimators are activated for the purpose of fault isolation. A key design issue of the proposed fault isolation scheme is the derivation of adaptive residual thresholds associated with each isolation estimator. An occurred fault is isolated if the residual associated with the matched isolation estimator remains below its corresponding adaptive threshold, while at least one of the components of the residual associated with all other estimators exceeds its threshold at some finite time. Fault isolability conditions are derived for both the abrupt and the incipient fault cases, guaranteeing that the diagnosis scheme reaches the correct decision in finite time.
In this paper, an, analysis of test time by CBET (which is an acronym for Combination of BIST and External Test) test approach is presented. The analysis validates that CBET test approach can achieve shorter testing t...
In this paper, an, analysis of test time by CBET (which is an acronym for Combination of BIST and External Test) test approach is presented. The analysis validates that CBET test approach can achieve shorter testing t...
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In this paper, an, analysis of test time by CBET (which is an acronym for Combination of BIST and External Test) test approach is presented. The analysis validates that CBET test approach can achieve shorter testing time than both external test and BIST in many situations. An efficient test time minimization algorithm for CBET-based LSIs is also proposed. It uses several characteristics of CBET test approach derived by the analysis to reduce computation time to find the optimum test sets. The algorithm helps designers to save their precious design time.
We propose an adaptive redundancy control scheme for a systematic erasure coding scheme to transmit real time data in the Internet. Since the recovery rate of packet loss depends on the amount of redundancy data, we u...
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We propose an adaptive redundancy control scheme for a systematic erasure coding scheme to transmit real time data in the Internet. Since the recovery rate of packet loss depends on the amount of redundancy data, we use the redundancy estimation algorithm which considers the loss burstiness. The Gilbert model is used for modeling the loss process and adjusting the number of redundant packets. Analysis and experimental results show that the proposed scheme is efficient for loss recovery in a consecutive loss environments like the Internet.
It is known that in the absence of distortion, the minimum average sampling density for a multiband signal is given by its spectral occupancy. Furthermore, there exist nonuniform sampling patterns of the same average ...
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It is known that in the absence of distortion, the minimum average sampling density for a multiband signal is given by its spectral occupancy. Furthermore, there exist nonuniform sampling patterns of the same average sampling density such that reconstruction is feasible even if the actual spectral support of the multiband signal is unknown. This is called spectrum-blind nonuniform sampling. However, if the samples are distorted, an increased sampling density may lead to superior reconstruction.
As software systems evolve over a series of releases, it becomes important to know which components are stable compared to components that show repeated need for corrective maintenance. To track these across multiple ...
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As software systems evolve over a series of releases, it becomes important to know which components are stable compared to components that show repeated need for corrective maintenance. To track these across multiple releases, we adapt a reverse architecting technique to defect reports of a series of releases. Fault relationships among system components are identified based on whether they are involved in the same defect report, and for how many defect reports this occurs. There are degrees of fault-coupling between components depending on how often these components are involved in a defect fix. After these fault-coupling relationships between components are extracted, they are abstracted to the subsystem level. We also identify a measure for fault cohesion (i.e. fault-proneness of components locally). The resulting fault architecture figures show for each release what its most fault-prone relationships are. Comparing across releases makes it possible to see whether some relationships between components are repeatedly fault-prone, indicating an underlying systemic architecture problem. We illustrate our technique on a large commercial system consisting of over 800 KLOC of C, C++, and microcode.
Several structures for fixed-lag (FL) soft-in/soft-out (SISO) algorithms in the case of a perfectly known channel are well-known. These forward-only and bi-directional fixed-lag SISOs have been described with the bi-d...
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Several structures for fixed-lag (FL) soft-in/soft-out (SISO) algorithms in the case of a perfectly known channel are well-known. These forward-only and bi-directional fixed-lag SISOs have been described with the bi-directional version shown to be preferred. Adaptive iterative detection using adaptive SISOs (A-SISOs) have also been demonstrated to provide significant performance gains for time-varying channels. However, these impressive results have been obtained with fixed-interval, bi-directional A-SISOs and training signals at both ends of the data packet. We combine these results to develop and compare various adaptive, fixed-lag SISOs. Among several reasonable options considered, the preferred A-SISO algorithm is found to be bi-directional with forward-only channel estimation.
As systems become increasingly complex and existing methodologies become insufficient to handle the complexity, the design community is beginning to look at formal methods for a possible solution. Techniques involving...
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As systems become increasingly complex and existing methodologies become insufficient to handle the complexity, the design community is beginning to look at formal methods for a possible solution. Techniques involving a limited use of formal techniques (such as semi-formal methods and equivalence checking) have given a glimpse of what full usage of formal techniques can achieve. For the use of formal methods to be a widely accepted methodology among designers, it must provide the designers with the capabilities of structuring specifications in a manner similar to the structuring they are used to using with programming languages. In this paper, we provide a description of the structuring capabilities of VSPEC (VHDL SPECification), a requirements specification language for VHDL. These capabilities include the use of multiple pre- and post-condition pairs within a single specification and combination of specifications using common Boolean operators.
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