A description is given of two known strategies for static-processor allocation in an n-cube multiprocessor, namely, the buddy-system strategy and the gray-code strategy. A strategy is proposed that outperforms the fir...
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A description is given of two known strategies for static-processor allocation in an n-cube multiprocessor, namely, the buddy-system strategy and the gray-code strategy. A strategy is proposed that outperforms the first by (n-k+1) and the second by (n-k+1)/2 in a cube recognition. The authors' strategy is suitable for static as well as dynamic processor allocation, and it results in less system fragmentation, more subcube recognition, and higher fault tolerance. The authors also introduce an extension to their strategy that will enhance the performance drastically so that their algorithm together with the extension will outperform the buddy system by a factor of (k(n-k)+1) and the gray strategy by (k(n-k)+1)/2 in cube recognition. The implementation details for these algorithms are described.< >
General requirements for software process specification languages are discussed. A first prototype software process specification language is presented, its application is demonstrated, and software-engineering-relate...
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General requirements for software process specification languages are discussed. A first prototype software process specification language is presented, its application is demonstrated, and software-engineering-related requirements for a supporting information base are derived. Efforts aimed at implementing the information-base requirements are briefly mentioned. This work is part of the Meta Information Base project at the University of Maryland.< >
The authors consider both centralized and distributed fault-tolerant schemes. Based on stochastic Petri net models, they investigated the performance of these two approaches by considering the levels in the hierarchic...
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The authors consider both centralized and distributed fault-tolerant schemes. Based on stochastic Petri net models, they investigated the performance of these two approaches by considering the levels in the hierarchical system independently. In the case of decentralized fault tolerance, they considered two different checkpointing strategies. In the first scheme, called the arbitrary checkpointing strategy, each process does its checkpointing independently; as a result, there is the possibility of domino effect. In the planned strategy, checkpointing is done in a manner which ensures that there is no domino effect. The results show that for certain cases, the arbitrary checkpointing strategy can perform better than the planned strategy. The authors also studied the effect of integration on the fault-tolerant strategies of the various levels.< >
Analytical models are presented that use Petri nets for fault-tolerant schemes used in distributed systems. These models are used in the quantitative evaluation and selection of good fault-tolerant schemes for specifi...
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Analytical models are presented that use Petri nets for fault-tolerant schemes used in distributed systems. These models are used in the quantitative evaluation and selection of good fault-tolerant schemes for specific system configurations. Several different fault-tolerant schemes that can be modeled using Petri nets are discussed in detail. These schemes include rollback recovery with checkpointing, recovery blocks, N-version programming, and conversations. After a brief review of Petri net models, extension of the Petri net models to incorporate fault-tolerant schemes is considered. A methodology for evaluating a fault-tolerant scheme for a specific system configuration and the steps involved in building a Petri net model of a fault-tolerant system are described. The subnet primitives involved in building these models are identified and an algorithm for building the models automatically is described. Examples illustrating this extended Petri net model are discussed and numerical results are presented to show the applicability of the models.< >
Motion planning for a point robot is studied in a two-dimensional time-varying environment. The obstacle is a convex polygon that moves in a fixed direction at a constant speed. The point to be reached (referred to as...
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Motion planning for a point robot is studied in a two-dimensional time-varying environment. The obstacle is a convex polygon that moves in a fixed direction at a constant speed. The point to be reached (referred to as the destination point) also moves along a known path. The concept of accessibility from a point to a moving object is introduced, and it is used to define a graph on a set of moving obstacles. The graph is shown to exhibit an important property, that is, if the moving point is able to move faster than any of the obstacles, a time-minimal path is given as a sequence of edges in the graph. An algorithm is described for generating a time-minimal path, and its execution time is analyzed.< >
作者：
S. WeissDepartment of Computer Science
University of Maryland - BC Baltimore MD and Institute for Advanced Computer Studies University of Maryland - CP College Park MD
One of the most noticeable differences between the CRAY-2 and its predecessors, the CRAY-1 and the CRAY X-MP, is a significantly longer memory path. This is a consequence of increasing the size of the memory at the ex...
ISBN:
(纸本)9780897913195
One of the most noticeable differences between the CRAY-2 and its predecessors, the CRAY-1 and the CRAY X-MP, is a significantly longer memory path. This is a consequence of increasing the size of the memory at the expense of the bank access time. With a longer memory path, the impact of bank conflicts becomes more apparent. In this paper we study a storage strategy for vector processors that has the following properties: (1) it is aperiodic, (2) it tends to distribute references more uniformly over the memory banks, (3) the implementation of the addressing hardware is straightforward, and (4) the delay added to the memory path is minimal. The first two properties help in reducing the frequency of bank conflicts.
A major requirement of database systems in engineering design and manufacturing applications is support for storage and maintenance of complex objects. Frame-based systems are capable of modeling complex objects. Howe...
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A major requirement of database systems in engineering design and manufacturing applications is support for storage and maintenance of complex objects. Frame-based systems are capable of modeling complex objects. However, many of these systems are implemented in main memory. As the number of objects to be sorted far exceeds the capacity of the main memory of a computer, such an implementation is often unusable. An implementation of a frame-based system on top of the POSTGRES extensible database system is presented. Such an implementation combines the advantages of database management and frame-based systems and allows for the development of large engineering applications with minimal effort.< >
Test sequences are used for the conformance testing of communication protocols to standards. This paper discusses a new approach to generating test sequences. The approach is based on probabilistic concepts about prot...
ISBN:
(纸本)9780897913324
Test sequences are used for the conformance testing of communication protocols to standards. This paper discusses a new approach to generating test sequences. The approach is based on probabilistic concepts about protocol state transitions and communication channels. The novel feature of the test sequences generated by this technique is that the most probable states of a protocol will be tested more promptly.
One of the most noticeable differences between the CRAY-2 and its predecessors, the CRAY-1 and the CRAY X-MP, is a significantly longer memory path. This is a consequence of increasing the size of the memory at the ex...
详细信息
One of the most noticeable differences between the CRAY-2 and its predecessors, the CRAY-1 and the CRAY X-MP, is a significantly longer memory path. This is a consequence of increasing the size of the memory at the expense of the bank access time. With a longer memory path, the impact of bank conflicts becomes more apparent. In this paper we study a stor- age strategy for vector processors that has the following properties: (1) it is aperiodic, (2) it tends to distribute references more uniformly over the memory banks, (3) the implementation of the addressing hardware is straightforward, and (4) the delay added to the memory path is minimal. The first two properties help in reducing the frequency of bank conflicts.
We report on a detailed study of the systematic errors in the pseudofermion algorithm on a 103 × 32 lattice at gauge coupling β = 5.7 and with three flavors of staggered dynamical quarks of mass m = 0.10, 0.05. ...
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