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Annual International Conference of the IEEE engineering in Medicine and Biology Society (EMBC)

作者： Su Wang C.-I. Chang Sheng-Chih Yang Giu-Cheng Hsu Hsian-He Hsu Pau-Choo Chung Shu-Mei Guo San-Kan Lee Remote Sensing Signal and Image Processing Laboratory Department of Computer Science and Electrical Engineering University of Maryland Baltimore County Baltimore MD USA Department of Electrical Engineering National Cheng Kung University Taiwan Department of Radiology Tri-Service General Hospital and National Defense Medical Center Taipei Taiwan Department of Computer Science and Information Engineering National Cheng Kung University Taiwan Administrative Office Suao Veterans Hospital Yilan Taiwan

Receiver operating characteristics (ROC) has been widely used as a performance evaluation tool to measure effectiveness of medical modalities. It is derived from a standard detection theory with false alarm and detection power interpreted as false positive (FP) and true positive (TP) respectively in terms of medical diagnosis. The ROC curve is plotted based on TP versus FP via hard decisions. This paper presents a three dimensional (3D) ROC analysis which extends the traditional two-dimensional (2D) ROC analysis by including a threshold parameter in a third dimension resulting from soft decisions, (SD). As a result, a 3D ROC curve can be plotted based on three parameters, TP, FP and SD. By virtue of such a 3D ROC curve three two-dimensional (2D) ROC curves can be derived, one of which is the traditional 2D ROC curve of TP versus FP with SD reduced to hard decision. In order to illustrate its utility in medical diagnosis, its application to magnetic resonance (MR) image classification is demonstrated

关键词： Image analysis Biomedical imaging Radar detection Medical diagnosis Detectors computer science Hospitals Medical diagnostic imaging Magnetic analysis Performance analysis

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A preamble-aided symbol and frequency synchronization scheme for OFDM systems

A preamble-aided symbol and frequency synchronization scheme...

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IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005

作者： Wu, Meng Zhu, Wei-Ping Centre for Signal Processing and Communications Department of Electrical and Computer Engineering Concordia University Montreal QC Canada

ISBN: (纸本)9780780388345

Orthogonal frequency division multiplexing isconsidered to be an appealing modulation technique for high-speed wireless communication systems owing to its spectral efficiency and robustness against multipath fading. However, an OFDM system is very sensitive to synchronization and a small frequency or timing offset maycause a large inter-carrier interference (ICI), leading to a dramatic degradation in the system performance. This paper presents an efficient symbol and frequency synchronization scheme for OFDM systems that is compatible with IEEE 802.16a standard. A timing algorithm is proposed based on the preamble defined in IEEE 802.16a. The conjugate symmetry of the preamble structure is exploited to reduce computational complexity. It is shown that the new scheme not only reduces the estimation error significantly but also allows for an independent symbol synchronization compared to the conventional methods where a fine timing usually has to be done after the frequency offset correction. © 2005 IEEE.

关键词： Orthogonal frequency division multiplexing

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OFDM performance analysis in the presence of synchronization errors induced by hot carriers 62

OFDM performance analysis in the presence of synchronization...

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62nd Vehicular Technology Conference, VTC 2005

作者： Herlekar, Sameer R. Wu, Hsiao-Chun Zhang, Chi Srivastava, Ashok Communications and Signal Processing Laboratory Department of Electrical and Computer Engineering Louisiana State University Baton RougeLA70803-5901 United States

ISBN: (纸本)0780391527

Phase noise may be regarded as the most severe cause of performance degradation in OFDM systems. Hot-carriers (HCs), found in the CMOS synchronization circuits, are highmobility charge carriers that degrade the MOSFET devices' performance by increasing the threshold voltage required to operate the MOSFETs. The HC effect manifests itself as the phase noise, which increases with the continued MOSFET operation and results in the performance degradation of the Voltage-Controlled Oscillator (VCO) built on the MOSFET. The HC effect is particularly evident in the short-channel MOSFET devices. The MOSFET instability will impact on the OFDM system performance. The relationship between the OFDM system performance and the hot-carrier effect can be analyzed in terms of a crucial parameter, the threshold voltage. In this paper, we adopt the phase noise model for double-ended ring oscillators, and derive a sensitivity function which can provide insights into the expected OFDM system performance for the system design engineers. The expected OFDM performance degradation due to the hot carrier effect is also provided through our simulations. © 2005 IEEE.

关键词： Phase noise

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A two-mode interpolation error concealment MCI scheme

A two-mode interpolation error concealment MCI scheme

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3rd International IEEE Northeast Workshop on Circuits and Systems Conference, NEWCAS 2005

作者： Wu, Yan Ahmad, M.O. Swamy, M.N.S. IEEE Center for Signal Processing and Communications Department of Electrical and Computer Engineering Concordia University Montreal Que. H3G 1MB Canada

ISBN: (纸本)0780389344

In this paper, we propose a scheme intended for low bit-rate motion-compensated interpolation to improve the quality of low bit-rate video encoded in conjunction with the frame dropping technique. We develop a two-mode interpolation errors concealment (TMIEC) MCI scheme, which exploits the block-based motion vector field available to the decoder and which can work well in both smooth regions and edge regions. Simulation results demonstrate that, with the help of a gradient estimator, TMIEC results in a better subjective quality and objective quality compared to previously proposed schemes. © 2005 IEEE.

关键词： Motion compensation

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Malfunction detection in multi-cylinder engines using wavelet packet dictionary

Malfunction detection in multi-cylinder engines using wavele...

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SAE 2005 Noise and Vibration Conference and Exhibition

作者： Tafreshi, R. Sassani, F. Ahmadi, H. Dumont, G. Department of Mechanical Engineering Canada Department of Electrical and Computer Engineering University of British Colombia Vancouver BC Canada Department of Electrical and Computer Engineering University of Tehran Center of Excellence in Intelligent Signal Processing Iran

In this paper, wavelets as signal processing tools are used to analyze the acceleration data acquired at the cylinder head for the detection and characterization of combustion malfunctions in multi-cylinder industrial engines. The objectives were to collect data on 1) normal operations, and 2) operations with a deactivated cylinder to simulate a faulty condition. Wavelet packet and local discriminatory basis algorithm are used to select wavelets that can recognize different conditions. It is shown that the wavelet packet provides a useful data analysis structure for extracting features that are capable of detecting the combustion malfunction of one cylinder in a 12-cylinder engine. Feature extraction is followed by a classification that uses a neural network for the fault identification phase. Copyright © 2005 SAE International.

关键词： Combustion

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A blind estimation approach for symbol timing and carrier frequency offset

A blind estimation approach for symbol timing and carrier fr...

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2005 IEEE International Workshop on VLSI Design and Video Technology, IWVDVT 2005

作者： Yan, Feng Zhu, Wei-Ping Ahmad, M. Omair Centre for Signal Processing and Communications Department of Electrical and Computer Engineering Concordia University Montreal Que. H3G 1M8 Canada

ISBN: (纸本)0780390067

In this paper, the cyclostationarity of over-sampled signal in orthogonal frequency division multiplexing (OFDM) communication systems is studied. A blind symbol timing and carrier frequency offset estimation algorithm is presented based on the cyclic correlation. The proposed algorithm is computationally efficient, and asymptotically unbiased and consistent. Simulation results show that the proposed algorithm is superior to some of the existing methods in terms of the mean square error (MSE) of the estimate. © 2005 IEEE.

关键词： Orthogonal frequency division multiplexing

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A VLSI architecture for a high-speed computation of the 1-D discrete wavelet transform

A VLSI architecture for a high-speed computation of the 1-D ...

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IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005

作者： Zhang, Chengjun Wang, Chunyan Ahmad, M. Omair Center for Signal Processing and Communications Department of Electrical and Computer Engineering Concordia University 1455 de Maisonneuve Blvd. West Montréal QC H3G 1M8 Canada

ISBN: (纸本)9780780388345

In this paper, an efficient VLSI architecture for the computation of the convolution-based discrete wavelet transform (DWT) is presented. The proposed architecture employing two processing elements and a single buffer in a pipeline mode enhances the processing time by appropriately decomposing overall computations and equally distributing them between the two processing elements. The data flow both within and in-between the processing elements are streamlined making use of the buffer and the employing multiple input data paths within the processing elements. The parallelism of operations carried by the computational blocks in each processing element is made more effective by equalizing the data paths used in these blocks. HSPICE and Verilog simulation results are presented to show that a circuit designed based on the proposed architecture in comparison with other existing architectures is fast and efficient for the DWT computation with a modest decrease in the area. © 2055 IEEE.

关键词： Discrete wavelet transforms

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A two-mode interpolation error concealment MCI scheme

A two-mode interpolation error concealment MCI scheme

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Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS)

作者： Yan Wu M.O. Ahmad M.N.S. Swamy Center for Signal Processing and Communications Department of Electrical & Computer Engineering Concordia University Montreal QUE Canada

关键词： Interpolation Computational complexity computer errors Decoding Video coding Video compression Finite element methods Video signal processing Bandwidth Displays

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Complexity scalable motion compensated wavelet video encoding

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IEEE Transactions on Circuits and Systems for Video Technology 2005年第8期15卷 982-992页

作者： Turaga, Deepak S. Van Der Schaar, Mihaela Pesquet-Popescu, Beatrice Wireless Communications and Networking Philips Research USA Briarcliff Manor NY 10510 United States IBM T.J. Watson Research Center Hawthorne NY 10532 United States Department of Electrical and Computer Engineering University of California Davis Davis CA 95616-5294 United States Signal and Image Processing Department Télécom Paris 75634 Paris Cedex 13 France Media Delivery Architectures Department IBM T.J. Watson Research Center Hawthorne NY Electrical and Computer Engineering Department University of California Davis

We present a framework for the systematic analysis of video encoding complexity, measured in terms of the number of motion estimation (ME) computations, that we illustrate on motion compensated wavelet video coding schemes. We demonstrate the graceful complexity scalability of these schemes through the modification of the spatiotemporal decomposition structure and the ME parameters, and the use of spatiotemporal prediction. We generate a wide range of rate-distortion-complexity (R-D-C) operating points for different sequences, by modifying these options. Using our analytical framework we derive closed form expressions for the number of ME computations for these different coding modes and show that they accurately capture the computational complexity independent of the underlying content characteristics. Our frame-work for complexity analysis can be combined with rate-distortion modeling to determine the encoding structure and parameters for optimal R-D-C tradeoffs. © 2005 IEEE.

关键词： Image coding

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A VLSI architecture for a high-speed computation of the 1D discrete wavelet transform

A VLSI architecture for a high-speed computation of the 1D d...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： Chengjun Zhang Chunyan Wang M.O. Ahmad Center for Signal Processing and Communications Department of Electrical and Computer Engineering Concordia University West Montreal QUE Canada

An efficient VLSI architecture for the computation of the convolution-based discrete wavelet transform (DWT) is presented. The proposed architecture, employing two processing elements and a single buffer in a pipeline mode, enhances the processing time by appropriately decomposing the overall computations and distributing them equally between the two processing elements. The data flow, both within and between the processing elements, is streamlined, making use of the buffer and employing multiple input data paths within the processing elements. The parallelism of operations carried out by the computational blocks in each processing element is made more effective by equalizing the data paths used in these blocks. HSPICE and Verilog simulation results are presented to show that a circuit, whose design is based on the proposed architecture, is, in comparison with other existing architectures, fast and efficient for DWT computation, with a modest decrease in the area.

关键词： Discrete wavelet transforms Very large scale integration computer architecture Pipelines Distributed computing Parallel processing Concurrent computing Hardware design languages Computational modeling Circuit simulation

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