Resonant operation, exploiting high quality-factor planar inductors, has recently enabled gigahertz (GHz) applications for large-area electronics (LAE), providing a new technology platform for large-scale and flexible...
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This paper presents the design of a standalone hybrid renewable energy system (HRES) for a hospital in Lafayette, Indiana, USA, to enhance energy reliability and reduce costs. The proposed system integrates photovolta...
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In real-world applications, sometimes there are uncertainties in the data sets whether from the collection process or from the natural languages. Moreover, the data may come in the form of fuzzy relation. To analyze d...
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The sleep apnea is a disease in which there is the absence of airflow during respiration for at least 10 s. It may occur several times during the night sleep. This disease can lead to many types of cardiovascular...
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This paper proposes an on-line remedial action scheme (OLRAS) in order to mitigate the voltage violations caused by false data injection attacks (FDIAs) targeting under load tap changing (ULTC) transformers in smart d...
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This paper presents the architecture of a Convolution Neural Network(CNN)accelerator based on a newprocessing element(PE)array called a diagonal cyclic array(DCA).As demonstrated,it can significantly reduce the burden...
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This paper presents the architecture of a Convolution Neural Network(CNN)accelerator based on a newprocessing element(PE)array called a diagonal cyclic array(DCA).As demonstrated,it can significantly reduce the burden of repeated memory accesses for feature data and weight parameters of the CNN models,which maximizes the data reuse rate and improve the computation ***,an integrated computation architecture has been implemented for the activation function,max-pooling,and activation function after convolution calculation,reducing the hardware *** evaluate the effectiveness of the proposed architecture,a CNN accelerator has been implemented for You Only Look Once version 2(YOLOv2)-Tiny consisting of 9 ***,the methodology to optimize the local buffer size with little sacrifice of inference speed is presented in this *** implemented the proposed CNN accelerator using a Xilinx Zynq ZCU102 Ultrascale+Field Programmable Gate Array(FPGA)and ISE Design *** FPGA implementation uses 34,336 Look Up Tables(LUTs),576 Digital Signal Processing(DSP)blocks,and an on-chip memory of only 58 KB,and it could achieve accuracies of 57.92% and 56.42% mean Average Precession@0.5 thresholds for intersection over union(mAP@0.5)using quantized 16-bit and 8-bit full integer data manipulation with only 0.68% as a loss for 8-bit version and computation time of 137.9 and 69 ms for each input image respectively using a clock speed of 200 *** speeds are expected to be doubled five times using a clock speed of 1GHz if implemented in a silicon System on Chip(SoC)using a sub-micron process.
This article introduces a novel Multi-agent path planning scheme based on Conflict Based Search (CBS) for heterogeneous holonomic and non-holonomic agents, designated as Heterogeneous CBS (HCBS). The proposed methodol...
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In today’s trends, nanocomposites have garnered significant interest due to their potential to enhance dielectric properties and be used as insulators. Incorporating nanoparticles into the base epoxy makes achieving ...
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This study introduces a temperature sensor based on solid-core photonic crystal fiber that exhibits insensitivity to polarization. The coupling condition between the core and defect modes is investigated by employing ...
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Network Intrusion Detection System (NIDS) serves as a essential component in data protection by monitoring computer networks for threats that can bypass conventional defenses such as malware and hackers. Deep learning...
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