检索结果-内蒙古大学图书馆

IEEE International Conference on systems, Man and Cybernetics

作者： G.H. Tarbox S.N. Gottschlich L.A. Gerhardt New York State Center for Advanced Technology in Robotics and Automation Electrical Computer and Systems Engineering Department Rensselaer Polytechnic Institute Troy NY USA

A system for exhaustively inspecting a workpiece, not merely certain features, is presented. The system is based on comparing a volumetric representation of a reference object to a volumetric representation of an actual object iteratively created from sensor data. The use of volumetric representations gives this approach a number of distinct advantages over the more traditional boundary-based inspection methods. The method is capable of handling arbitrarily complex geometries and does not rely on the identification of features. It lends itself naturally to a multisensor environment, and facilitates true 3-D inspection as opposed to methods that require dimensional reductions of data by projection onto a 2-D plane. The authors focus on an important aspect of volumetric inspection which is the automatic generation of a sequence of sensor operations that will acquire the complete geometry of the object being inspected.< >

关键词： Inspection Geometry Robotics and automation Casting Space technology Sensor systems Solid modeling systems engineering and theory Sensor phenomena and characterization Production

来源：评论

学校读者我要写书评

暂无评论

A Perturbation Refinement Method for Nonholonomic Motion Planning

A Perturbation Refinement Method for Nonholonomic Motion Pla...

引用

American Control Conference (ACC)

作者： A.W. Divelbiss J. Wen New York State Center for Advanced Technology in Robotics and Automation Department of Electrical Computer and Systems Engineering Rensselaer Polytechnic Institute Troy NY USA

The kinematic path planning problem of a nonholonomic system can be posed as a point-to-point control problem of a nonlinear system. This system has the property that it is not locally stabilizable but is globally controllable. In this paper, we present a new algorithm for constructing a feasible path between specified initial and final configurations. Polyhedral constraints in both configuration and non-configuration spaces (possibly non-convex) can also be incorporated in this framework. The algorithm is based on the assumption that the system is usually controllable about a non-trivial trajectory, which is true for many cases. An initial trajectory is iteratively warped until the desired final configuration is reached. Examples of a front-wheel driven car, and tractors with one, two, and three trailers are included to illustrate the efficacy of the proposed algorithm.

关键词： Control systems Kinematics Adaptive control Convergence Iterative algorithms Motion planning Robotics and automation systems engineering and theory Path planning Position control

来源：评论

学校读者我要写书评

暂无评论

Optical tracking system for automatic guided vehicles using cellular neural networks

Optical tracking system for automatic guided vehicles using ...

引用

IEEE International Workshop on Cellular Nanoscale Networks and their Applications, (CNNA)

作者： G. Eross T. Boros A. Kiss A. Radvanyi T. Roska J. Bito J. Vass Centre of Robotics and Automation Tungsram TH Company Limited Budapest Hungary Dual and Neural Computing Systems Laboratory Computer and Automation Research Institute Hungarian Academy of Sciences Budapest Hungary Department of information Technology Faculty of Engineering University of Veszprém Veszprem Hungary

A method for the path-control of automated guided vehicles (AGVs) in computer integrated manufacturing (CIM) systems that combines the flexibility and easy installation of optical methods with the simplicity and robustness of the inductive method is proposed. Using a new computing paradigm, the cellular neural network (CNN), and a related device, the VLSI CNN chip, a very high speed solution that is less expensive than the conventional methods can be achieved. This AGV control complies with the requirements of CIM systems. Further advantages of the proposed system are as follows: fault tolerance and the ability to give instructions along the path, and the use of a simple local control.< >

关键词： Vehicles computer integrated manufacturing Cellular neural networks High speed optical techniques Control systems Integrated optics Optical computing Robustness computer networks Very large scale integration

来源：评论

学校读者我要写书评

暂无评论

IMPROVING THE SHIP DESIGN, ACQUISITION AND CONSTRUCTION PROCESS

引用

NAVAL ENGINEERS JOURNAL 1992年第2期104卷 39-57页

作者： RYAN, JC JONS, OP J. Christopher Ryan:earned his bachelor's and master's degrees in Naval Architecture from Webb Institute and MIT respectively. He spent three years at the Advanced Marine Technology Division of Litton Industries working on the DD-963 class ship design and related computer aided design projects. he subsequently went to the Navy Department concentrating on early stage design of surface combatants for 12 years including work on the FFG-7 Sea Control Ship CSGN and CVV aircraft carrier projects. He then shifted focus and became the technical director for the Computer Supported Design Program in NavSea for five years. Mr. Ryan has served in several supervisory positions within the Ship Design Group in NavSea since that time. He is currently the project manager for the Ship Design Acquisition and Construction Process Improvement Project. Otto P. Jons:received a Diplom Ing. in shipbuilding from the Technical University of Hannover W. Germany and an M.S. in naval architecture and marine engineering from the Massachusetts Institute of Technology in 1967. He then joined Litton Ship Systems where he was responsible for the preliminary design of the DD-963 hull structure and then for ship systems as manager LHA Ship Systems Engineering Department. From 1972 to 1974 he was principal research scientist at Hydronautics. In 1976 as technical director he helped establish the local office of Designers and Planners. Otto Jons was one of the co-founders of Advanced Marine Enterprises Inc. in 1976 where he is corporate vice president engineering.

In the spring of 1990, the NavSea Chief Engineer initiated a project to improve the design, acquisition and construction (DAC) of U.S. Navy ships. The project's objectives are to reduce the time and cost of acquiring and operating Navy ships while improving their quality, unlike previous studies on the subject, the project utilizes a rigorous process analysis approach and attempts to use quantitative measures as the basis for recommending improvements. The paper is, of necessity, a status report on the progress of this project. Topics covered include: the DAC process;a look at the current state of ship acquisition time, cost, and quality;the methodology for process improvements;and early findings.

关键词： Naval Vessels

来源：评论

学校读者我要写书评

暂无评论

Software pipelining for transport-triggered architectures 24

Software pipelining for transport-triggered architectures

引用

Proceedings of the 24th International Symposium on Microarchitecture - MICRO 24

作者： Hoogerbrugge, Jan Corporaal, Henk Mulder, Hans Delft University of Technology Department of Electrical Engineering Section Computer Architecture and Digital Systems

ISBN: (纸本)0897914600

This paper discusses software pipelining for a new class of architectures that we call transport-triggered. These architectures reduce the interconnection requirements between function units. They also exhibit code scheduling possibilities which are not available in traditional operation-triggered architectures. In addition the scheduling freedom is extended by the use of so-called hybridpipelined function utits. In order to exploit this tleedom, existing scheduling techniques need to be extended. We present a software pipelirtirtg technique, based on Lam's algorithm, which exploits the potential of !mnsport-triggered architectures. Performance results are presented for several benchmak loops. Depending on the available transport capacity, MFLOP rates may increase significantly as compared to scheduling without the extra degrees of freedom. © 1991 ACM.

关键词： Scheduling

来源：评论

学校读者我要写书评

暂无评论

Computing the shortest path tree in a weak visibility polygon 11th

引用

11th Conference on Foundations of Software technology and Theoretical computer Science, FST and TCS, 1991

作者： Ghosh, Subir Kumar Maheshwari, Anil Pal, Sudebkumar Prasant Saluja, Sanjeev Veni Madhavan, C.E. Computer Science Group Tata Institute of Fundamental Research Bombay400005 India Computer Systems and Communications Group Tata Institute of Fundamental Research Bombay400005 India Department of Computer Science and Engineering Indian Institute of Technology Kharagpur721302 India Computer Science Group Tata Institute of Fundamental Research Bombay400005 India Department of Computer Science and Automation Indian Institute of Science Bangalore560012 India

ISBN: (纸本)9783540549673

In this paper we propose two linear time algorithms for computing the shortest path tree rooted at any vertex of a weak visibility polygon. The first algorithm computes the shortest path tree in a polygon weakly visible from a given internal segment. The second algorithm computes the shortest path tree in a weak visibility polygon without the knowledge of a visibility segment. In both algorithms we use the convexity property of shortest paths in weak visibility polygons established in [4,11]. © Springer-Verlag Berlin Heidelberg 1991.

关键词： Visibility

来源：评论

学校读者我要写书评

暂无评论

An implementation of a barotropic numerical weather prediction model in the functional language SISAL 90

An implementation of a barotropic numerical weather predicti...

引用

2nd ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP 1990

作者： Chang, Pau S. Egan, Gregory K. Jt. Roy. Melbourne Inst. of Technol. and Cmw. Scientific and Industrial Research Organisation Parallel Systems Architecture Project Australia Royal Melbourne Institute of Technology Dept of Communication and Electrical Engineering 124 La Trobe St. Melbourne3000 Australia Department of Computer Systems Engineering Swinburne Institute of Technology School of Electrical Engineering John Street Hawthorn3122 Australia

ISBN: (纸本)0897913507

Numerical Weather Prediction (NWP) is acknowledged as being of vital importance to economy. The demand that NWP places on computing system performance has increased dramatically since the introduction of computer systems and is siili growing. This paper describes the implementation of a one-level barotropic spectral NWP model using the high level functional language SISAL. Our initial approach was a direct transliteration from FORTRAN to SISAL, the result of which was a large amount of array copying and loss of parallelism. The algorithm of the model was then rearranged to enable effective exploitation of parallelism by an optimising SISAL compiler. The parallel implementation technique and its potential for modeling with larger model sizes are discussed, and the improved results for an Encore Multimax multiprocessor are presented. © 1990 ACM.

关键词： High level languages

来源：评论

学校读者我要写书评

暂无评论

Handwritten character recognition with the Athena model

Handwritten character recognition with the Athena model

引用

IEEE Southeastcon

作者： A. Abrahamsson C. Koutsougeras C.A. Papachristou Linkoping Institute of Technology Linkoping Sweden Computer Science Department Tulane University New Orleans LA USA Computer Engineering and Science Department Center of Automation and Intelligent Systems Research Case Western Reserve University Cleveland OH USA

The results of using the Athena neural network model in automatic recognition of handwritten English letters are presented. This model has several layers. The training patterns need to be presented once to each layer of neurons, in parallel. The model forms a binary tree of neurons, and the training is done from the root towards the leaves, processing each level in parallel. The learning time is shortened significantly compared to the network of D.E. Rumelhart et al. (1986). The net structure is dynamically decided during the learning process. The goal is to enhance the adaptive learning capability to recognize more and more patterns. In the approach presented, an incremental learning scheme based on the Athena neural net is introduced. The objective is to learn misclassified patterns adaptively by dynamically correcting the neural net topological structure and the individual neuron's weights and threshold. Incremental learning is performed without losing information about previously learned patterns. The experiments conducted on the recognition of handwritten English letters utilizing Athena and the incremental learning scheme show a significant recognition success rate.< >

关键词： Character recognition Neurons Neural networks Handwriting recognition Gain measurement computer science automation Intelligent systems Pattern recognition Performance loss

来源：评论

学校读者我要写书评

暂无评论

computer-SYSTEM architecture CONCEPTS FOR FUTURE COMBAT systems

引用

NAVAL ENGINEERS JOURNAL 1990年第3期102卷 43-62页

作者： ZITZMAN, LH FALATKO, SM PAPACH, JL Dr. Lewis H. Zitzman:is the group supervisor of the Advanced Systems Design Group Fleet Systems Department The Johns Hopkins University Applied Physics Laboratory (JHU/APL). He has been employed at JHU/APL since 1972 performing applied research in computer science and in investigating and applying advanced computer technologies to Navy shipboard systems. He is currently chairman of Aegis Computer Architecture Data Bus and Fiber Optics Working Group from which many concepts for this paper were generated. Dr. Zitzman received his B.S. degree in physics from Brigham Young University in 1963 and his M.S. and Ph.D. degrees in physics from the University of Illinois in 1967 and 1972 respectively. Stephen M. Falatko:was a senior engineering analyst in the Combat Systems Engineering Department Comptek Research Incorporated for the majority of this effort. He is currently employed at ManTech Services Corporation. During his eight-year career first at The Johns Hopkins University Applied Physics Laboratory and currently with ManTech Mr. Falatko's work has centered around the development of requirements and specifications for future Navy systems and the application of advanced technology to Navy command and control systems. He is a member of both the Computer Architecture Fiber Optics and Data Bus Working Group and the Aegis Fiber Optics Working Group. Mr. Falatko received his B.S. degree in aerospace engineering with high distinction from the University of Virginia in 1982 and his M.S. degree in applied physics from The Johns Hopkins University in 1985. Mr. Falatko is a member of Tau Beta Pi Sigma Gamma Tau the American Society of Naval Engineers and the U.S. Naval Institute. Janet L. Papach:is a section leader and senior engineering analyst in the Combat Systems Engineering Department Comptek Research Incorporated. She has ten years' experience as an analyst supporting NavSea Spa War and the U.S. Department of State. She currently participates in working group efforts under Aegis Combat System Doctrin

This paper sets forth computer systems architecture concepts for the combat system of the 2010–2030 timeframe that satisfy the needs of the next generation of surface combatants. It builds upon the current Aegis computer systems architecture, expanding that architecture while preserving, and adhering to, the Aegis fundamental principle of thorough systems engineering, dedicated to maintaining a well integrated, highly reliable, and easily operable combat system. The implementation of these proposed computer systems concepts in a coherent architecture would support the future battle force capable combat system and allow the expansion necessary to accommodate evolutionary changes in both the threat environment and the technology then available to effectively counter that threat. Changes to the current Aegis computer architecture must be carefully and effectively managed such that the fleet will retain its combat readiness capability at all times. This paper describes a possible transition approach for evolving the current Aegis computer architecture to a general architecture for the future. The proposed computer systems architecture concepts encompass the use of combinations of physically distributed, microprocessor-based computers, collocated with the equipment they support or embedded within the equipment itself. They draw heavily on widely used and available industry standards, including instruction set architectures (ISAs), backplane busses, microprocessors, computer programming languages and development environments, and local area networks (LANs). In this proposal, LANs, based on fiber optics, will provide the interconnection to support system expandability, redundancy, and higher data throughput rates. A system of cross connected LANs will support a high level of combat system integration, spanning the major warfare areas, and will facilitate the coordination and development of a coherent multi-warfare tactical picture supporting the future combatant command st

关键词： computer architecture

来源：评论

学校读者我要写书评

暂无评论

Data buffering: run-time versus compile-time support

Data buffering: run-time versus compile-time support

引用

Third International Conference on Architectural Support for Programming Languages and Operating systems Architectural Support for Programming Languages and Operating systems

作者： Mulder, Hans Section Computer Architecture and Digital Systems Department of Electrical Engineering Delft University of Technology PO Box 5031 2600 AG Delft The Netherlands

ISBN: (纸本)0897913000

Data-dependency, branch, and memory-access penalties are main constraints on the performance of high-speed microprocessors. The memory-access penalties concern both penalties imposed by external memory (e.g. cache) or by under utilization of the local processor memory (e.g. registers). This paper focuses solely on methods of increasing the utilization of data memory, local to the processor (registers or register-oriented buffers).A utilization increase of local processor memory is possible by means of compile-time software, run-time hardware, or a combination of both. This paper looks at data buffers which perform solely because of the compile-time software (single register sets); those which operate mainly through hardware but with possible software assistance (multiple register sets); and those intended to operate transparently with main memory implying no software assistance whatsoever (stack buffers). This paper shows that hardware buffering schemes cannot replace compile-time effort, but at most can reduce the complexity of this effort. It shows the utility increase of applying register allocation for multiple register sets. The paper also shows a potential utility decrease inherent to stack buffers. The observation that a single register set, allocated by means of interprocedural allocation, performs competitively with both multiple register set and stack buffer emphasizes the significance of the conclusion

关键词： computer operating systems

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：