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Prior-Boosted GRL: Microarchitecture Design Space Exploration via Graph Representation Learning

IEEE Transactions on Computer-Aided Design of Integrated circuits and systems 2025年第3期44卷 1141-1154页

作者： Wu, Zheng Shen, Jinyi Yi, Xiaoling Shang, Li Yang, Fan Zeng, Xuan Fudan University State Key Laboratory of Integrated Circuits and Systems The School of Microelectronics Shanghai200433 China Fudan University State Key Laboratory of Integrated Circuits and Systems Shanghai200433 China KU Leuven Department of Electrical Engineering Microelectronics Circuits and Systems Leuven3000 Belgium Fudan University State Key Laboratory of Integrated Circuits and Systems The School of Computer Science Shanghai200433 China

The design space exploration (DSE) of contemporary microprocessors faces a significant challenge of high-computational cost. In this context, we introduce Prior-boosted graph representation learning (GRL), a novel framework for the DSE of the microarchitectures the microprocessors underpinned by graph embeddings. Using GRL, Prior-boosted GRL constructs a compact and continuous vector space for design representation. This framework is further boosted by an efficient sampling algorithm informed by prior knowledge, which is instrumental in generating a superior set of initial designs to accelerate the exploration process. A well-designed ensemble surrogate model is combined with the multiobjective Bayesian optimization to explore the design space holistically within this graph-embedding domain. Rigorous experimental evaluations conducted on the RISC-V Berkeley-Out-of-Order Machine (BOOM) platform demonstrate that Prior-boosted GRL substantially surpasses preceding methods, achieving a 107.79% enhancement in Pareto front quality compared to the state-of-the-art DSE algorithm. It also outstrips manual designs on performance, power, and area metrics. As of this writing, Prior-boosted GRL holds the first place in the ICCAD 2022 CAD Contest evaluation platform. © 2024 IEEE.

关键词： Graph embeddings

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Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement 24

Physically Aware Synthesis Revisited: Guiding Technology Map...

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43rd International Conference on Computer-Aided Design, ICCAD 2024

作者： Pan, Hongyang Lan, Cunqing Liu, Yiting Wang, Zhiang Shang, Li Zeng, Xuan Yang, Fan Zhu, Keren State Key Lab of Integrated Circuits and Systems School of Microelectronics Fudan University China School of Computer Science Fudan University China Department of Electrical and Computer Engineering University of California San Diego United States

ISBN: (纸本)9798400710773

A typical VLSI design flow is divided into separated front-end logic synthesis and back-end physical design (PD) stages, which often require costly iterations between these stages to achieve design closure. Existing approaches face significant challenges, notably in utilizing feedback from physical metrics to better adapt and refine synthesis operations, and in establishing a unified and comprehensive metric. This paper introduces a new Primitive logic gate placement guided technology MAPping (PigMAP) framework to address these challenges. With approximating technology-independent spatial information, we develop a novel wirelength (WL) driven mapping algorithm to produce PD-friendly netlists. PigMAP is equipped with two schemes: a performance mode that focuses on optimizing the critical path WL to achieve high performance, and a power mode that aims to minimize the total WL, resulting in balanced power and performance outcomes. We evaluate our framework using the EPFL benchmark suites with ASAP7 technology, using the OpenROAD tool for place-and-route. Compared with OpenROAD flow scripts, performance mode reduces delay by 14% while increasing power consumption by only 6%. Meanwhile, power mode achieves a 3% improvement in delay and a 9% reduction in power consumption. © 2024 Copyright is held by the owner/author(s).

关键词： Logic design

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On Accelerating Domain-Specific MC-TS with Knowledge Retention and Efficient Parallelization for Logic Optimization

On Accelerating Domain-Specific MC-TS with Knowledge Retenti...

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Electronics Design Automation (ISEDA), International Symposium of

作者： Cunqing Lan Xinyao Wang Zijian Jiang Hongyang Pan Keren Zhu Zhaori Bi Changhao Yan Xuan Zeng State Key Lab of Integrated Circuits and Systems School of Microelectronics Fudan University Shanghai China CSE Department The Chinese University of Hong Kong Hong Kong SAR China

ISBN: (数字)9798350352030

ISBN: (纸本)9798350352047

Recently, demand of higher quality of result (QoR) for logic optimization have spurred numerous studies on generating logic transformation sequence for specific objective. Nevertheless, previous works often suffer from heavy reliance on computing resources or are stuck at local optima. In this work, we propose a logic transformation sequence generator based on domain-specific Monte Carlo tree search (MC- TS). Our framework propose to utilizes information obtained from synthesis tools as context to guild the tree search. Additionally, we implement the algorithm with knowledge retention and adaptive parallelization for further acceleration. Experiments on open-source benchmarks of various scale show that our framework outperforms the state-of-the-art work, Alphasyn, with an average 20.11 % efficiency improvement while maintaining comparable effectiveness.

关键词： Monte Carlo methods Design automation Heuristic algorithms circuits Benchmark testing Generators Logic

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Adaptive ILT via Multi-Level Lithography Simulation

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IEEE Transactions on Computer-Aided Design of Integrated circuits and systems 2025年

作者： Sun, Shuyuan Yang, Fan Yu, Bei Shang, Li Zeng, Xuan Fudan University State Key Lab of Integrated Circuits and Systems China Fudan University School of Microelectronics China The Chinese University of Hong Kong Department of Computer Science and Engineering Hong Kong Fudan University School of Computer Science China

Inverse lithography technology (ILT) is an advanced resolution enhancement technology (RET) approach that pushes the limits of current process conditions to achieve smaller feature sizes. This paper presents an efficient ILT framework centered on the concept of solving mask optimization problem from approximation to precision. Firstly, low-resolution lithography simulation is employed to guide ILT, generating a preliminary solution at a low cost. Subsequently, high-resolution lithography simulation is utilized for fine-tuning, and output the final correction results. Additionally, we introduce a continuous correction scheme and a hyperparameter selection strategy to enhance the adaptability and robustness of the ILT solver for full-chip scale layouts. For via layer patterns, we significantly improve the solvers performance by adopting a new high-resolution ILT approach combined with a restricted optimization region. Experimental results show that our method effectively reduces edge placement error (EPE) violations and improves efficiency for ILT on full-chip scale layouts. In the ICCAD 2013 benchmark, our method outperforms state-ofthe-art approaches, reducing L2 loss by at least 1.3%. For via layer patterns, our method achieves a 98% reduction in L2 loss and nearly triples the runtime efficiency compared to its earlier version. Furthermore, it delivers an 8% reduction in L2 loss and a 45% reduction in PVBand compared to other existing methods. © 1982-2012 IEEE.

关键词： Inverse problems

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A Rapid Adaptation Approach for Dynamic Air‑Writing Recognition Using Wearable Wristbands with Self‑Supervised Contrastive Learning

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Nano-Micro Letters 2025年第2期17卷 417-431页

作者： Yunjian Guo Kunpeng Li Wei Yue Nam‑Young Kim Yang Li Guozhen Shen Jong‑Chul Lee Department of Electronic Convergence Engineering Kwangwoon UniversitySeoul 01897South Korea Radio Frequency Integrated Circuit(RFIC)Bio Centre Kwangwoon UniversitySeoul 01897South Korea Department of Electronic Engineering Kwangwoon UniversitySeoul 01897South Korea School of Microelectronics Shandong UniversityJinan 250101People’s Republic of China State Key Laboratory of Integrated Chips and Systems Fudan UniversityShanghai 200433People’s Republic of China School of Integrated Circuits and Electronics Beijing Institute of TechnologyBeijing 100081People’s Republic of China

Wearable wristband systems leverage deep learning to revolutionize hand gesture recognition in daily *** existing approaches that often focus on static gestures and require extensive labeled data,the proposed wearable wristband with selfsupervised contrastive learning excels at dynamic motion tracking and adapts rapidly across multiple *** features a four-channel sensing array composed of an ionic hydrogel with hierarchical microcone structures and ultrathin flexible electrodes,resulting in high-sensitivity capacitance *** wireless transmission from a Wi-Fi module,the proposed algorithm learns latent features from the unlabeled signals of random wrist ***,only few-shot labeled data are sufficient for fine-tuning the model,enabling rapid adaptation to various *** system achieves a high accuracy of 94.9%in different scenarios,including the prediction of eight-direction commands,and air-writing of all numbers and *** proposed method facilitates smooth transitions between multiple tasks without the need for modifying the structure or undergoing extensive task-specific *** utility has been further extended to enhance human–machine interaction over digital platforms,such as game controls,calculators,and three-language login systems,offering users a natural and intuitive way of communication.

关键词： Wearable wristband Self-supervised contrastive learning Dynamic gesture Air-writing Human-machine interaction

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Memristor-Based Bayesian Spiking Neural Network for Ibd Diagnosis

SSRN

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SSRN 2024年

作者： Ma, Jianxia Li, Xiaowen Wu, Qiqiao Chen, Yuanwen Yang, Jianguo Jin, Yang Department of Gastroenterology Hua Dong Hospital FuDan University Shanghai200040 China State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200438 China State Key Laboratory of Fabrication Technologies for Integrated Circuits Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China Zhangjiang Lab. Shanghai201210 China

Traditional deep learning methods, such as deep neural networks, have achieved remarkable success in image processing, natural language processing, graph computation, and other fields. However, in the diagnosis of Inflammatory Bowel Disease (IBD), conventional deep learning methods are highly susceptible to generating overconfident results, which can lead to great loss of life and property if it results in misdiagnosis of the patient. In this work, we propose a memristor-based IBD diagnostic system inspired by the idea of variational inference based on Bayes' law. The memristors in our system are used for both synaptic weight storage and entropy sources so that an efficient Bayesian inference system can be realized. Our memristor-based true random number generator can produce probability-tunable bitstreams required for Bayesian inference with a mean-square error that is reduced by 10.9× than that of a conventional pseudo-random generator. The proposed system consists of a coarse-grained and a fined-grained spiking neural network, and an optimized strategy that trims the neuron’s threshold is proposed for maintaining the appropriate model sparsity and reducing information loss. With Bayesian inference, our work achieves lower diagnostic error rates, which are reduced by 10.79% and 0.49% for the coarse-grained and fine-grained networks, respectively. The proposed system is easy to hardware implement and presents a novel solution for community-wide IBD diagnosis. © 2024, The Authors. All rights reserved.

关键词： Mean square error

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Ferroelectric materials, devices, and chips technologies for advanced computing and memory applications: development and challenges

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Science China(Information Sciences) 2025年第06期 118-173页

作者： Xiao YU Ni ZHONG Yan CHENG Tianjiao XIN Qing LUO Tiancheng GONG Jiezhi CHEN Jixuan WU Ran CHENG Zhiyuan FU Kechao TANG Jin LUO Tianling REN Fei XUE Lin CHEN Tianyu WANG Xueqing LI Xiuyan LI Ping WANG Xinqiang WANG Jie SUN Anquan JIANG Peiyuan DU Bing CHEN Chengji JIN Jiajia CHEN Haoji QIAN Wei MAO Siying ZHENG Huan LIU Haiwen XU Can LIU Zhihao SHEN Xiaoxi LI Bochang LI Zheng-Dong LUO Jiuren ZHOU Yan LIU Yue HAO Genquan HAN Hangzhou Institute of Technology Xidian University Faculty of Integrated Circuits Xidian University Key Laboratory of Polar Materials and Devices(MOE) Department of Electronics East China Normal University State Key Lab of Fabrication Technologies for Integrated Circuits Institute of Microelectronics of Chinese Academy of Sciences School of Information Science and Engineering Shandong University College of Integrated Circuit Zhejiang University School of Integrated Circuits Southeast University School of Integrated Circuits Peking University School of Integrated Circuits Tsinghua University Center for Quantum Matter School of Physics Zhejiang University School of Microelectronics State Key Laboratory of Integrated Chips and Systems Fudan University Department of Electronic Engineering Tsinghua University National Key Laboratory of Micro and Nano Fabrication Technology and the Department of Micro-Nano Electronics Shanghai Jiao Tong University State Key Laboratory for Mesoscopic Physics and Frontiers Science Center for Nano-Optoelectronics School of Physics Peking University Hangzhou Huarui Chip Innovation Technology Co. Ltd.

Hafnium（Hf） oxide-based ferroelectric materials have emerged as a transformative platform for next-generation non-volatile memory and advanced computing technologies. This review comprehensively examines the development, challenges, and applications of HfO2ferroelectrics, emphasizing their CMOS compatibility, scalability, and robust polarization at nanoscale dimensions. Breakthroughs in doping strategies, stress engineering, and VO control have stabilized the metastable orthorhombic phase, enabling high-performance devices such as ferroelectric RAM（FeRAM）, ferroelectric field-effect transistors（FeFETs）, and ferroelectric tunnel junctions（FTJs）. These devices offer ultrafast switching, low power consumption, and multi-level storage, driving innovations in neuromorphic computing, in-memory processing, and cryogenic systems; nonetheless, they face ongoing challenges in reliability, such as fatigue and imprint effects, and scalability at sub-5 nm technology nodes. Emerging frontiers, such as wurtzite-structured nitrides（e.g., AlScN） and antiferroelectric ZrO2-based systems, have garnered significant attention due to their exceptionally high remanent polarization and promising potential for enhanced endurance, respectively. Further addressing the reliability issues of these emerging ferroelectric materials and the challenges associated with large-scale integration processes through interdisciplinary efforts will unlock the full potential of ferroelectric technologies, positioning them as pivotal enablers of post-Moore computing architectures and sustainable AI-driven applications.

关键词：

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Two-dimensional materials for future information technology: status and prospects

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Science China(Information Sciences) 2024年第6期67卷 1-147页

作者： Hao QIU Zhihao YU Tiange ZHAO Qi ZHANG Mingsheng XU Peifeng LI Taotao LI Wenzhong BAO Yang CHAI Shula CHEN Yiqi CHEN Hui-Ming CHENG Daoxin DAI Zengfeng DI Zhuo DONG Xidong DUAN Yuhan FENG Yu FU Jingshu GUO Pengwen GUO Yue HAO Jun HE Xiao HE Jingyi HU Weida HU Zehua HU Xinyue HUANG Ziyang HUANG Ali IMRAN Ziqiang KONG Jia LI Qian LI Weisheng LI Lei LIAO Bilu LIU Can LIU Chunsen LIU Guanyu LIU Kaihui LIU Liwei LIU Sheng LIU Yuan LIU Donglin LU Likuan MA Feng MIAO Zhenhua NI Jing NING Anlian PAN Tian-Ling REN Haowen SHU Litao SUN Yue SUN Quanyang TAO Zi-Ao TIAN Dong WANG Hao WANG Haomin WANG Jialong WANG Junyong WANG Wenhui WANG Xingjun WANG Yeliang WANG Yuwei WANG Zhenyu WANG Yao WE... Department of Applied Physics The Hong Kong Polytechnic University Key Laboratory for Micro-Nano Physics and Technology of Hunan Province College of Materials Science and EngineeringHunan University College of Integrated Circuits Zhejiang University Shenzhen Geim Graphene Center Shenzhen Key Laboratory of Layered Materials for Value-Added ApplicationsTsinghua-Berkeley Shenzhen Institute & Institute of Materials ResearchTsinghua Shenzhen International Graduate SchoolTsinghua University State Key Laboratory of Extreme Photonics and Instrumentation College of Optical Science and EngineeringInternational Research Center for Advanced PhotonicsZijingang CampusZhejiang University National Key Laboratory of Materials for Integrated Circuits Shanghai Institute of Microsystem and Information TechnologyChinese Academy of Sciences CAS Key Laboratory of Nanophotonic Materials and Devices & Key Laboratory of Nanodevices and Applications i-LabSuzhou Institute of Nano-Tech and Nano-Bionics (SINANO)Chinese Academy of Sciences College of Chemistry and Chemical Engineering Hunan University Key Laboratory of Quantum State Construction and Manipulation (Ministry of Education) Department of PhysicsRenmin University of China School of Integrated Circuits Beijing National Research Center for Information Science and Technology (BNRist)Tsinghua University School of Electronic Science and Engineering Nanjing University The State Key Discipline Laboratory of Wide Band Gap Semiconductor Technology Shaanxi Joint Key Laboratory of GrapheneSchool of MicroelectronicsXidian University Key Laboratory of Artificial Micro- and Nano-Structures of Ministry of Education School of Physics and TechnologyWuhan University School of Integrated Circuits Huazhong University of Science and Technology Center for Nanochemistry (CNC) Beijing Science and Engineering Center for NanocarbonsBeijing National Laboratory for Molecular SciencesCollege of Chemistry and Molecular EngineeringPeking University State Key Laboratory for Artificial Microstruct

Over the past 70 years, the semiconductor industry has undergone transformative changes,largely driven by the miniaturization of devices and the integration of innovative structures and materials. Two-dimensional(2D) materials like transition metal dichalcogenides(TMDs) and graphene are pivotal in overcoming the limitations of silicon-based technologies, offering innovative approaches in transistor design and functionality, enabling atomic-thin channel transistors and monolithic 3D integration. We review the important progress in the application of 2D materials in future information technology, focusing in particular on microelectronics and optoelectronics. We comprehensively summarize the key advancements across material production, characterization metrology, electronic devices, optoelectronic devices, and heterogeneous integration on silicon. A strategic roadmap and key challenges for the transition of 2D materials from basic research to industrial development are outlined. To facilitate such a transition, key technologies and tools dedicated to 2D materials must be developed to meet industrial standards, and the employment of AI in material growth, characterizations, and circuit design will be essential. It is time for academia to actively engage with industry to drive the next 10 years of 2D material research.

关键词： two-dimensional (2D) materials information technology production technology standardization of characterization microelectronic devices optoelectronic devices multi-functional integration

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Ultra-compact beam steering nanolasers

arXiv

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arXiv 2024年

作者： Chen, Xinghong Gu, Mingxuan Tang, Jiankai Sang, Yungang Xiang, Bingrui Zhang, Kong Zhang, Guanjie Wang, Xingyuan Guo, Xuhan Zhou, Linjie Wu, Wengang Mao, Yifei School of Sensing Science and Engineering School of Electronic Information and Electrical Engineering Shanghai Jiao Tong University Shanghai200240 China SJTU-Pinghu Institute of Intelligent Optoelectronics Pinghu314200 China Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China College of Mathematics and Physics Beijing University of Chemical Technology Beijing100029 China State Key Laboratory of Advanced Optical Communication Systems and Networks Department of Electronic Engineering Shanghai Jiao Tong University Shanghai200240 China State Key Laboratory of Advanced Optical Communication Systems and Networks Shanghai Key Lab of Navigation and Location Services Shanghai Institute for Advanced Communication and Data Science Department of Electronic Engineering Shanghai Jiao Tong University Shanghai200240 China National Key Laboratory of Science and Technology on Micro/Nano Fabrication School of Integrated Circuits Peking University Beijing100871 China Beijing Advanced Innovation Center for Integrated Circuits Beijing100871 China Frontiers Science Center for Nano-optoelectronics Peking University Beijing100871 China

The miniaturization and integration of beam steering devices have consistently been the focus of the field. Conventional methods alter the eigenmode of the optical cavity by regulating the refractive index. Due to the weak nonlinear effect of the optical system, the device must be sufficiently large to achieve sufficient light modulation. The effective method for miniaturizing beam steering devices currently in use is based on metasurfaces. However, this type of device necessitates the input of a laser source, which precludes the simultaneous generation and control of light in a single device. Here we propose a miniaturized beam steering device that employs mode selection between different bound states in the continuum (BIC) states through phase change material. The device is capable of simultaneously achieving both light generation and beam steering (33°) in a single device with a size of only 25 μm and with a low threshold of 8.9 kW cm-2. Furthermore, it is possible to achieve a significant degree of dynamic wavelength tunability, with a range extending up to 296 nm. This method achieves high-efficient regulation of light properties by dynamically controlling the system’s topological charge, circumventing the problem of weak nonlinearity in traditional methods. Furthermore, the integration of phase change materials with nanolasers enables the direct alteration of lasing properties, which provides a novel idea for dynamic light control. The device process scheme based on phase change materials is straightforward, direct, and highly compatible, which will be advantageous for its intended application. Copyright © 2024, The Authors. All rights reserved.

关键词： Phase change materials

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Resistive Memory-based Neural Differential Equation Solver for Score-based Diffusion Model

arXiv

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arXiv 2024年

作者： Yang, Jichang Chen, Hegan Chen, Jia Wang, Songqi Wang, Shaocong Yu, Yifei Chen, Xi Wang, Bo Zhang, Xinyuan Cui, Binbin Li, Yi Lin, Ning Xu, Meng Li, Yi Xu, Xiaoxin Qi, Xiaojuan Wang, Zhongrui Zhang, Xumeng Shang, Dashan Wang, Han Liu, Qi Cheng, Kwang-Ting Liu, Ming Department of Electrical and Electronic Engineering the University of Hong Kong Hong Kong ACCESS – AI Chip Center for Emerging Smart Systems InnoHK Centers Hong Kong Science Park Hong Kong Laboratory of Microelectronic Devices and Integrated Technology Institute of Microelectronics Chinese Academy of Sciences Beijing100029 China State Key Laboratory of Integrated Chips and Systems Frontier Institute of Chip and System Fudan University Shanghai200433 China Institute of the Mind the University of Hong Kong Hong Kong University of Chinese Academy of Sciences Beijing100049 China School of Integrated Circuits Hubei Key Laboratory for Advanced Memories Huazhong University of Science and Technology Wuhan430074 China Department of Electronic and Computer Engineering the Hong Kong University of Science and Technology Hong Kong

Human brains image complicated scenes when reading a novel. Replicating this imagination is one of the ultimate goals of AI-Generated Content (AIGC). However, current AIGC methods, such as score-based diffusion, are still deficient in terms of rapidity and efficiency. This deficiency is rooted in the difference between the brain and digital computers. Digital computers have physically separated storage and processing units, resulting in frequent data transfers during iterative calculations, incurring large time and energy overheads. This issue is further intensified by the conversion of inherently continuous and analog generation dynamics, which can be formulated by neural differential equations, into discrete and digital operations. Inspired by the brain, we propose a time-continuous and analog in-memory neural differential equation solver for score-based diffusion, employing emerging resistive memory. The integration of storage and computation within resistive memory synapses surmount the von Neumann bottleneck, benefiting the generative speed and energy efficiency. The closed-loop feedback integrator is time-continuous, analog, and compact, physically implementing an infinite-depth neural network. Moreover, the software-hardware co-design is intrinsically robust to analog noise. We experimentally validate our solution with 180 nm resistive memory in-memory computing macros. Demonstrating equivalent generative quality to the software baseline, our system achieved remarkable enhancements in generative speed for both unconditional and conditional generation tasks, by factors of 64.8 and 156.5, respectively. Moreover, it accomplished reductions in energy consumption by factors of 5.2 and 4.1. Our approach heralds a new horizon for hardware solutions in edge computing for generative AI applications. © 2024, CC BY-NC-SA.

关键词： Diffusion

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