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IEEE International Symposium on circuits and systems (ISCAS)

作者： A.B.A. Gharbi F.M.A. Salam Circuits Systems and Artificial Neural Networks Laboratory Department of Electrical Engineering Michigan State University East Lansing MI USA

We describe an algorithm and chip implementation for separating a mixture of unknown, but independent, temporal signals in static and dynamic environments. The proposed algorithm, which is a simple modification of the Herault and Jutten (HJ) algorithm, proved to be robust to parameter variations. Moreover, we present some chip results to quantify the performance of the modified algorithm in static and dynamic (mixing and filtering) environments.

关键词： Robustness Circuit testing Voltage Semiconductor device measurement Semiconductor device modeling CMOS technology Equations Delay Vectors Smoothing methods

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Analog CMOS implementation of neural network for adaptive signal processing

Analog CMOS implementation of neural network for adaptive si...

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IEEE International Symposium on circuits and systems (ISCAS)

作者： Hwa-Joon Oh F.M.A. Salam Circuits and systems & Artificial neural networks Laboratory Department of Electrical Engineering Michigan State University Lansing MI USA

A modular analog CMOS artificial neural network is designed and fabricated for adaptive signal processing. A modified Gilbert multiplier is used as a linear combination of several input signals. Modified back-propagation continuous-time learning rules are used as an adaptive algorithm. The adaptive algorithm adjusts the weights in real time by on-chip learning circuits. Hardware learning circuits are simulated using PSPICE, then layout design of a modular chip is fabricated via the MOSIS services. We report on the chip test results which demonstrate the successful operation of the chip in 3 adaptive filtering scenarios.< >

关键词： Neural networks Adaptive systems Artificial neural networks Adaptive algorithm CMOS process Signal design Adaptive signal processing Hardware Circuit simulation SPICE

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4/spl times/4/spl times/2 neural network design using modular neural chips with on-chip learning

4/spl times/4/spl times/2 neural network design using modula...

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International Joint Conference on Neural Networks (IJCNN)

作者： Hwa-Joon Oh F.M.A. Salam Circuits and systems & Artificial neural networks Laboratory Department of Electrical Engineering Michigan State University East Lansing MI USA

Describes a feedforward artificial neural network with learning capability in a modular design. The design uses a modified error backpropagation continuous-time learning rule. The modular design is implemented onto (identical) tiny chips where each chip implements a 4-input, 2-output modular network. The modular chips can then be cascaded in order to realize a large network by adding modular chips vertically and horizontally. The authors report on test results that demonstrate the successful operation of the chip and a constructed 4/spl times/4/spl times/2 neural network using three module chips.< >

关键词： Neural networks Neural network hardware Network-on-a-chip Equations Neurons Artificial neural networks Prototypes circuits and systems Laboratories Software testing

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Low power analog chips for the computation of the maximal principal component

Low power analog chips for the computation of the maximal pr...

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International Joint Conference on Neural Networks (IJCNN)

作者： F.M.A. Salam S.S. Vedula G. Erten Circuits and Systems and Artificial Neural Networks Laboratories Department of Electrical Engineering Michigan State University East Lansing MI USA

Test results of two prototype circuit implementations that compute the maximal principal component are described. The implementations are designed to be compact and operate in the subthreshold regime for low power consumption. The prototypes use direct realization of a nonlinear self-learning circuit models which we have developed.< >

关键词： Analog computers Computer networks Circuit testing Prototypes Power engineering computing Principal component analysis Feedback circuits Transconductance Equations Voltage

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Subthreshold analog circuit for computing the maximal principal component of 3-D data

Subthreshold analog circuit for computing the maximal princi...

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IEEE International Symposium on circuits and systems (ISCAS)

作者： S.S. Vedula F.M.A. Salam G. Erten Circuits and Systems and Artificial Neural Networks Laboratories Department of Electrical Engineering Michigan State University East Lansing MI USA

We present the analysis, design, and experimental results of a circuit that computes the maximal principal component of three dimensional data. To reduce power consumption, the implemented model uses circuit elements ... 详细信息

关键词： Analog circuits Analog computers Vectors Principal component analysis Equations Computer networks circuits and systems Artificial neural networks Laboratories Circuit analysis computing

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Separation of mixed signals in dynamic environments: formulation and some implementation

Separation of mixed signals in dynamic environments: formula...

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Midwest Symposium on circuits and systems (MWSCAS)

作者： A.B.A. Gharbi F.M.A. Salam Systems Circuits and Artificial Neural Networks Laboratory Department of Electrical Engineering Michigan State University East Lansing MI USA

We describe algorithms and some chip implementations for separating unknown, but independent, mixtures of temporal signals in static and dynamic environments. One algorithm is a modified HJ algorithm; the other is derived based on optimal control theory so as to maximize a functional which characterizes the linear independence of temporal signals. Moreover, we present some chip results and computer simulations and quantify the performance in static and dynamic environments.

关键词： Testing Vectors Optimal control Intelligent networks Artificial neural networks Laboratories Filtering Neural networks Counting circuits Microphones

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Computationally-improved optimal filtering for supervised learning [feedforward neural nets]

Computationally-improved optimal filtering for supervised le...

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IEEE International Symposium on circuits and systems (ISCAS)

作者： S. Benromdhane F.M.A. Salam Circuits and Systems and Artificial Neural Neworks Laboratory Department of Electrical Engineering Michigan State University East Lansing MI USA

We propose a modification of the Kalman filtering approach to supervised learning that avoids existing approximations while improving its overall computational efficiency. The modification eliminates the necessity of computing an inverse. The same global network structure is retained while the computational effort is extensively reduced. The performance of the approach with the modification, assessed from several test cases, is found to be more refined than the existing approaches.< >

关键词： Filtering Supervised learning Neural networks Feedforward neural networks Backpropagation algorithms Kalman filters Artificial neural networks Computational efficiency Equations Laboratories

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A novel input differential pair for improved-linearity buffer and S/H amplifier design

A novel input differential pair for improved-linearity buffe...

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IEEE International Symposium on circuits and systems (ISCAS)

作者： K. Hadidi G.C. Temes Integrated Circuits and Systems Laboratory UCLA Los Angeles CA USA Electrical and Computer Engineering Department Oregon State University Corvallis OR USA

As the speed and linearity requirements become harder to meet for analog circuits, it is no longer enough to rely on feedback to enhance linearity. Negative feedback suppresses nonlinearities by a factor equal to the loop gain. This works well at low signal frequencies, but as the signal frequency increases the loop gain drops. Thus, with a limited bandwidth available, nonlinearities should be suppressed at their origin. In this paper, we consider a major source of nonlinearity, namely the input differential pair (IDP) with a cascode current source, commonly used in op-amps. Then a new and simple IDP with a matched channel-length single-device current source is introduced. We show that the modified IDP is more linear and thus creates less harmonics than conventional ones, and that by satisfying a nonrestrictive condition all even harmonics can be eliminated. Experimental results are described which verify the expected reduction of harmonic distortion.< >

关键词： Differential amplifiers Linearity Operational amplifiers Voltage Harmonic distortion Tail Negative feedback Frequency Broadband amplifiers Transconductance

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High-linearity calibration of low-resolution digital-to-analog converters

High-linearity calibration of low-resolution digital-to-anal...

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IEEE International Symposium on circuits and systems (ISCAS)

作者： J. Goes J. Franca N. Paulino J. Grilo G. Temes Integrated Circuits and Systems Group Instituto Superior Técnico Lisboa Portugal Department of Electrical and Computer Engineering Oregon State University Corvallis OR USA

We describe a high-precision calibrating system where the code error voltages of a low-resolution binary-weighted capacitor-array DAC, measured against the precise code voltage references generated by a single-capacitor pulse-counting DAC, are digitized and corrected using a small subbinary-weighted capacitor-array. Computer simulation results are given to demonstrate the operation of the proposed system and the benefits that can be gained by employing gain- and offset-compensated stages.< >

关键词： Calibration Digital-analog conversion Voltage Pulse measurements Capacitors Pulse amplifiers Linearity Computer architecture Error correction codes Pulse generation

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Solid source diffusion from agglomerating silicide sources. II. Experimental results and analysis

Journal of Vacuum Science & Technology B: Microelectronics a...

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Journal of Vacuum Science & Technology B: microelectronics and Nanometer Structures Processing, Measurement, and Phenomena 1994年第6期12卷 3149-3159页

作者： J. Y. Tsai C. M. Osburn C. A. Canovai Department of Electrical and Computer Engineering North Carolina State University Raleigh North Carolina 27695‐7911 MCNC Center for Microelectronics Systems Technologies Research Triangle Park North Carolina 27709‐2889

The interface roughness and dopant diffusion behavior of CoSi2 silicide‐as‐a‐diffusion‐source (SADS) samples annealed at different temperatures and for different periods of time were examined using secondary ion mass spectrometry, with conditions optimized to characterize the solid source diffusion profile. A convolution/deconvolution methodology was applied to derive the root‐mean‐square silicide/silicon interface roughness and to correct the dopant profiles. The model which was developed to relate the interface roughness and the sheet resistance increase of the agglomerated silicide films worked quite well over the temperature and time range of interest. The measured activation energies confirmed that silicide roughening and its resistance increase share the same kinetic mechanism. Arsenic implanted CoSi2 samples exhibited a better thermal stability than those implanted with BF2. No obvious enhancement or retardation of boron diffusion was seen, while a transient enhancement of arsenic diffusion was observed, but not as pronounced as previously reported. Furthermore, in cases where dopant is strongly segregated or exhibits a marked step at the silicide/silicon interface, even the convolution/deconvolution technique was not able to adequately determine the actual dopant diffusion.

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