With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core p...
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ISBN:
(纸本)1595936025
With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core products in the mainstream computing market. Moore's law will largely be used to increase HW thread-level parallelism through higher core counts in a CMP environment. CMPs bring new challenges into the design of the software system stack. In this tutorial, we talk about the shift to multi-core processors and the programming implications. In particular, we focus on transactional programming. Transactions have emerged as a promising alternative to lock-based synchronization that eliminates many of the problems associated with lock-based synchronization. We discuss the design of both hardware and software transactional memory and quantify the tradeoffs between the different design points. We show how to extend the Java and C languages with transactional constructs, and how to integrate transactions with compiler optimizations and the language runtime (e.g., memory manager and garbage collection).
Most of the direct control algorithms are connected with, a lot of logical and computing operations. These algorithms have two important characteristicsirequred memory and exeqution time. They change in a wide range, ...
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Most of the direct control algorithms are connected with, a lot of logical and computing operations. These algorithms have two important characteristicsirequred memory and exeqution time. They change in a wide range, which is clear from the example snown in table 1. Taking our stand on information about required direct control and execution time Tmax, we have to find an optimal structure realisation of the control algorithm. This paper examines, the structures for parallel realisatin. of these algorithms. There are- several types of these structures. The problems in this connection are *** here. It is created a system for fast control system design. The system configuration is a minicomputer configuration. The structure of- the interactive software and the general design algorithm are described in connection with this.
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