With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core p...
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ISBN:
(纸本)1595936025
With single thread performance starting to plateau, HW architects have turned to chip level multiprocessing (CMP) to increase processing power. All major microprocessor companies are aggressively shipping multi-core products in the mainstream computing market. Moore's law will largely be used to increase HW thread-level parallelism through higher core counts in a CMP environment. CMPs bring new challenges into the design of the software system stack. In this tutorial, we talk about the shift to multi-core processors and the programming implications. In particular, we focus on transactional programming. Transactions have emerged as a promising alternative to lock-based synchronization that eliminates many of the problems associated with lock-based synchronization. We discuss the design of both hardware and software transactional memory and quantify the tradeoffs between the different design points. We show how to extend the Java and C languages with transactional constructs, and how to integrate transactions with compiler optimizations and the language runtime (e.g., memory manager and garbage collection).
We present novel concepts, technologies and potentials of optical data communication, especially for future computer architectures. The WDM (wavelength division multiplexing) and the optical wiring technologies are ex...
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This paper revisits a problem that was identified by Kramer and Magee: placing a system in a consistent state before and after runtime changes. We show that their notion of quiescence as a necessary and sufficient con...
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The skeleton computing the distributed elementwise processing in D-Clean splits the input data, then applies an elementwise process-able function on the divided input, and finally composes the result from the already ...
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ISBN:
(纸本)9789634639251
The skeleton computing the distributed elementwise processing in D-Clean splits the input data, then applies an elementwise process-able function on the divided input, and finally composes the result from the already computed subresults. This paper presents improvements and refinements of the generalized skeleton implementation. The distributed and functional skeleton of the elementwise processing is implemented using the D-Clean coordination language with a new technique.
The advent of multicore processors has raised new demand for harnessing concurrency in the software mass market. We summarise our previous work on the data parallel, functional array processing language SaC. Its compi...
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ISBN:
(纸本)1595936904
The advent of multicore processors has raised new demand for harnessing concurrency in the software mass market. We summarise our previous work on the data parallel, functional array processing language SaC. Its compiler technology is geared towards highly runtime-efficient support for shared memory multiprocessors and, thus, is readily applicable to today's off-the-shelf multicore systems. Copyright 2007 ACM.
This paper presents an Ontology-based health care information extraction system - VnHIES. In the system, we develop and use two effective algorithms called "Semantic Elements Extracting Algorithm" and "...
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The use of induction motors is widespread in industry. Many researchers have studied the condition monitoring and detecting the faults of induction motors at an early stage. Early detection of motor faults results in ...
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The use of induction motors is widespread in industry. Many researchers have studied the condition monitoring and detecting the faults of induction motors at an early stage. Early detection of motor faults results in fast unscheduled maintenance. In this study, a new artificial immune based support vector machine algorithm is proposed for fault diagnosis of induction motors. Support vector machines (SVMs) have become one of the most popular classification methods in soft computing, recently. However, classification accuracy depends on kernel and penalty parameters. Artificial immune system has abilities of learning, memory and self adaptive control. The kernel and penalizes parameters of support vector machine are tuned using artificial immune system. The training data of support vector machine are extracted from three phase motor current. The new feature vector is constructed based on park's vector approach. The phase space of this feature vector is constructed using nonlinear time series analysis. Broken rotor bar and stator short circuit faults are classified in combined phase space using support vector machines. The experimental data are taken from a three phase induction motor. One, two and three broken rotor bar faults and 10% short circuit of stator faults are detected successfully.
An important aspect of system support for mobile computing involves alleviating the issues related to programming the underlying distributed system. Our approach to dealing with these issues is by means of programming...
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作者:
Y. WakasaY. YamamotoDept. of Applied Analysis and Complex Dynamical Systems
Graduate School of Informatics Kyoto University Kyoto Japan. Yuji Wakasa was born in Okayama
Japan in 1968. He received the B.S. and M.S. degrees in engineering from Kyoto university Japan in 1992 and 1994 respectively. From 1994 to 1998 he was a Research Associate in the Department of Information Technology Okayama University. Since April 1998 he has been a Research Associate in the Graduate School of Informatics Kyoto University. His current research interests include robust control and control system design via mathematical programming. Yutaka Yamamoto received his B.S. and M.S. degrees in engineering from Kyoto University
Kyoto Japan in 1972 and 1974 respectively and the M.S. and Ph.D. degree in mathematics from the University of Florida in 1976 and 1978 respectively. From 1978 to 1987 he was with Department of Applied Mathematics and Physics Kyoto University and from 1987 to 1997 with Department of Applied System Science. Since 1998 he is a professor at the current position. His current research interests include realization and robust control of distributed parameter systems learning control sampled-data systems and digital signal processing. Dr. Yamamoto is a receipient of the Sawaragi memorial paper award (1985) the Outstanding Paper Award of SICE (1987) Best Author Award of SICE (1990) the George Axelby Outstanding Paper Award of IEEE CSS in 1996 Takeda Paper Prize of SICE in 1997. He is a Fellow of IEEE. He was an associate editor of Automatica. He is currently an associate editor of IEEE Transactions on Automatic Control Systems and Control Letters and Mathematics of Control Signals and Systems. He is a member of the IEEE the Society of Instrument and Control Engineers (SICE) and the Institute of Systems Control and Information Engineers.
This paper presents a design method of control systems such that a designer can flexibly take account of tradeoffs between evaluated uncertainty ranges and the level of control performance. The problem is reduced to a...
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This paper presents a design method of control systems such that a designer can flexibly take account of tradeoffs between evaluated uncertainty ranges and the level of control performance. The problem is reduced to a BMI problem and approximately solved by LMIs. The convergence of the proposed approximation is proved in a modified sense. A numerical example shows the effectiveness of the proposed method in comparison with the standard robust control.
There are many benefits to participating in multi-campus collaborations among project-based design teams. First, students gain experience in working in a distributed design environment, which is becoming more commonpl...
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