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MilkyWay-2 supercomputer： system and application

Frontiers of Computer science 2014年第3期8卷 345-356页

作者： Xiangke LIAO Liquan XIAO Canqun YANG Yutong LU Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha 410073 China College of Computer National University of Defense Technology Changsha 410073 China

On June 17, 2013, MilkyWay-2 （Tianhe-2） supercomputer was crowned as the fastest supercomputer in the world on the 41th TOP500 list. This paper provides an overview of the MilkyWay-2 project and describes the design of hardware and software systems. The key architecture features of MilkyWay-2 are highlighted, including neo-heterogeneous compute nodes integrating commodity- off-the-shelf processors and accelerators that share similar instruction set architecture, powerful networks that employ proprietary interconnection chips to support the massively parallel message-passing communications, proprietary 16- core processor designed for scientific computing, efficient software stacks that provide high performance file system, emerging programming model for heterogeneous systems, and intelligent system administration. We perform extensive evaluation with wide-ranging applications from LINPACK and Graph500 benchmarks to massively parallel software deployed in the system.

关键词： MilkyWay-2 supercomputer petaflops computing neo-heterogeneous architecture interconnect network heterogeneous programing model system management benchmark optimization performance evaluation

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The TH Express high performance interconnect networks

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Frontiers of Computer science 2014年第3期8卷 357-366页

作者： Zhengbin PANG Min XIE Jun ZHANG Yi ZHENG Guibin WANG Dezun DONG Guang SUO Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha 410073 China College of Computer National University of Defense Technology Changsha 410073 China

Interconnection network plays an important role in scalable high performance computer （HPC） systems. The TH Express-2 interconnect has been used in MilkyWay-2 system to provide high-bandwidth and low-latency interprocessot communications, and continuous efforts are devoted to the development of our proprietary interconnect. This paper describes the state-of-the-art of our proprietary interconnect, especially emphasizing on the design of network interface. Several key features are introduced, such as user-level communication, remote direct memory access, offload collective operation, and hardware reliable end-to-end communication, etc. The design of a low level message passing infrastructures and an upper message passing services are also proposed. The preliminary performance results demonstrate the efficiency of the TH interconnect interface.

关键词： HPC network interface chip （NIC） TH Express nterconnect offload collective operation

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Improving vertex-frontier based GPU breadth-first search

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Journal of Central South University 2014年第10期21卷 3828-3836页

作者：杨博卢凯高颖慧徐凯王小平程志权 Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology College of Computer National University of Defense Technology Department of Electronic Science and Engineering National University of Defense Technology Avatar Science Company

Breadth-first search(BFS) is an important kernel for graph traversal and has been used by many graph processing applications. Extensive studies have been devoted in boosting the performance of BFS. As the most effective solution, GPU-acceleration achieves the state-of-the-art result of 3.3×109 traversed edges per second on a NVIDIA Tesla C2050 GPU. A novel vertex frontier based GPU BFS algorithm is proposed, and its main features are three-fold. Firstly, to obtain a better workload balance for irregular graphs, a virtual-queue task decomposition and mapping strategy is introduced for vertex frontier expanding. Secondly, a global deduplicate detection scheme is proposed to remove reduplicative vertices from vertex frontier effectively. Finally, a GPU-based bottom-up BFS approach is employed to process large frontier. The experimental results demonstrate that the algorithm can achieve 10% improvement over the state-of-the-art method on diverse graphs. Especially, it exhibits 2-3 times speedup on low-diameter and scale-free graphs over the state-of-the-art on a NVIDIA Tesla K20 c GPU, reaching a peak traversal rate of 11.2×109 edges/s.

关键词： breadth-first search GPU graph traversal vertex frontier

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HybridSwap: A scalable and synthetic framework for guest swapping on virtualization platform

HybridSwap: A scalable and synthetic framework for guest swa...

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IEEE Annual Joint Conference: INFOCOM, IEEE Computer and Communications Societies

作者： Pengfei Zhang Xi Li Rui Chu Huaimin Wang National Laboratory for Parallel and Distributed Processing National University of Defense Technology Changsha China School of Information Science and Engineering Central South University Changsha China

In IaaS cloud environments, peak memory demand caused by hotspot applications in Virtual Machine (VM) often results in performance degradation within and outside of this VM. Some solutions such as host swapping and ballooning for memory consolidation and overcommitment have been proposed. These solutions, however, have no help for addressing guest swapping issues inside VM. Even though host holds sufficient memory pages, guest OS is unable to utilize free pages in host directly due to the semantic gap between VMM and it. Our goal is to alleviate the performance degradation by decreasing disk I/O operations generated by guest swapping. Based on the insight analysis of behavioral features of guest swapping, we design HybridSwap, a distributed scalable framework which organize surplus memory in all hosts within data center into virtual pools for swapping. This framework builds up a synthetic swapping mechanism in a peer-to-peer way, which VM can adaptively choose suitable pools for swapping. We implement the prototype of HybridSwap and evaluate it with different benchmarks. The results demonstrate that our solution has the ability to promote the guest swapping efficiency indeed. Even in some cases, it shows 2-5 times of performance promotion compared with the baseline setup.

关键词： Benchmark testing Virtualization Semantics Servers Operating systems Degradation Instruction sets

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MilkyWay-2： back to the world Top 1

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Frontiers of Computer science 2014年第3期8卷 343-344页

作者： Xiangke LIAO Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha 410073 China College of Computer National University of Defense Technology Changsha 410073 China

On the 41st Top500 list announced in June 2013, the MilkyWay-2 system produced by National University of Defense technology （NUDT） in China won the first place with a LINPACK test result of 33.86 PFLOPS. It has been one and a half year since its predecessor, MilkyWay-1 （TH-1）, reached the same place for the first time. On the newest Top500 list published in November 2013, MilkyWay-2 continued to win the champion.

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A GPU-based Fast Solution for Riesz Space Fractional Reaction-Diffusion Equation

A GPU-based Fast Solution for Riesz Space Fractional Reactio...

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International Conference on Network-Based Information Systems (NBIS)

作者： Qinglin Wang Jie Liu Chunye Gong Yang Zhang Zuocheng Xing Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China College of Aerospace Science and Engineering National University of Defense Technology Changsha China Science and Technology on Space Physics Laboratory Beijing China

The fast numerical solutions of Riesz fractional equation have computational cost of O(NMlogM), where M, N are the number of grid points and time steps. In this paper, we present a GPU-based fast solution for Riesz space fractional equation. The GPU-based fast solution, which is based on the fast method using FFT and implemented with CUDA programming model, consists of parallel FFT, vector-vector addition and vector-vector multiplication on GPU. The experimental results show that the GPU-based fast solution compares well with the exact solution. Compared to the known parallel fast solution on 8-core Intel E5-2670 CPU, the overall performance speedup on NVIDIA GTX650 GPU reaches 2.12 times and that on NVIDIA K20C GPU achieves 10.93 times.

关键词： Graphics processing units Instruction sets Mathematical model Arrays Yttrium Approximation methods parallel processing

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Accelerating FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture

Accelerating FDTD simulation of microwave pulse coupling int...

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IEEE Pacific Rim Conference on Communications, Computers and Signal processing

作者： Qinglin Wang Jie Liu Xiantao Cui Guitao Fu Chunye Gong Zuocheng Xing School of Computer Science National University of Defense Technology Changsha China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha China Beijing Satellite Navigation Center Beijing China

ISBN: (纸本)9781467377898

The coupling of microwaves into apertures plays an important part in many electromagnetic physics and engineering fields. When the width of apertures is very small, Finite Difference Time Domain (FDTD) simulation of the coupling is very time-consuming. As a many-core architecture, the Intel's Many Integrated Core (MIC) architecture owns 512-bit vector units and more than 200 threads. In this paper, we parallelize FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture. In the implementation, the parallel programming model OpenMP is used to exploit thread parallelism while loop unrolling and SIMD intrinsic functions are utilized to accomplish vectorization. Compared with the serial version on Intel Xeon E5-2670 CPU, the implementation on the MIC coprocessor including 57 cores obtains a speedup of 11.57 times. The experiment results also demonstrate that the parallelization has good scalability in performance. Additionally, how binding relationship between OpenMP threads and hardware threads in MIC influences performance is also reported.

关键词： Microwave integrated circuits Finite difference methods Time-domain analysis Chlorine Hardware

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Constraint-Relaxation Approach for Nonnegative Matrix Factorization: A Case Study

Constraint-Relaxation Approach for Nonnegative Matrix Factor...

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IEEE International Conference on Systems, Man and Cybernetics

作者： Jue Wang Naiyang Guan Xuhui Huang Zhigang Luo Science and Technology on Parallel and Distributed Processing Laboratory College of Computer National University of Defense Technology Hunan P.R. China Department of Computer Science and Techonoly College of Computer National University of Defense Technology Hunan P.R. China

ISBN: (纸本)9781479986989

Nonnegative matrix factorization (NMF) is a powerful technique for dimensionality reduction. Conventional NMF algorithms usually keep the matrices W and H nonnegative while iterating. However, to get the NMF of a matrix, it's unnecessary to force the temporary solutions in iterations nonnegative. In this paper, we propose a two-staged approach for NMF. At the relaxation stage, the nonnegative constraint of temporary solutions is relaxed and a real valued matrix factorization is generated. At the constraint stage, the real valued matrix factorization is transformed to a nonnegative matrix factorization by an invertible linear transformation. Based on this approach, we study on exact nonnegative matrix factorization when rank=2. We proved that, given two real valued matrices of rank=2, there exists an invertible linear transformation which can transform the real valued matrices to nonnegative matrices with their product stable. We propose an algorithm to find out the transformation. When rank is higher than 2, this kind of transformation may not exist. In the experiments, it's showed that this approach can reach a nonnegative matrix factorization with lower reconstruction error than conventional methods, and the technique for rank=2 exact NMF works well.

关键词： Algorithm design and analysis Matrix decomposition Additives Computers Transforms Matrix converters Clustering algorithms

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NVLAN: A Novel VLAN technology for Scalable Multi-tenant Datacenter Networks 2

NVLAN: A Novel VLAN Technology for Scalable Multi-tenant Dat...

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2nd International Conference on Advanced Cloud and Big Data, CBD 2014

作者： Hu, Yang Li, Huiba Peng, Yuxing Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Computer Science Department China

ISBN: (纸本)9781479980857

Nowadays, cloud providers of 'Infrastructure as a service' require datacenter networks to support virtualization and multi-tenancy at large scale, while it brings a grand challenge to datacenters. Traditional network technologies of datacenters and common commodity devices of network can not meet these new needs. In this paper, we present NVLAN, a novel VLAN technology for scalable multi-tenant datacenter networks. NVLAN eliminates the quantity limitation of logic isolated networks on VLAN through a slight modification. NVLAN can be applied to very large-scale datacenter networks, without the need of expensive and dedicated switches. Through encapsulation of tenant's packets, NVLAN provides tenants with full address space virtualization to configure their own logic network. We implemented NVLAN on a test bed, and demonstrated that it can be scaled up to large numbers of multi-tenant networks with negligible overhead. © 2014 IEEE.

关键词： Virtualization

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Fast image matching algorithm based on affine invariants

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Journal of Central South University 2014年第5期21卷 1907-1918页

作者：张毅卢凯高颖慧 National Laboratory for Parallel and Distributed Processing(National University of Defense Technology) College of Computer National University of Defense Technology College of Electronic Science and Engineering National University of Defense Technology

Feature-based image matching algorithms play an indispensable role in automatic target recognition （ATR）. In this work, a fast image matching algorithm （FIMA） is proposed which utilizes the geometry feature of extended centroid （EC） to build affine invariants. Based on at-fine invariants of the length ratio of two parallel line segments, FIMA overcomes the invalidation problem of the state-of-the-art algorithms based on affine geometry features, and increases the feature diversity of different targets, thus reducing misjudgment rate during recognizing targets. However, it is found that FIMA suffers from the parallelogram contour problem and the coincidence invalidation. An advanced FIMA is designed to cope with these problems. Experiments prove that the proposed algorithms have better robustness for Gaussian noise, gray-scale change, contrast change, illumination and small three-dimensional rotation. Compared with the latest fast image matching algorithms based on geometry features, FIMA reaches the speedup of approximate 1.75 times. Thus, FIMA would be more suitable for actual ATR applications.

关键词： affine invariants image matching extended centroid robustness performance

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