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arXiv 2024年

作者： Laguna, Ignacio Chapman, Patrick Parasyris, Konstantinos Georgakoudis, Giorgis Rubio-González, Cindy Center for Applied Scientific Computing Lawrence Livermore National Laboratory United States Department of Computer Science University of California Davis United States

We present a randomized differential testing approach to test OpenMP implementations. In contrast to previous work that manually creates dozens of verification and validation tests, our approach is able to randomly generate thousands of tests, exposing OpenMP implementations to a wide range of program behaviors. We represent the space of possible random OpenMP tests using a grammar and implement our method as an extension of the Varity program generator. By generating 1,800 OpenMP tests, we find various performance anomalies and correctness issues when we apply them to three OpenMP implementations: GCC, Clang, and Intel. We also present several case studies that analyze the anomalies and give more details about the classes of tests that our approach creates. © 2024, CC BY.

关键词： Software testing

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Testing GPU Numerics: Finding Numerical Differences Between NVIDIA and AMD GPUs

Testing GPU Numerics: Finding Numerical Differences Between ...

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High Performance computing, Networking, Storage and Analysis, SC-W: Workshops of the International Conference for

作者： Anwar Hossain Zahid Ignacio Laguna Wei Le Department of Computer Science Iowa State University Ames IA Center for Applied Scientific Computing Lawrence Livermore National Laboratory Livermore CA

ISBN: (数字)9798350355543

ISBN: (纸本)9798350355550

As scientific codes are ported between GPU platforms, continuous testing is required to ensure numerical robustness and identify potential numerical differences between platforms. Compiler-induced numerical differences can occur when a program is compiled and run on different GPUs and compilers, and the numerical outcomes are different for the same input. We present a study of compiler-induced numerical differences between NVIDIA and AMD GPUs, two widely used GPUs in HPC clusters. Our approach uses a random program generator (Varity) to generate thousands of short numerical tests in CUDA and HIP, and their inputs; then, we use differential testing to check if the program produced a numerical inconsistency when run on NVIDIA and AMD GPUs, using the same compiler optimization level. We also use the AMD’s HIPIFY tool to convert CUDA tests into HIP tests and test if there are numerical inconsistencies induced by HIPIFY. In our study, we generated more than 600,000 tests and found subtle numerical differences occurring between the two classes of GPUs. We found that some of the differences come from (1) math library calls, (2) differences in floating-point precision (FP64 versus FP32), and (3) converting code to HIP with HIPIFY.

关键词： Codes High performance computing Graphics processing units Production Numerical simulation Robustness Libraries Hip Optimization Testing

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Electrical Characteristic and Power Fluctuations of GAA Si NS CFETs by Simultaneously Considering Six Process Variation Factors

IEEE Open Journal of Nanotechnology

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IEEE Open Journal of Nanotechnology 2023年 4卷 229-238页

作者： Kola, Sekhar Reddy Li, Yiming National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan Parallel and Scientific Computing Laboratory National Yang Ming Chiao Tung University Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Communications Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Biomedical Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Department of Electronics and Electrical Engineering Hsinchu300093 Taiwan

Characteristic variability induced by process variation effect (PVE) is one of technological challenges in semiconductor industry. In this work, we computationally study electrical characteristic and power fluctuations induced by six factors of PVE of the gate-all-around (GAA) silicon (Si) nanosheet (NS) complementary field-effect-transistors (CFETs) which are formed by vertically stacking n-FET on top of p-FET. Among the six factors, NS thickness (TNS), NS width (WNS), and gate length (LG) are identified as crucial factors contributing to large variations in device characteristics. The p-FET exhibits substantial off-state current fluctuation (about 151%) due to the bottom parasitic channel leakages. Compared with the magnitudes of dynamic and short circuit powers, the static power is marginal, but it possesses the largest fluctuation (up to 148%). If we assume that each factor of PVE has the same probability distribution as the others and all are mutually independent, the statistical sum of their power fluctuations will exhibit more than 50% overestimations, compared with the results when all factors are considered simultaneously. © 2020 IEEE.

关键词： III-V semiconductors

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Approximate Tree Completion and Learning-Augmented Algorithms for Metric Minimum Spanning Trees

arXiv

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arXiv 2025年

作者： Veldt, Nate Stanley, Thomas Priest, Benjamin W. Steil, Trevor Iwabuchi, Keita Jayram, T.S. Sanders, Geoffrey Department of Computer Science and Engineering Texas A&M University United States Center for Applied Scientific Computing Lawrence Livermore National Laboratory United States

Finding a minimum spanning tree (MST) for n points in an arbitrary metric space is a fundamental primitive for hierarchical clustering and many other ML tasks, but this takes Ω(n2) time to even approximate. We introduce a framework for metric MSTs that first (1) finds a forest of disconnected components using practical heuristics, and then (2) finds a small weight set of edges to connect disjoint components of the forest into a spanning tree. We prove that optimally solving the second step still takes Ω(n2) time, but we provide a subquadratic 2.62-approximation algorithm. In the spirit of learning-augmented algorithms, we then show that if the forest found in step (1) overlaps with an optimal MST, we can approximate the original MST problem in subquadratic time, where the approximation factor depends on a measure of overlap. In practice, we find nearly optimal spanning trees for a wide range of metrics, while being orders of magnitude faster than exact algorithms. Copyright © 2025, The Authors. All rights reserved.

关键词： Approximation algorithms

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APP: Enabling Soft Real-Time Execution on Densely-Populated Hybrid Memory System 23

APP: Enabling Soft Real-Time Execution on Densely-Populated ...

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Proceedings of the 60th Annual ACM/IEEE Design Automation Conference

作者： Zheng-Wei Wu Yun-Chih Chen Yuan-Hao Chang Tei-Wei Kuo Department of Computer Science and Information Engineering National Taiwan University Institute of Information Science Academia Sinica Taiwan Department of Computer Science and Information Engineering National Taiwan University and Mohamed bin Zayed University of Artificial Intelligence Department of Computer Science and NTU High Performance and Scientific Computing Center National Taiwan University

ISBN: (纸本)9798350323481

Memory swapping was considered slow and evil, but swapping to Ultra Low-Latency storage like Optane has become a promising solution to save power and cost, helping densely-populated edge server to overcome its DRAM capacity bottleneck. However, the lack of integration between CPU scheduling and memory paging causes soft real-time tasks running on edge servers to miss deadlines under heavy memory multiplexing. We propose APP (Adaptive Page Pinning), lightweight protection of working set memory to ensure meeting soft real-time task deadlines without starving other non-real-time tasks. Experiments show that APP alleviates thrashing in memory-intensive tasks and upholds soft real-time task deadlines.

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Improved Dwarf Mongoose Optimization for Constrained Engineering Design Problems

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Journal of Bionic Engineering 2023年第3期20卷 1263-1295页

作者： Jeffrey O.Agushaka Absalom E.Ezugwu Oyelade N.Olaide Olatunji Akinola Raed Abu Zitar Laith Abualigah School of Mathematics Statisticsand Computer ScienceUniversity of KwaZulu-NatalKing Edward AvenuePietermaritzburg CampusPietermaritzburg3201KwaZulu-NatalSouth Africa Department of Computer Science Federal University of LafiaLafia950101Nigeria Unit for Data Science and Computing North-West University11 Hoffman StreetPotchefstroom2520South Africa Sorbonne Center of Artificial Intelligence Sorbonne University-Abu Dhabi38044Abu DhabiUnited Arab Emirates Hourani Center for Applied Scientific Research Al-Ahliyya Amman UniversityAmman19328Jordan Faculty of Information Technology Middle East UniversityAmman11831Jordan Faculty of Information Technology Applied Science Private UniversityAmman11931Jordan School of Computer Sciences Universiti Sains Malaysia11800Pulau PinangMalaysia

This paper proposes a modified version of the Dwarf Mongoose Optimization Algorithm (IDMO) for constrained engineering design problems. This optimization technique modifies the base algorithm (DMO) in three simple but effective ways. First, the alpha selection in IDMO differs from the DMO, where evaluating the probability value of each fitness is just a computational overhead and contributes nothing to the quality of the alpha or other group members. The fittest dwarf mongoose is selected as the alpha, and a new operator ω is introduced, which controls the alpha movement, thereby enhancing the exploration ability and exploitability of the IDMO. Second, the scout group movements are modified by randomization to introduce diversity in the search process and explore unvisited areas. Finally, the babysitter's exchange criterium is modified such that once the criterium is met, the babysitters that are exchanged interact with the dwarf mongoose exchanging them to gain information about food sources and sleeping mounds, which could result in better-fitted mongooses instead of initializing them afresh as done in DMO, then the counter is reset to zero. The proposed IDMO was used to solve the classical and CEC 2020 benchmark functions and 12 continuous/discrete engineering optimization problems. The performance of the IDMO, using different performance metrics and statistical analysis, is compared with the DMO and eight other existing algorithms. In most cases, the results show that solutions achieved by the IDMO are better than those obtained by the existing algorithms.

关键词： Improved dwarf mongoose Nature-inspired algorithms Constrained optimization Unconstrained optimization Engineering design problems

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Diabetes Type 2: Poincaré Data Preprocessing for Quantum Machine Learning

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computers, Materials & Continua 2021年第5期67卷 1849-1861页

作者： Daniel Sierra-Sosa Juan D.Arcila-Moreno Begonya Garcia-Zapirain Adel Elmaghraby Department of Computer Science and Engineering University of LouisvilleLouisvilleKYUSA Apolo Scientific Computing Center Universidad EAFITMedellínColombia eVida Research Group University of DeustoBilbaoSpain

Quantum Machine Learning(QML)techniques have been recently attracting massive *** reported applications usually employ synthetic or well-known *** of these techniques based on using a hybrid approach combining quantum and classic devices is the Variational Quantum Classifier(VQC),which development seems *** being largely studied,VQC implementations for“real-world”datasets are still challenging on Noisy Intermediate Scale Quantum devices(NISQ).In this paper we propose a preprocessing pipeline based on Stokes parameters for data *** pipeline enhances the prediction rates when applying VQC techniques,improving the feasibility of solving classification problems using NISQ *** including feature selection techniques and geometrical transformations,enhanced quantum state preparation is ***,a representation based on the Stokes parameters in the PoincaréSphere is possible for visualizing the *** results show that by using the proposed techniques we improve the classification score for the incidence of acute comorbid diseases in Type 2 Diabetes Mellitus *** used the implemented version of VQC available on IBM’s framework Qiskit,and obtained with two and three qubits an accuracy of 70%and 72%respectively.

关键词： Quantum machine learning data preprocessing stokes parameters Poincarésphere

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Enabling Performance Portability for Shallow Water Equations on CPUs, GPUs, and FPGAs with SYCL 24

Enabling Performance Portability for Shallow Water Equations...

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Proceedings of the Platform for Advanced scientific computing Conference

作者： Markus Büttner Christoph Alt Tobias Kenter Harald Köstler Christian Plessl Vadym Aizinger Chair of Scientific Computing University of Bayreuth Bayreuth Germany Paderborn Center for Parallel Computing Paderborn University Paderborn Germany Department of Computer Science Friedrich-Alexander-Universität Erlangen Germany

ISBN: (纸本)9798400706394

In order to make the best use of the diverse hardware architectures in present and future high-performance computers, developers and maintainers of scientific simulation codes strive for performance portability. The goal is to reach a good fraction of the hardware-specific practically achievable performance while maintaining a largely unified codebase. In benchmarks and first production codes, SYCL has been demonstrated to be a promising programming model for this purpose when targeting different CPU and *** this work, we utilize SYCL to develop a performance portable implementation of the 2D shallow water equations, discretized on unstructured triangular meshes using the discontinuous Galerkin method with polynomial orders zero, one, and two. In addition to GPUs from three and CPUs from two vendors, we also broaden the scope of target architectures by including Intel Stratix FPGAs with a fundamentally different execution model. We show that with a few targeted and encapsulated specializations, it is possible to adapt the execution flow to the respective targets. The performance analysis shows how FPGAs complement the other two architectures with particularly good performance for small problem sizes.

关键词： SYCL performance-portability shallow water equations discontinous Galerkin method

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Enhancing the Performance of E-Mode AlGaN/GaN HEMTs With Recessed Gates Through Low-Damage Neutral Beam Etching and Post-Metallization Annealing

IEEE Open Journal of Nanotechnology

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IEEE Open Journal of Nanotechnology 2023年 4卷 150-155页

作者： Chen, Yi-Ho Ohori, Daisuke Aslam, Muhammad Lee, Yao-Jen Li, Yiming Samukawa, Seiji National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Graduate Degree Program of College of Electrical and Computer Engineering Hsinchu300093 Taiwan Tohoku University Institute of Fluid Science Sendai980-8577 Japan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Electrical Engineering and Computer Science International Graduate Program Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Pioneer Semiconductor Innovation Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Parallel and Scientific Computing Laboratory Institute of Communications Engineering Institute of Biomedical Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Department of Electronics and Electrical Engineering Hsinchu300093 Taiwan National Yang Ming Chiao Tung University Institute of Communications Engineering Hsinchu300093 Taiwan

This study investigated the electrical properties of AlGaN/GaN high-electron-mobility transistors (HEMTs) with varied recess depths under the gate electrode. We demonstrated a recess depth of approximately 6 nm, which was achieved through neutral beam etching (NBE) technique with a low etch rate of 1.8 nm/min, resulting in device enhancement-mode (E-mode) behavior with threshold voltage (Vth) of 0.49 V. The effects of post-metallization annealing (PMA) on the device performance were also examined. The results revealed that PMA treatment improves the DC characteristics of the devices, including maximum drain current (IDMAX), transconductance (gm), subthreshold swing (SS), on-off ratio, and off-state leakage current, with maximum enhancement percentage of 18.3% for IDMAX, 3758% for on-off ratio, and 54.3% for SS. Moreover, this study compared the recess depths of metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) with the SiN dielectric layer. The results showed that MIS-HEMTs exhibit more negative Vth values, which can be attributed to the controlled surface states achieved through passivation. © 2020 IEEE.

关键词： Etching

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HPC Application Parameter Autotuning on Edge Devices: A Bandit Learning Approach

arXiv

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arXiv 2025年

作者： Hossain, Abrar Badawy, Abdel-Hameed A. Islam, Mohammad A. Patki, Tapasya Ahmed, Kishwar Department of Electrical Engineering and Computer Science The University of Toledo United States Department of Electrical and Computer Engineering New Mexico State University United States Department of Computer Science and Engineering The University of Texas Arlington United States Center for Applied Scientific Computing Lawrence Livermore National Laboratory

The growing necessity for enhanced processing capabilities in edge devices with limited resources has led us to develop effective methods for improving high-performance computing (HPC) applications. In this paper, we introduce LASP (Lightweight Autotuning of scientific Application Parameters), a novel strategy designed to address the parameter search space challenge in edge devices. Our strategy employs a multi-armed bandit (MAB) technique focused on online exploration and exploitation. Notably, LASP takes a dynamic approach, adapting seamlessly to changing environments. We tested LASP with four HPC applications: Lulesh, Kripke, Clomp, and Hypre. Its lightweight nature makes it particularly well-suited for resource-constrained edge devices. By employing the MAB framework to efficiently navigate the search space, we achieved significant performance improvements while adhering to the stringent computational limits of edge devices. Our experimental results demonstrate the effectiveness of LASP in optimizing parameter search on edge devices. © 2025, CC BY-NC-ND.

关键词： Edge computing

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