Universal modules are presented that can be used to realize any single input-single output synchronous sequential machine in the form of a circuit in which the input signal enters only one module. Additionally, no sig...
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Universal modules are presented that can be used to realize any single input-single output synchronous sequential machine in the form of a circuit in which the input signal enters only one module. Additionally, no signal in the circuit fans out to more than some bounded number of terminals where the bound depends only on the module being used. Two different realization schemes are presented. The first scheme is based on the single feedback loop circuit model. Modules are connected in a highly regular array. Inputs to the last row of the array are constant logic signals. In the second scheme, a tree of modules is connected at the back to one or more one-hot reaiizations of a machine closely related to the machine being realized. The first scheme has the advantage of yielding a circuit with a highly regular interconnections pattern. The second scheme generally requires fewer modules. The theory is easily edxtended to machines with more than one input and output.
Human brain possesses an extraordinary ability to attend to a specific sound source in a multi-talk, noisy environment such as a cocktail party. Auditory attention detection (AAD) aims to automatically identify such a...
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In many real-world scenarios, particularly in healthcare, the focus is often on the minority class, where machine learning classifiers trained on imbalanced datasets exhibit bias, resulting in poor performance on crit...
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作者：
Wornell, GWTrott, MDIEEE
Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology
A class of powerful and computationally efficient strategies for exploiting transmit antenna diversity on fading channels is developed. These strategies, which require simple linear processing at the transmitter and r...
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A class of powerful and computationally efficient strategies for exploiting transmit antenna diversity on fading channels is developed. These strategies, which require simple linear processing at the transmitter and receiver, have attractive asymptotic characteristics. In particular, given a sufficient number of transmit antennas, these techniques effectively transform a nonselective Rayleigh fading channel into a nonfading, simple white marginally Gaussian noise channel with no intersymbol interference. These strategies, which we refer to as linear antenna preceding, can be efficiently combined with trellis coding and other popular error-correcting codes for bandwidth-constrained Gaussian channels. Linear antenna preceding requires no additional power or bandwidth and is attractive in terms of robustness and delay considerations. The resulting schemes have powerful and convenient interpretations in terms of transforming nonselective fading channels into frequency- and time-selective ones.
A computer architecture for concurrent computing is proposed which has the shared memory aspect of tightly coupled multiprocessor systems and also the connection simplicity associated with message-connected, loosely-c...
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A computer architecture for concurrent computing is proposed which has the shared memory aspect of tightly coupled multiprocessor systems and also the connection simplicity associated with message-connected, loosely-coupled multicomputer systems. A large address space is dynamically partitioned into contiguous segments that can be accessed by a single processor. The partitioning is accomplished by switching the system buses. The completion of a concurrent process is signaled by a processor"s return to an idle state and the reattachment of its memory segment to the neighboring active processor. In effect, the assignment of an address sequence and the activation of a processor is a process-fork operation, and the processor deactivation and memory segment reattachment is a process-join. Following a description of the MP/C structure and operation, programming conventions are explained and demonstrated. Applications include tree-structured multiprocessing, recursive and nondeterministic procedures, very high precision numerical calculations, process-structured operating systems, and others. The linear MP/C structure is extensible to higher dimensions. A two-dimensional system is described and its application is discussed. Finally, performance ❉s are presented, and the MP/C architecture is compared with related designs.
Mathematical models for power system dynamic analysis including the dynamics of the protective system are presented. The formulation of the equations is based on establishing explicit relations between the protection ...
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Mathematical models for power system dynamic analysis including the dynamics of the protective system are presented. The formulation of the equations is based on establishing explicit relations between the protection system and the rest of system dynamic elements through the node admittance matrix Y-BUS. This relationship is achieved by representing the circuit breakers of interest as part of the transmission network elements. The protective relays, reclosing relays and circuit breakers are modeled as dynamic devices for tracking the dependence of these devices on the voltage and current inputs using the phasor state variables. A simple example illustrates the concepts. As a direct consequence of the analytical model, the concept of a protection success region is introduced and the implications for stability analysis, relay coordination, adaptive relaying and cascade tripping are discussed.
The paper is an exposition of some of the design principles involved in the development of a dynamically reconfigurable vector-slice processor. Implementable in terms of commercially available VLSI components, the rec...
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The paper is an exposition of some of the design principles involved in the development of a dynamically reconfigurable vector-slice processor. Implementable in terms of commercially available VLSI components, the reconfigurable processor is designed to meet the requirements of the numerical user who can avail himself of a tradeoff between parallel activity and numerical accuracy. To this end, the processing heart of the system can be dynamically altered by the user to enter one of a number of predefined configuration states, each one of which represents an altered level of parallelism balanced against the width of each parallel subprocessor in the configuration. The paper describes, in some detail, the structure of the processor in terms of both its control and data paths.
An application of the rule-based stabilizing control scheme to improve the overall stability of electric power systems is presented. Several simple rules are prepared for each generator in the system. The stabilizing ...
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An application of the rule-based stabilizing control scheme to improve the overall stability of electric power systems is presented. Several simple rules are prepared for each generator in the system. The stabilizing signal for each generator is of the discrete type; it is renewed at every sampling time to control the generator excitation levels depending on the speed/acceleration state of the generator, using the measured speed deviation and the control rules. The efficiency of the proposed rule-based stabilizer is demonstrated by using a sample three-machine power system.< >
This paper argues the case for a computer with massive amounts of primary storage, on the order of tens of billions of bytes. We argue that such a machine, even with a relatively slow processor, can outperform all oth...
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This paper argues the case for a computer with massive amounts of primary storage, on the order of tens of billions of bytes. We argue that such a machine, even with a relatively slow processor, can outperform all other super-computers on memory bound computations. This machine would be simple to program. In addition, it could lead to new and highly efficient programs which traded the available space for running time. We present a novel architecture for such a machine, and show how it can lead to reduced memory access times and higher reliability.
This paper presents a nonparametric method for estimating waveforms of event-related signals embedded in additive noise. The signals have transient character with varying shapes and arrival times. The estimation metho...
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This paper presents a nonparametric method for estimating waveforms of event-related signals embedded in additive noise. The signals have transient character with varying shapes and arrival times. The estimation method is based on a series expansion of the signal by a set of basis functions. Using a template that contains a priori information, two sets of basis functions are designed by means of one uniform and one nonuniform bandpass filter bank. Then, signal-dependent basis functions are obtained. When no a priori information about the signal is available, signal-independent basis functions are constituted by the impulse responses of the subfilters. Delayed copies are created for each basis function with which time jitter in arrival time of the signal can be handled. The method gives a robust estimate of the waveform of transient signals having unknown waveforms and arrival times since no model assumptions are needed. One application is discussed through examples and compared with the estimate, which is obtained by the Karhunen-Loeve expansion.
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