Summary form only given. Under many circumstances, the initiation of breakdown can be viewed as conversion of energy stored in the electric field (capacitive energy) to thermal energy, which converts matter in a thin ...
详细信息
Summary form only given. Under many circumstances, the initiation of breakdown can be viewed as conversion of energy stored in the electric field (capacitive energy) to thermal energy, which converts matter in a thin channel from a nonconducting state to a conducting plasma. This paper analyzes this process in the context of breakdown in SF/sub 6/ as a prelude to a second paper which treats the subject of breakdown under highly inhomogeneous thermal field, quasi-homogeneous electric field conditions.
Previous approaches to texture analysis and segmentation perform multi-channel filtering by applying a set of filters in frequency domain or a set of masks in spatial domain. In this paper we describe a texture segmen...
详细信息
Previous approaches to texture analysis and segmentation perform multi-channel filtering by applying a set of filters in frequency domain or a set of masks in spatial domain. In this paper we describe a texture segmentation algorithm based on multi-channel filtering in conjunction with neural networks for feature extraction and segmentation. The features extracted by Gabor filters have been applied for image segmentation and analysis. There are some important considerations about filter parameters and the reduction of feature dimensions. Here we introduce a method to extract optimal feature dimensions using competitive networks and multilayer perceptrons. We present the segmentation results using different bandwidths. The comparison of segmentation results generated using our method and previous research using learning vector quantization (LVQ) is presented.
Data correlation is a well-known problem that causes difficulty in VLSI testing. Based on a correlation metric, an efficient heuristic to select BIST registers has been proposed in the previous work. However, the comp...
详细信息
ISBN:
(纸本)0769518702
Data correlation is a well-known problem that causes difficulty in VLSI testing. Based on a correlation metric, an efficient heuristic to select BIST registers has been proposed in the previous work. However, the computation of data correlation itself was a computational intensive process and became a bottleneck in the previous work. This paper presents an efficient technique to compute data correlation using Binary Decision Diagrams (BDDs). Once a BDD is built, our algorithms take linear time to compute the corresponding data correlation. The experimental results show that this technique is much faster than the previous technique based on simulation. It enables testing approaches based on data correlation to handle more practical designs. As one of the successful applications, partial scan is demonstrated by integrating our computation results.
This paper presents an application specific reconfigurable architecture based on coarse-grain FPGA for real-time parallel particle filters. The architecture consists of a set of heterogeneous arithmetic units and buff...
详细信息
This paper presents an application specific reconfigurable architecture based on coarse-grain FPGA for real-time parallel particle filters. The architecture consists of a set of heterogeneous arithmetic units and buffer banks, where their interconnections are reconfigurable at the hardware level. The proposed architecture separates fixed and reconfigurable units for high-throughput realization. We compare potential throughput of the design with that of commercial FPGAs and DSPs. The proposed architecture is implemented in 0.25 /spl mu/m CMOS process.
This paper presents a new technique for automatically creating analog circuit models. The method extracts piecewise linear models from trained neural networks. A model is a set of linear dependencies between circuit p...
详细信息
This paper presents a new technique for automatically creating analog circuit models. The method extracts piecewise linear models from trained neural networks. A model is a set of linear dependencies between circuit performances and design parameters. The paper illustrates the technique for an OTA circuit - an amplifier circuit widely used in filters and A/D converters for which models for gain and bandwidth were automatically generated. As experiments show, the obtained models have simple form that accurately fits the sampled points and the behavior of the trained neural networks. These models are useful for fast simulation of systems with non-linear behavior and performances.
As the multimedia applications such as voice over IP (VoIP) and audio/visual (AV) streaming across the Internet emerge, many are working on the network architecture to extend such applications to the wireless networki...
详细信息
As the multimedia applications such as voice over IP (VoIP) and audio/visual (AV) streaming across the Internet emerge, many are working on the network architecture to extend such applications to the wireless networking domain. The emerging IEEE 802.11e quality-of-service (QoS)-enabled wireless LAN (WLAN) is considered a strong candidate for the air interface for such multimedia applications thanks to the IP-centric network paradigm along with its inherent high-speed transmission capability. This paper provides an integrated wired/wireless network architecture interfacing QoS between user level traffic over IP using differentiated service (Diffserv) and transport level traffic using IEEE 802.11e WLAN. Our study investigates the correlations in end-to-end traffic management between Diffserv and 802.11e, and presents the hierarchical QoS signaling interface between Diffserv and 802.11e, in terms of traffic classifying, shaping and policing.
A hierarchical approach for the abstraction of digital VLSICs is presented. Circuit layout is hierarchically abstracted into logical constructs of binary tree structures, which may be manipulated to extract circuit fu...
详细信息
A hierarchical approach for the abstraction of digital VLSICs is presented. Circuit layout is hierarchically abstracted into logical constructs of binary tree structures, which may be manipulated to extract circuit functionality for the purpose of verifying design correctness. VLSIC design specification in the form of HDL is hierarchically decomposed to generate logical formulae for the given specification. By comparing the above, a verification report is obtained
The paradigm of design for biosystem-on-a-chip (BioSoC), is that multidisciplinary skills are required. Thus, the educational goals are to develop an understanding of micro/macro collaboration along with the ability t...
详细信息
The paradigm of design for biosystem-on-a-chip (BioSoC), is that multidisciplinary skills are required. Thus, the educational goals are to develop an understanding of micro/macro collaboration along with the ability to apply and use multidisciplinary skills for the design and performance evaluation of a "biosystem on a chip". The need for the architectural design of the BioSoC addresses the next-generation of intelligent information processing systems.
This paper presents a detailed analysis of the power-supply voltage (IR) drop scaling in DSM technologies. For the first time, the effects of temperature, electromigration and interconnect technology scaling (includin...
详细信息
This paper presents a detailed analysis of the power-supply voltage (IR) drop scaling in DSM technologies. For the first time, the effects of temperature, electromigration and interconnect technology scaling (including resistivity increase of Cu interconnects due to electron surface scattering and finite barrier thickness) are taken into consideration during this analysis. It is shown that the IR-drop effect in the power/ground (P/G) network increases rapidly with technology scaling, and using well-known counter measures such as wire-sizing and decoupling capacitor insertion with resource allocation schemes that are typically used in the present designs may not be sufficient to limit the voltage fluctuations over the power grid for future technologies. It is also shown that such voltage drops on power lines of switching devices in a clock network can introduce significant amount of skew which in turn degrades the signal integrity.
暂无评论