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Analysis of charge trapping and breakdown mechanism in high-k dielectrics with metal gate electrode using carrier separation

Analysis of charge trapping and breakdown mechanism in high-...

引用

International Electron Devices Meeting (IEDM)

作者： Wei Yip Loh Byung Jin Cho Moon Sig Joo M.F. Li D.S.H. Chan S. Mathew Dim-Lee Kwong ECE Dept. National University of Singapore Singapore Institute of Microelectronics Singapore Department of Electrical & Computer Engineering University of Technology Austin TX USA Dept. of Electrical & Computer Engineering The University of Texas Austin TX USA

Using the carrier separation measurement technique, we are able to distinguish two different breakdown mechanisms: a high-k bulk initiated, and an interfacial layer initiated. The results correlate with the statistical Weibull distribution showing a polarity dependent breakdown in high-k stacks. A model of charge trapping at different spatial locations in HfAlO/sub x/ with a TaN gate structure is proposed to explain the polarity dependence of charge trapping characteristics and breakdown mechanisms.

关键词： Dielectric breakdown High-K gate dielectrics Electrodes Electron traps Electric breakdown High K dielectric materials Rapid thermal annealing Voltage Charge carrier processes Silicon

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A benchmarking methodology for NPU-based stateful firewall

A benchmarking methodology for NPU-based stateful firewall

引用

Asia-Pacific Conference on Communications

作者： Lee Eng Kean S.B.M. Nor Department of Microelectronics & Computer Engineering Faculty of Electrical Engineering Universiti Teknologi Malaysia Johor Malaysia Department of Microelectronics & Computer Engineering Universiti Teknologi Malaysia UTM Skudai Johor Malaysia Universiti Teknologi Malaysia Skudai Johor MY Dept. of Microelectron. & Comput. Eng. Universiti Teknologi Malaysia Johor Malaysia

It is currently a challenge to evaluate and compare network processor-based (a.k.a. NPU-based) applications due to the heterogeneity of the application designs and hardware architectures. Many research works have been done in the area of packet classifications, which were directed towards proposing high-speed firewall implementation algorithms. However, few researches focus on providing standard benchmarking methodology for a specific class of firewall. This paper presents a benchmarking methodology for NPU-based stateful firewall. The aim is to allow 'apple-to-apple' comparison among similar firewalls available in the market, and to provide practical benchmarks that exhibit realistic performance numbers. The key aspects of this work are benchmark specifications, separation of benchmark granularity in a layered manner, and the means of measurement. Finally, a system-level benchmark is applied on a stateful firewall implemented on Intel's IXP1200 network processor as a proof-of-concept of this work.

关键词： Application software Terminology Hardware Network address translation Open systems Standards organizations microelectronics computer networks Turing machines computer architecture

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Ge MOS characteristics with CVD HfO/sub 2/ gate dielectrics and TaN gate electrode

Ge MOS characteristics with CVD HfO/sub 2/ gate dielectrics ...

引用

Symposium on VLSI Technology

作者： W.P. Bai N. Lu J. Liu A. Ramirez D.L. Kwong D. Wristers A. Ritenour L. Lee D. Antoniadis Microelectronics Research Center Department of Electrical and Computer Engineering University of Technology Austin TX USA Dept. of Electrical and Computer Engineering University of Texas Austin TX Advanced Micro Devices Austin TX Microsystems Technology Laboratory MIT Cambridge MA USA

ISBN: (纸本)489114033X

In this paper, we report for the first time Ge MOS characteristics with ultra thin rapid thermal CVD HfO/sub 2/ gate dielectrics and TaN gate electrode. Using the newly developed pre-gate cleaning and NH/sub 3/-based Ge surface passivation, the TaN/HfO/sub 2//Ge gate stack with EOT of 12.9 /spl Aring/ exhibits excellent leakage current density of 6 mA/cm/sup 2/ @Vg=1V and interface state density (D/sub it/) of 8/spl times/10/sup 10//cm/sup 2/-eV. Both D/sub it/ and CV hysteresis of Ge MOS are improved significantly with NH/sub 3/ surface treatment. We also study the effects of post-deposition anneal and investigate the conduction mechanism of TaN/HfO/sub 2//Ge gate stack.

关键词： Hafnium oxide Dielectrics Electrodes Cleaning Passivation Leakage current Interface states Hysteresis Surface treatment Annealing

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Investigation of performance limits of germanium double-gated MOSFETs

Investigation of performance limits of germanium double-gate...

引用

International Electron Devices Meeting (IEDM)

作者： T. Low Y.T. Hou M.F. Li Chunxiang Zhu A. Chin G. Samudra L. Chan D.-L. Kwong ECE Department National University of Singapore Singapore Institute of Microelectronics Singapore Dept. of Electronics Eng National Chiao Tung Univ Hsinchu Taiwan Technology Development Chartered Semiconductor Manufacturing Singapore Department of Electrial and Computer Engineering University of Technology Austin TX USA Dept. of Electrical and Computer Engineering University of Texas Austin TX USA

The performance limits and engineering issues of ultra-thin body (UTB) double gated (DG) Ge channel n-MOSFETs are examined in this paper. The non-equilibrium Green's Function (NEGF) approach, including both L and /spl Delta/ conduction valleys, is employed for source to drain current, while the improved WKB tunneling is employed for substrate to drain (band-to-band BTB) and gate to channel current. All possible Ge surfaces and channel orientations are explored. Our results conclude that in addition to lower power supply voltage advantages, the engineered Ge<110> devices with suppressed BTB and gate leakages can achieve better intrinsic delay to OFF power ratio than Si<100> devices.

关键词： Germanium MOSFETs Tunneling Low voltage Quantization Doping Electrons Silicon microelectronics Manufacturing

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High performance ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate MIM capacitors for RF and mixed signal IC applications

High performance ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate M...

引用

International Electron Devices Meeting (IEDM)

作者： Hang Hu Shi-Jin Ding H.F. Lim Chunxiang Zhu M.F. Li S.J. Kim X.F. Yu J.H. Chen Y.F. Yong Byung Jin Cho D.S.H. Chan S.C. Rustagi M.B. Yu C.H. Tung Anyan Du Doan My P.D. Foot A. Chin Dim-Lee Kwong Dept. of ECE National Univ. of Singapore Singapore Institute of Microelectronics Singapore Dept. of Electr. & Comput. Eng. Nat. Univ. of Singapore Singapore SNDL Department of ECE National University of Singapore Singapore Dept. of Electronics Eng. National Chiao Tung Univ. Taiwan Department of Electrical & Computer Engineering University of Technology Austin TX USA Dept. of Electrical & Computer Eng. Univ. of Texas Austin TX USA

In this paper, a high performance ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate metal-insulator-metal (MIM) capacitor is demonstrated for the first time with high capacitance density of 12.8 fF//spl mu/m/sup 2/ from 10 kHz to 20 GHz, low leakage current of 7.45/spl times/10/sup -9/ A/cm/sup 2/ at 2 V, low VCC (voltage coefficients of capacitance), and excellent reliability. The superior electrical properties and reliability suggest that the ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate is a very promising material for MIM capacitors for Si RF and mixed signal IC applications.

关键词： Hafnium oxide Laminates MIM capacitors Capacitance Metal-insulator structures Leakage current Low voltage Materials reliability Radio frequency RF signals

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Zirconium dioxide as a gate dielectric in metal-insulator-silicon structures and current transport mechanisms

Zirconium dioxide as a gate dielectric in metal-insulator-si...

引用

IEEE International Conference on Semiconductor Electronics (ICSE)

作者： T.H. Ng B.H. Koh W.K. Chim W.K. Choi J.X. Zheng C.H. Tung A.Y. Du Department of Electrical and Computer Engineering National University of Singapore Singapore Dept. of Electr. & Comput. Eng. Nat. Univ. of Singapore Singapore Institute of Microelectronics Singapore

This paper investigates the interfacial and bulk properties of zirconium dioxide as a high-k gate dielectric film and studies its current transport mechanisms. Aluminum gate/zirconium dioxide/n-type silicon (Al/ZrO/sub 2//n-Si) metal-insulator-silicon (MIS) devices with equivalent-oxide-thickness (EOT) of /spl sim/2.5 nm (with leakage current density of less than 2/spl times/10/sup -5/ A/cm/sup 2/ at 1 V accumulation bias) were fabricated and characterized using electrical and structural analysis techniques. The simulated capacitance-voltage (C-V) curve, obtained by the self-consistent solution of Schrodinger and Poisson equations, was found to fit the measured C-V curve for the minimum (inversion) and maximum (accumulation) capacitances if dielectric constant values of 15 and 25 were used for the interfacial and bulk ZrO/sub 2/ layers. It was found that the Schottky emission mechanism fits a very narrow gate voltage (V/sub g/) range of 0

关键词： Zirconium Dielectrics Metal-insulator structures Capacitance-voltage characteristics Mechanical factors Aluminum Silicon Leakage current Poisson equations Capacitance measurement

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Reliability projection and polarity dependence of TDDB for ultra thin CVD HfO/sub 2/ gate dielectrics

Reliability projection and polarity dependence of TDDB for u...

引用

Symposium on VLSI Technology

作者： S.J. Lee S.J. Rhee R. Clark D.L. Kwong Microelectronics Research Center Department of Electrical and Computer Engineering University of Technology Austin TX USA University of Texas at Austin Austin TX US Dept. of Electr. & Comput. Eng. Texas Univ. Austin TX USA

ISBN: (纸本)078037312X

A systematic study of long-term reliability of ultra thin CVD HfO/sub 2/ gate stack (EOT=10.5 /spl Aring/) with TaN gate electrode is presented. The polarity and area dependence and temperature acceleration of time-to-breakdown (TBO), defect generation rate, and critical defect density are studied. It is found that T/sub BD/ is polarity-independent (T/sub BD,-Vg/=T/sub BD,+Vg/). TDDB lifetime acceleration shows that 10-year lifetime of HfO/sub 2/ gate stack is projected at Vg=1.63 V for EOT=8.6 /spl Aring/ and Vg=1.88 V for EOT=10.6 /spl Aring/ at 25/spl deg/C. However, after temperature acceleration of 150/spl deg/C, area scaling to 0.1 cm/sup 2/, and the projection to low percentage failure rate of 0.01%, the maximum operating voltages are projected to be Vg=0.6 V for EOT 8.6 /spl Aring/ and Vg=0.75 V for EOT=10.6 /spl Aring/.

关键词： Hafnium oxide Dielectrics Leakage current Acceleration Stress Voltage MOS devices Electrodes Electric breakdown Temperature dependence

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The design of heart classification system

The design of heart classification system

引用

6th International Symposium on Signal Processing and Its Applications, ISSPA 2001

作者： Zin, Zamri Mohd Salleh, Sheikh Hussain Shaikh Shaameri, Ahmad Zuri Dept of Microelectronics and Computer Engineering Faculty of Electrical Engineering Universiti Teknologi Malaysia 81310 UTM-Skudai Johor Malaysia

ISBN: (纸本)0780367030

It has been known that different heart diseases produce the different heart sound and murmurs. Thus, the purpose of this work is to develop an automated system that capable to verify the heart condition. through the heart sound. This research used the instantaneous energy and frequency (IEAF) approach to analyzed and extract the heart sound and artificial Neural Network used as a 'recognition engine for classification of the heart sound and murmur signal. It is important as the Multilayer Perceptron architecture of Neural Networks can represent nonlinear relationship with high performance by leaming from examples. Thus, the system will be able to verify and recognize the heart diseases through the heart sound. Since the system is implement on a PC;it is a low cost clinical instrument to automatically verify the heart diseases.

关键词： Heart

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An adaptive audio watermarking system

An adaptive audio watermarking system

引用

IEEE Region 10 International Conference on Electrical and Electronic Technology

作者： Foo, Say Wei Yeo, Theng Hee Huang, Dong Yan Dept. of Elec./Computer Engineering National University of Singapore Singapore Singapore Institute of Microelectronics Singapore Singapore

ISBN: (纸本)0780371011

In this paper, an adaptive and content-based audio watermarking system based on echo hiding is presented. The proposed system aims to overcome the problems of audible echoes in simple echo hiding approach. Audibility of echoes is reduced especially for problematic signals by the applications of signal based attenuation, psycho-acoustic model and perceptual filter to adaptively modify the decay rate used in encoding the watermark. The proposed method is robust to common signal processing operations of noise addition, re-sampling, cropping, filtering and MPEG coding. If inaudibility and detection accuracy are of paramount importance, psychoacoustic model coupled with single echo is the most appropriate encoding option to use when additional signal processing is imposed. The application of multiple echo hiding is also investigated. It is found that although multiple echo hiding improves inaudibility in general, detection accuracy is compromised when additional signal processing is imposed.

关键词： Digital watermarking

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Resonant-cavity-enhanced surface-emitted second-harmonic generation optimized for short pulses

Resonant-cavity-enhanced surface-emitted second-harmonic gen...

引用

Ultrafast Electronics and Optoelectronics, UEO 2001

作者： Ulmer, Todd G. Washburn, Brian R. Verber, Carl M. Ralph, Stephen E. SpringThorpe, Anthony J. School of Electrical and Computer Engineering Georgia Institute of Technology AtlantaGA30332-0250 United States Nortel Networks Microelectronics Dept. 5C14 OttawaONK2H 8E9 Canada

ISBN: (纸本)1557526591

We demonstrate microcavity enhancement of surface-emitted second-harmonic generation for 1.5-µm, 200-fs pulses with spectral content that exceeds the cavity resonance width. Enhancement measured for a range of cavity finesse verifies the theoretically predicted performance. © 2001 OSA - The Optical Society. All rights reserved.

关键词： Harmonic generation

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