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Advanced migraine prediction hardware system 50

Advanced migraine prediction hardware system

50th Summer computer Simulation Conference, SCSC 2018, Part of the 2018 Summer Simulation Multi-Conference, SummerSim 2018

作者： Henares, Kevin Pagán, Josué Ayala, José L. Risco-Martín, José L. Dept. of Computer Architecture and Automation Complutense University of Madrid Madrid Spain Electronic Engineering Department Universidad Politécnica de Madrid Spain CCS-Center for Computational Simulation Madrid Spain Dept. of Computer Architecture and Automation Complutense University of Madrid CCS-Center for Computational Simulation Madrid Spain

ISBN: (纸本)9781510860209

Migraine is one of the most disabling neurological diseases. Its prevalence reaches 15% of the population in developed countries and lead to high economic costs for private and national health systems. There is no cure for the migraine yet. Objective and accurate migraine prediction turns necessary in order to increase the effectiveness of the current treatments. To tackle this problem authors demonstrated in previous works the feasibility of the migraine modeling and presented a DEVS-based model for migraine prediction in a real time framework. This work presents the first step to bring migraine predictive models and simulations to real devices for the first time in the literature. To do this, the DEVS-based model has been ported to a robust hardware description language (VHDL) to be implemented into a FPGA. This paper leads to the final stage: the physical implementation of a predictive migraine monitoring device. © 2018 Society for Modeling & Simulation International (SCS).

关键词： Field programmable gate arrays (FPGA)

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Modular framework to model critical events in stroke patients 51

Modular framework to model critical events in stroke patient...

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51st Summer computer Simulation Conference, SCSC 2019, Held at the Summer Simulation Conference, SummerSim 2019

作者： Henares, Kevin Risco-Martín, José L. Hermida, Román Roselló, Gemma Reig Cárdenas, Román Dept. of Computer Architecture and Automation Complutense University of Madrid Calle Prof. José García Santesmases 9 Madrid28040 Spain Stroke Care Unit Hospital Universitario de La Princesa Madrid Calle de Diego de León 62 Madrid28006 Spain Universidad Politécnica de Madrid ETSI Telecomunicación Avenida Complutense 30 Madrid28040 Spain

Several of the major causes of death in the world are related to neurological diseases, like strokes, sclerosis, or Parkinson’s. As a consequence, extraordinary amounts of clinical information are collected. With proper Modeling and Simulation (MS) techniques, predictive models can be defined to help physicians in their diagnoses. We have come to the conclusion that the implementation of an abstract MS methodology to facilitate the processing and modeling of the collected data would be of great help. In this paper, we focus on the development of such an abstract framework, mainly aimed at facilitating and automating the process of data collection and predictive and diagnose models. As a use case, we show how this methodology is applied to determine the stroke type and exitus (i.e. probability of death) of stroke patients in the early stages of their episodes. The best models are evaluated and constantly updated to generate these predictions. © 2019 Society for Modeling & Simulation International (SCS).

关键词： Diagnosis

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Fast Energy Estimation Through Partial Execution of HPC Applications 29

Fast Energy Estimation Through Partial Execution of HPC Appl...

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29th IEEE International Conference on Application-Specific Systems, architectures and Processors, ASAP 2018

作者： Salinas-Hilburg, Juan Carlos Zapater, Marina Moya, Jose M. Ayala, Jose L. Dept. of Computer Architecture and Automation Complutense University of Madrid Madrid Spain Lausanne Switzerland Integrated Systems Laboratory Technical University of Madrid Madrid Spain CCS-Center for Computational Simulation Madrid Spain

ISBN: (纸本)9781538674796

In order to optimize the energy use of servers in Data Centers, techniques such as power capping or power budgeting are usually deployed. These techniques rely on the prediction of the power and execution time of applications. These data are obtained via dynamic profiling which requires a full execution of the application. This is not feasible in High Performance Computing (HPC) applications with long execution times. In this paper, we present a methodology to estimate the dynamic CPU and memory energy consumption of an application without executing it completely. Our methodology merges static code analysis information and dynamic profiling via the partial execution of the application. We do so by leveraging the concept of application signature, defined as a reduced version of the application in terms of execution time and power profile. We validate our methodology with a set of CPU -intensive, memory-intensive benchmarks and multi-threaded applications in a presently shipping enterprise server. Our energy estimation methodology shows an overall error below 8.0% when compared to the dynamic energy of the whole execution of the application. Also, our energy estimation methodology allows to estimate the energy of multi-threaded applications with an RMSE equal to 12.7% when compared to the dynamic energy from the complete parallel execution. © 2018 IEEE.

关键词： Budget control

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An ultra low-cost cluster based on low-end fpgas 50

An ultra low-cost cluster based on low-end fpgas

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50th Summer computer Simulation Conference, SCSC 2018, Part of the 2018 Summer Simulation Multi-Conference, SummerSim 2018

作者： Hernández, Mariano Del Barrio, Alberto A. Botella, Guillermo Computer Science Faculty Universidad Complutense de Madrid Prof. José García Santesmases 9 Madrid Spain Dept. of Computer Architecture and Automation Universidad Complutense de Madrid Prof. José García Santesmases 9 Madrid Spain Switzerland

ISBN: (纸本)9781510860209

The need for high-performance and low-power computing is a hot topic nowadays. The most important companies are integrating FPGAs to achieve this because of their reconfigurability as well as their ability to work as efficient accelerators. In this work we propose a cluster of low-end Cyclone V FPGAs which are embedded within the DE1-SoC boards, which possess an ARM dual-core. A Debian 8-based operating system has been developed to include OpenCL support as well as a fast network connection. Several benchmarks have been parallelized for the cluster and a 56 logic core workstation, and results show that the cluster is more energy efficient (up to 83% energy reduction) with a cost nearly 6 times inferior to that of the workstation. © 2018 Society for Modeling & Simulation International (SCS).

关键词： Field programmable gate arrays (FPGA)

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Hybrid design tools - Making of a digitally augmented blackboard

arXiv

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arXiv 2018年

作者： Milincu, Camil Octavian Tudoran, Otilia Alexandra Tarce, Paul-Florin Banias, Ovidiu Politehnica University of Timisoara Faculty of Arhitecture and Urbanism Architecture Dept. Romania Politehnica University of Timisoara Faculty of Automation and Computer Science Automation and Applied Informatics Dept. Romania

The way that design is being taught is continuously changing under the pressure of the transition from analogical to digital environments. This becomes even more important as the novelty and the alleged superiority of the digital world is used as a marketing tool by competing universities. Even though in some fields of application this approach is desirable, some particular aspects of teaching design and architecture make this transition debatable. The advantages of drawing on blackboards over drawing on whiteboard surfaces in regards of line aesthetic and expression possibilities were previously identified, along with the complementary necessary features for improvement. This study showcases a proof of concept in digitally augmenting a blackboard surface. The system allows the capturing, processing and making real time projections of images over the blackboard surface as trace references. Such a hybrid system, along with providing support for design and architecture related presentations and discussions could also mediate the contradictory relation towards technology that students and teachers have. Copyright © 2018, The Authors. All rights reserved.

关键词： E-learning

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DEFINITION OF A TRANSPARENT CONSTRAINT-BASED MODELING AND SIMULATION LAYER FOR THE MANAGEMENT OF COMPLEX SYSTEMS

DEFINITION OF A TRANSPARENT CONSTRAINT-BASED MODELING AND SI...

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Simulation Multi-Conference

作者： Kevin Henares Jose L. Risco-Martin Marina Zapater Dept. of Computer Architecture and Automation Complutense University of Madrid Madrid Spain Embedded Systems Laboratory (ESL) Swiss Federal Institute of Technology Lausanne (EPFL) Lausanne Switzerland

Modeling and Simulation (M&S) is one of the most multifaceted topics present today in both industry and academia. However, we are involved in a new M&S paradigm. Systems are becoming more complex and new simulation needs arise and have to be studied. As a consequence, the way in which we perform M&S must be adapted, providing new ideas and tools. In this paper, we propose a rule-based constraints evaluator, which facilitate the validation and verification of complex models in a transparent manner. For this, constraints are defined. The constraints definition process is completely independent of the model development process because (a) the set of constraints is defined once the model has been developed, and (b) constraints are validated at simulation time. The proposed Constraint M&S architecture has been built using the Discrete Event System Specification (DEVS) formalism and has been tested on a validated data center simulation model.

关键词： Model checking Constraint modeling and simulation Discrete events Verification Data centers

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A DCT and neural network based system to obtain the characteristics of biological images 49

A DCT and neural network based system to obtain the characte...

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49th Summer computer Simulation Conference, SCSC 2017, Part of the 2017 Summer Simulation Multi-Conference, SummerSim 2017

作者： Fariña, Daniel Botella, Guillermo Del Barrio, Alberto A. Computer Science Faculty Universidad Complutense de Madrid Prof. José García Santesmases 9 Madrid Spain Dept. of Computer Architecture and Automation Universidad Complutense de Madrid Prof. José García Santesmases 9 Madrid Spain

ISBN: (纸本)9781510838284

The purpose of this paper is to determine the suitability of low-cost and low-power FPGA boards for acceleration, focused especially on cells classification in microscopy images. Our approach is based on simulation by means of using Matlab and Simulink. An implementation of the DCT is presented for the extraction of characteristics along with a classification Neural Network. Results show the execution time of the algorithms, their efficiency in terms of accuracy and the limitations of the hardware. The presented system is able to process 640x480 images in 0.53 seconds on average, with a total execution time of 5.04 seconds due to the transfer overhead. © 2017 Society for Modeling & Simulation International (SCS).

关键词： Simulink

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A DCT AND NEURAL NETWORK BASED SYSTEM TO OBTAIN THE CHARACTERISTICS OF BIOLOGICAL IMAGES 17

A DCT AND NEURAL NETWORK BASED SYSTEM TO OBTAIN THE CHARACTE...

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Simulation Multiconference

作者： Daniel Farina Guillermo Botella Alberto A. Del Barrio Computer Science Faculty Universidad Complutense de Madrid Dept. of Computer Architecture and Automation Universidad Complutense de Madrid

ISBN: (纸本)9781510838284

The purpose of this paper is to determine the suitability of low-cost and low-power FPGA boards for acceleration, focused especially on cells classification in microscopy images. Our approach is based on simulation by means of using Matlab and Simulink. An implementation of the DCT is presented for the extraction of characteristics along with a classification Neural Network. Results show the execution time of the algorithms, their efficiency in terms of accuracy and the limitations of the hardware. The presented system is able to process 640×480 images in 0.53 seconds on average, with a total execution time of 5.04 seconds due to the transfer overhead.

关键词： FPGA in the Loop Cell recognition Matlab Simulink Neuronal Network Cell recognition MATLAB execution time Neural network discrete cosine transforms DCT gene Artificial neural networks images

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Local energy micro-storage systems in smart communities with active, reactive and harmonic control 16

Local energy micro-storage systems in smart communities with...

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16th International Conference on Environment and Electrical Engineering, EEEIC 2016

作者： Milanes-Montero, Maria-Isabel Gonzalez-Romera, Eva Barrero-Gonzalez, Fermin Romero-Cadaval, Enrique Moreno-Munoz, Antonio Electrical Electronic and Automation Engineering Dept. University of Extremadura Badajoz Spain Computer Architecture Electronics and Electronic Technology Department Universidad de Córdoba Córdoba Spain

ISBN: (纸本)9781509023196

This paper aims to provide control strategies for distributed micro-storage energy systems at the residential level to contribute to smart grid goals. The operation of local Energy Storage Systems (ESS) at homes in a Smart Community with distributed generation based of renewable energies is analyzed by simulation. Each individual home receive the active and reactive power set-points from the Smart Community Energy Management System (SCEMS), acting as an aggregator of resources in the community according to the expected demand and production. Besides, in case the ESS has got available capacity, once the SCEMS requirements are satisfied, it is used to inject the harmonic current components demanded by the household circuitry. It allows a local improvement in the power quality of the demanded current, and so contributes to the global power quality consumption of the community. Simulation results showing the operation of the local ESS are presented to validate the proposed control strategies. © 2016 IEEE.

关键词： Energy management systems

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A technique for low power, stuck-at fault diagnosable and reconfigurable scan architecture

A technique for low power, stuck-at fault diagnosable and re...

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East-West Design & Test Symposium (EWDTS)

作者： Binod Kumar Boda Nehru Brajesh Pandey Virendra Singh Jaynarayan Tudu Computer Architecture and Dependable Systems Lab (CADSL) Indian Institute of Technology Bombay India Dept. of Computer Science and Automation Indian Institute of Science Bangalore

ISBN: (纸本)9781509006946

Power dissipation is a major issue with testing of designs having full scan architectures. The proposed scan technique minimizes toggle activity while scanning in test patterns. The method uses bit inversion technique to avoid toggles in scan flip-flops. The setup is dynamically configurable to one among the logic reversal structure and traditional scan while shift-in/shift-out of test patterns. Experimental results indicate that the average toggle activity is minimized substantially compared to California Scan architecture. It has features of full diagnosability of single stuck-at faults along the scan chain path.

关键词： computer architecture Silicon Circuit faults Testing Logic gates Inverters Clocks

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