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Scalable adaptive NUMA-aware Lock combining local locking and remote locking for efficient concurrency 16

Scalable adaptive NUMA-aware Lock combining local locking an...

引用

21st ACM SIGPLAN Symposium on Principles and Practice of parallel Programming, PPoPP 2016

作者： Zhang, Mingzhe Lau, Francis C.M. Wang, Cho-Li Cheng, Luwei Chen, Haibo Dept. Computer Science University of Hong Kong Hong Kong Facebook United States Institute of Parallel and Distributed Systems Shanghai Jiao Tong University China

ISBN: (纸本)9781450340922

Scalable locking is a key building block for scalable multi-threaded software. Its performance is especially critical in multi-socket, multi-core machines with non-uniform memory access (NUMA). Previous schemes such as local locking and remote locking only perform well under a certain level of contention, and often require non-trivial tuning for a particular configuration. Besides, for large NUMA systems, because of unmanaged lock server's nomination, current distance-first NUMA policies cannot perform satisfactorily. In this work, we propose SANL, a locking scheme that can de-liver high performance under various contention levels by adap-tively switching between the local and the remote lock scheme. Furthermore, we introduce a new NUMA policy for the remote lock that jointly considers node distances and server utilization when choosing lock servers. A comparison with seven represen-tative locking schemes shows that SANL outperforms the others in most contention situations. In one group test, SANL is 3.7 times faster than RCL lock and 17 times faster than POSIX mutex. © 2016 ACM.

关键词： Locks (fasteners)

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parallel programming with CAPSE-A case study 4

Parallel programming with CAPSE-A case study

引用

4th Euromicro Workshop on parallel and Distributed Processing, PDP 1996

作者： Gruber, B. Haring, G. Kranzlmuller, D. Volkert, J. University of Vienna Institute of Applied Computer Science Aid Information Systems Dept. of Advanced Computer Engineering Lenaugasse 218 ViennaA-1080 Austria Johannes Kepler University Linz Institute of Computer Science Dept. for Graphics and Parallel Processing Altenbergerstr. 69 LinzA-4040 Austria

ISBN: (纸本)0818673761

The CAPSE environment for computer Aided parallel Software Engineering is intended to assist the developer in the crucial task of parallel programming. The methodology of CAPSE is based on direct manipulative graphical creation and editing of scalable workload characterizations of MIMD algorithms. This paper presents the basic concepts of this methodology and an example of a parallel Poisson solver. The workload characterization representing the computation and communication behavior of the algorithm is based on directed acyclic task graphs, which achieve scalability by composing the task graph of scalable basic patterns instead of single node and arcs. The composition and the usage of these basic patterns is described in the light of designing the Poisson solver algorithm. The resulting task graph is used to predict the program's performance on a nCUBE 2 distributed memory machine and the PAPS simulator. © 1996 IEEE.

关键词： parallel programming

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A data parallel formulation of the barnes-hut method for N−body simulations 5th

A data parallel formulation of the barnes-hut method for N−...

引用

5th International Workshop on Applied parallel Computing, PARA 2000

作者： Amor, M. Argúello, F. López, J. Plata, O. Zapata, E.L. Dept. Electronics and Systems Univ. of La Coruña Spain Dept. Electronics and Computation Univ. of Santiago de Compostela Spain Dept. of Computer Architecture Univ. of Málaga Spain

ISBN: (纸本)354041729X

This paper presents a data-parallel formulation for N−body simulations using the Barnes-Hut method. The tree-structured problem is first linearized by using space-filling curves. This process allows us to use standard data distributions and parallel array operations available in data-parallel languages. A new efficient HPF implementation of the Barnes-Hut method is presented in this paper, characterized by the use of array copy sections to express communications, obtaining efficient point-to-point data transferences. In addition, HPF LOCAL constructs are used to obtain very compact and efficient local (node) codes. © Springer-Verlag Berlin Heidelberg 2001.

关键词： computers

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Photo rendering with swarms: From figurative to abstract pherogenic imaging

Photo rendering with swarms: From figurative to abstract phe...

引用

2013 IEEE Symposium on Computational Intelligence for Creativity and Affective Computing, CICAC 2013 - 2013 IEEE Symposium Series on Computational Intelligence, SSCI 2013

作者： Fernandes, Carlos M. Mora, Antonio Merelo, Juan Julian Cotta, Carlos Rosa, Agostinho C. Dep. of Computer Architecture and Technology University of Granada Spain Systems and Robotics Institute Technical University of Lisbon Portugal Dept. of Computer Languages and Computer Science University of Malaga Spain

ISBN: (纸本)9781467360104

This paper describes the use of ant colony models for photographic rendering, that is, for the depiction or interpretation of photographic images. A description of a previously proposed ant-based edge detection method called pherographia is given in order to contextualize this paper's proposal. Then, the application of the KANTS algorithm to photo-rendering is introduced. KANTS is ant-based clustering algorithm described by a set of equations that model the local behavior of simple units (ants). These units represent data samples. When moving on a heterogeneous 2-dimensional lattice of vectors, global behavior emerges from the local interaction between the ants, which self-organize into clusters. In this paper, a data set consists of the RGB values of a digital (or digitalized) photograph. Two different approaches for the initialization of the environment are tested, each one resulting in radically different output images: when the environment is initialized with the RGB values of the same image that is used to generate the data set, the final result is very similar to the original photo;a random initialization of the environment leads to an abstract interpretation of the photo. The results are contextualized within previous swarm artworks by the authors. © 2013 IEEE.

关键词： Ant colony optimization

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Warp-level divergence in GPUs: Characterization, impact, and mitigation

Warp-level divergence in GPUs: Characterization, impact, and...

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20th IEEE International Symposium on High Performance computer architecture, HPCA 2014

作者： Xiang, Ping Yang, Yi Zhou, Huiyang Dept. of Electrical and Computer Engineering North Carolina State University Raleigh NC United States Dept. of Computing Systems Architecture NEC Laboratories America Princeton NJ United States

ISBN: (纸本)9781479930975

High throughput architectures rely on high thread-level parallelism (TLP) to hide execution latencies. In state-of-art graphics processing units (GPUs), threads are organized in a grid of thread blocks (TBs) and each TB contains tens to hundreds of threads. With a TB-level resource management scheme, all the resource required by a TB is allocated/released when it is dispatched to / finished in a streaming multiprocessor (SM). In this paper, we highlight that such TB-level resource management can severely affect the TLP that may be achieved in the hardware. First, different warps in a TB may finish at different times, which we refer to as 'warp-level divergence'. Due to TB-level resource management, the resources allocated to early finished warps are essentially wasted as they need to wait for the longest running warp in the same TB to finish. Second, TB-level management can lead to resource fragmentation. For example, the maximum number of threads to run on an SM in an NVIDIA GTX 480 GPU is 1536. For an application with a TB containing 1024 threads, only 1 TB can run on the SM even though it has sufficient resource for a few hundreds more threads. To overcome these inefficiencies, we propose to allocate and release resources at the warp level. Warps are dispatched to an SM as long as it has sufficient resource for a warp rather than a TB. Furthermore, whenever a warp is completed, its resource is released and can accommodate a new warp. This way, we effectively increase the number of active warps without actually increasing the size of critical resources. We present our lightweight architectural support for our proposed warp-level resource management. The experimental results show that our approach achieves up to 76.0% and an average of 16.0% performance gains and up to 21.7% and an average of 6.7% energy savings at minor hardware overhead. © 2014 IEEE.

关键词： Graphics processing unit

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A performance tuning approach for shared-memory multiprocessors

引用

3rd International Conference on parallel Processing, Euro-Par 1997

作者： Stenström, Per Skeppstedt, Jonas Dept. of Computer Engineering Chalmers University of Technology SE-412 96 Gothenburg Sweden Centre for Computer Systems Architecture Halmstad University SE-301 18 Halmstad Sweden

ISBN: (纸本)9783540634409

Performance tuning of applications for shared-memory multiprocessors is to a great extent concerned with removal of performance bottlenecks caused by communication among the processors. To simplify performance tuning, our approach has been to extend the hardware/software interface with powerful memory-control primitives in combination with compiler optimizations to remove communication bottlenecks in distributed shared-memory multiprocessors. Evaluations have shown that this combination can yield quite dramatic application performance improvements. This raises the fundamental question of how the hardware/software interface in future distributed shared-memory machines should be defined to serve as a good target for performance tuning of shared-memory programs, either automatically or by hand. An approach along those lines is discussed.

关键词： Memory architecture

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Towards safe data flow processing by integration of design by contract in deterministic UML activities

Towards safe data flow processing by integration of design b...

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2011 23rd International Symposium on Information, Communication and Automation Technologies, ICAT 2011

作者： Daw, Zamira Vetter, Marcus Boercsoek, Josef Institute of Embedded Systems Hochschule Mannheim - University of Applied Sciences Mannheim Germany Dept. of Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9781457707469

Data flow processing is a common task of embedded systems which is usually modeled as a pipeline. Errors in a block of this pipeline can be propagated through it thus leading to unexpected and erroneous behaviors. For safety related applications, this pipeline has to be able to identify and react to failures. The DMOSES model-driven development method uses deterministic UML activities to describe and implement data flow processing. This method ensures deterministic behavior of concurrent processing. Design by Contract defines formal, precise and verifiable interfaces for software components. We propose a development method for safe data flow processing based on the integration of this concept in deterministic UML activities. This integration allows the identification of errors by detection of contracts violation. This paper presents an extension of the DMOSES tool for contracts verification at the model level and their monitoring at runtime. © 2011 IEEE.

关键词： Pipelines

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BC4ECO - Using Visual Tools for a Shared Understanding and Pedagogical Approach across an Interdisciplinary Consortium 47

BC4ECO - Using Visual Tools for a Shared Understanding and P...

引用

47th IEEE Annual computers, Software, and Applications Conference, COMPSAC 2023

作者： Peruccon, Andy Lyons, Roisin De Gotzen, Amalia Margaria, Tiziana Simeone, Luca Design and Media Technology Aalborg University Dept. of Architecture Copenhagen Denmark Kemmy Business School University of Limerick Limerick Ireland University of Limerick Dept. of Computer Science and Information Systems Limerick Ireland

ISBN: (纸本)9798350326970

Effective communication is crucial when working on complex or wicked problems in interdisciplinary, international teams. Developing a shared understanding of critical concepts and aligning knowledge, focus, and resources can be problematic when stakeholders speak different languages, span several disciplines and work within different national or industry-based norms. Using visual tools to represent critical concepts and their relations, and map out our strategic goals has greatly helped combat such issues. This paper recounts the use and impact of adopting visual tools within the transnational and interdisciplinary collaborative environment in the BC4ECO project's international consortium. The Miro Board and the canvas approach greatly helped represent, visualise, and thus concretise the structure and contents of our collaboration, which takes place within a 3 years ERASMUS+ framework that builds and delivers Summer School, MOOCS as well as teacher and multiplier events about harnessing the potential of Distributed Ledger Technologies (DLTs) for environmental sustainability. As the materials and MOOCS are expected to become Open Education Resources and have a wide impact, it is particularly crucial to get the contents as well as the pedagogy right, in spite of the team's differences in almost any dimension of background and culture. © 2023 IEEE.

关键词： Blockchain

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Development of an Ontology for Bulgarian Soil Types

Development of an Ontology for Bulgarian Soil Types

引用

2023 International Conference Automatics and Informatics, ICAI 2023

作者： Stoyanova-Doycheva, Asya Madanska, Sebiha Bilyanov, Sheban University of Plovdiv 'Paisii Hilendarski' Dept. of Computer Systems Plovdiv Bulgaria Iict Bulgarian Academy of Sciences Sofia Bulgaria University of Architecture Civil Engineering and Geodesy Dept. of Residential Buildings Sofia Bulgaria

ISBN: (纸本)9798350312911

The article presents the development of an ontology for the Taxonomic List of Soils in Bulgaria (according to the FAO World System). In addition to soil types, the ontology includes knowledge about the different agro-climatic regions in Bulgaria that are suitable for cultivating various agricultural crops. The ontology is part of the knowledge base of the ZEMELA platform for smart agriculture. © 2023 IEEE.

关键词： Soils

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Hardware implementation of a controller based on neurobiological adaptive models of the human motor-control system

Hardware implementation of a controller based on neurobiolog...

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2002 IEEE International Conference on systems, Man and Cybernetics

作者： Martinez-Álvarez, J.J. Guerrero-González, A. Pedreño-Molina, J.L. Villaescusa-Fernández, A. Manuel Ferrandez, J. López-Coronado, J. Dept. of Computer Architecture Technical University of Cartagena Campus Muralla del Mar 30.202 Cartagena Murcia Spain Dept. of Systems Engineering Technical University of Cartagena Campus Muralla del Mar 30.202 Cartagena Murcia Spain

In this work, a neural structure has been implemented into a device based on the new tendencies on hardware integration, for motor-control in multisensorial anthropomorphic robotic systems. This implementation gives a solution to the problem of physic integration of biologically inspired control hierarchies in a robotic headarm installation for robotic reaching tasks. The complete architecture has been implemented on a electronic board connected to a PC computer through a PCI interface. The hardware structure consists on two block, one for the working phase of the system, and other for the learning and supervision phase of the system. These two blocks have been implemented with different technologies based on DSP processors and FPGAs. The algorithms implemented on DSPs have the function of updating the neural network on the FPGA, supervise the well-working of the algorithm implemented on FPGA and introduce corrections when the neural network produces results with little errors. The neural network has been implemented on FPGA and implements the spatial-motor transformations of the robotic platform. It is programmed and updated by the supervisor implemented on the DSP processor.

关键词： Robotics

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