Performance modeling is a key bottleneck for analog design automation. Although machine learning-based models have advanced the state-of-the-art, they have so far suffered from huge data preparation cost, very limited...
Performance modeling is a key bottleneck for analog design automation. Although machine learning-based models have advanced the state-of-the-art, they have so far suffered from huge data preparation cost, very limited reusability, and inadequate accuracy for large circuits. We introduce ML-based macro-modeling techniques to mitigate these problems for linear analog ICs and ADC/DACs. On representative testcases, our method achieves more than 1700× speedup for data preparation and remarkably smaller model errors compared to recent ML approaches. It also attains 3600× acceleration over SPICE simulation with very small errors and reduces data preparation time for an ADC design from 40 days to 9.6 hours.
In the tapestry of human communication, speech has long been regarded as a cornerstone, seamlessly weaving the fabric of understanding and connection. Yet, for individuals facing hearing impairments or navigating envi...
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In the tapestry of human communication, speech has long been regarded as a cornerstone, seamlessly weaving the fabric of understanding and connection. Yet, for individuals facing hearing impairments or navigating environments where audible communication is limited, the reliance on traditional speech recognition technologies proves restrictive. Enter the realm of Visual Speech Recognition (VSR), an innovative domain seeking to decipher spoken language by interpreting the nuanced movements of the lips. In the crucible of this cutting-edge pursuit, our research takes centre stage with the project "LipCraft: Building a Visual Speech Recognition System with Machine Learning.". This project," LipCraft: Building a VSR System with Machine Learning and Streamlit Integration," stands at the convergence of these technologies, offering a holistic approach to redefine the boundaries of communication. The genesis of LipCraft is fuelled by a profound motivation rooted in inclusivity and technological innovation. Recognizing the constraints of traditional speech recognition, particularly for those with hearing impairments, the project aims to transcend these limitations by harnessing the power of deep learning, Convolutional Neural Networks (CNNs), Long Short-Term Memory (LSTM) networks, and the unique capabilities of a Connectionist Temporal Classification (CTC) decoder. The scope of LipCraft extends beyond theoretical exploration into the practical realm, encompassing applications in accessibility services, education, and content creation. The project's innovative integration of technologies is not confined to the realms of machine learning and deep learning alone. LipCraft also introduces a user-friendly application interface developed with the Streamlit framework, demonstrating a commitment to making the technology accessible and user centric. LipCraft's objectives are ambitious and multifaceted. At its core objective to elevate the precision and efficiency of visual speech rec
Finding similar code in software systems can guide several software engineering tasks such as code maintenance, program understanding, and code reuse. Similar code detection has been actively studied in the past. In t...
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The Internet of Things is the term we call when devices are connected to the network and work together to provide a better experience for users, facilitate better decision-making, and improve operations. As with any i...
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ISBN:
(数字)9798331527549
ISBN:
(纸本)9798331527556
The Internet of Things is the term we call when devices are connected to the network and work together to provide a better experience for users, facilitate better decision-making, and improve operations. As with any invention, this one also has its disadvantages. IoT devices have complex structures and low processing capacities. There are serious security risks in designing IoT like poor authentication, data leakage, and DDoS attacks. In this review paper, how AI can secure IoT is discussed. A few AI-driven strategies that help mask all these weaknesses are also discussed regarding intrusion detection systems (IDS), behavioural analytics, anomaly detection, and real-time threat monitoring. It presents a four-layered IoT architecture consisting of perception, network, support, and application layers. The use of the IoT systems will become more flexible and efficient in data security and collection, secure and encrypted communication, and predictive security analytics. AI will play the same role in improving the threat perception, real-time identification, and response, as this will make it indispensable to ensure the IoT environment security. This work emphasizes the urgent need for solid AI-powered, multilayered adaptive security frameworks to match the evolving demands of cybersecurity.
Maintaining privacy and trust within Vehicular Edge Computing (VEC) systems requires proper authentication methods that ensure safety and effectiveness in dynamic settings. Current authentication solutions face three ...
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The successive approximation register (SAR) analog-to-digital converter (ADC) architecture is employed to achieve low power consumption, allowing it to operate at low supply voltage. A time-domain quantization archite...
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ISBN:
(数字)9798331504120
ISBN:
(纸本)9798331504137
The successive approximation register (SAR) analog-to-digital converter (ADC) architecture is employed to achieve low power consumption, allowing it to operate at low supply voltage. A time-domain quantization architecture based on a time-domain comparator is combined to overcome the design bottlenecks caused by the reduced intrinsic gain of transistors, the increased process variation, and the decreased supply voltage in advanced processes. A voltage-to-time converter based on a voltage-controlled oscillator (VCO) is used, providing the benefits of circuit stability and low noise impact. This design can be further improved by adding an SR time amplifier to the output of VCO, allowing the phase difference to grow exponentially. Hence, a faster escape from the dead zone of the phase detector can be realized to resolve the issue between high resolution and high speed in traditional VCO comparators. To accommodate the output generated by the improved voltage-to-time converter, the operation mode of the phase detector is modified, enabling it to be applied to the new voltage-to-time converter output. This paper presents a 10-bit SAR ADC in TSMC 40nm process, with a conversion rate of 10MS/s, a supply voltage of 0.9V, power consumption of 57.9µW, an ENOB of 9.88 bits, an SFDR of 74.07dB, and a FoM of 6.14 fJ/conv.-step.
There are several notions of duality between lines and points. In this note, it is shown that all these can be studied in a unified way. Most interesting properties are independent of specific choices. It is also show...
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Fog Computing enables the efficient offloading of computational tasks from IoT Devices to Fog nodes, enhancing processing efficiency and reducing latency. This paper introduces the Dynamic Matching with Deferred Accep...
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ISBN:
(数字)9798331506490
ISBN:
(纸本)9798331506506
Fog Computing enables the efficient offloading of computational tasks from IoT Devices to Fog nodes, enhancing processing efficiency and reducing latency. This paper introduces the Dynamic Matching with Deferred Acceptance (DMDA) algorithm, designed to optimize the allocation of GPU and CPU resources within Fog Computing environments, specifically for smart city applications. The DMDA algorithm allocates resources to IoT Devices based on parameters such as data type, computational load, priority, and responsiveness. Devices processing image or video data are given priority for GPU allocation, while other devices are assigned to CPUs based on their cumulative performance scores. Devices with lower priority are reassigned to CPU resources or excluded when resource availability is exhausted, significantly enhancing performance under high-demand scenarios. The algorithm employs a Mixed-Integer Linear Programming (MILP) model to maximize the aggregate score of allocated devices while adhering to resource constraints. Experiments conducted with 50 to 1,000 devices demonstrate that both the total Device Score rate and Allocated Device rate reach 100%, indicating optimal allocation. Empirical findings show that the DMDA algorithm improves resource utilization, reduces processing times, and ensures effective workload distribution across large-scale IoT deployments.
Malware analysis is a complex process of examining and evaluating malicious software’s functionality, origin, and potential impact. This arduous process typically involves dissecting the software to understand its co...
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Facial forgery by deepfakes has caused major se-curity risks and raised severe societal concerns. As a counter-measure, a number of deepfake detection methods have been proposed. Most of them model deepfake detection ...
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