As a geographical method of analyzing power redistribution, Systemic Geopolitical Analysis (according to Ioannis Th. Mazis theoretical basis) proposes a multi-dimensional, interdisciplinary research pattern, which emb...
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As a geographical method of analyzing power redistribution, Systemic Geopolitical Analysis (according to Ioannis Th. Mazis theoretical basis) proposes a multi-dimensional, interdisciplinary research pattern, which embraces economic, cultural, political and defensive facts. The amount of data produced combining these attributes is extremely large and complex. One of the solutions to explore and analyze this data is clustering it and one of the most popular and useful techniques in order to group data within appropriate sets is k-means algorithm which clusters data according to its characteristics. The main disadvantage is its computational complexity which makes the technique very difficult to apply on big and dynamic data sets. In this study, a parallel version of k-means is used in order to cluster the European Union countries according to their attributes and the results obtained prove the importance of this research.
E-government benchmarking is the process of ranking e-government according to some agreed best practices. It can be used not only to benchmark but also to assess achievements and identify missing best practices for st...
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E-government benchmarking is the process of ranking e-government according to some agreed best practices. It can be used not only to benchmark but also to assess achievements and identify missing best practices for stakeholders. The purpose of this paper is to propose guidelines to build a new benchmarking framework for e-government portals. This framework is based on measurement of best practices using a best practice model. For this purpose, we have first identified and presented five examples of the benchmarking frameworks available in the literature. Based on the conducted comparison, the findings show that although the benchmarking frameworks are serving their intended purposes, they still suffer from some limitations. The paper also explains how the new framework overcomes these limitations.
In this paper, a new sigma delta modulator based on a multiplexed input topology is proposed to decrease power consumption and size in implantable bio-interfacing systems. An opamp sharing technique is employed in ord...
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In this paper, a new sigma delta modulator based on a multiplexed input topology is proposed to decrease power consumption and size in implantable bio-interfacing systems. An opamp sharing technique is employed in order to process several input sequentially. The proposed sigma delta modulator integrates each input separately and stores the integrated value inside a dedicated capacitor. We show that the resulting transfer function of the modulator is equivalent for all channels. The proposed circuit has been implemented in a 180-nm TSMC process. The circuit includes 4 channels and consumes 11.5 μW per channel, provides an ENOB of 7.8 bits, and presents a bandwidth of 10 kHz. The chip area for the proposed design is 150 μm × 135 μm for 4 multiplexed inputs.
In this paper, we propose a level shifter circuit that is able to convert signal levels of subthreshold values to super-threshold signal levels. Such a circuit is using a new voltage level shifter topology employing a...
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In this paper, we propose a level shifter circuit that is able to convert signal levels of subthreshold values to super-threshold signal levels. Such a circuit is using a new voltage level shifter topology employing a level-shifting capacitor. This capacitor is charged only when the logic levels of the input and output signals are not corresponding to a high-to-low transition of the input signal. The proposed circuit has a small silicon area, low-power consumption and short propagation delay. Post-layout Simulation results for the proposed circuit implemented in a 0.18-μm 1P6M CMOS technology confirm that the power consumption of this circuit is extremely low comparing to other topologies, and is able to operate over a wide range of the input voltages from 50 mV to 1.8 V, and a wide range of frequencies from 100 Hz to 100 MHz. For both a 0.4 V and a 1.8V supply voltages, the proposed circuit has a propagation delay of 10.43 ns and a power consumption of 9.89 nW for a 10-kHz input signal.
In this work, we propose a scheme, named LECRAD, for the re-construction of temporarily lost connectivity in the presence of dumb nodes in stationary wireless sensor networks. A sensor node is termed as "dumb&quo...
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In this work, we propose a scheme, named LECRAD, for the re-construction of temporarily lost connectivity in the presence of dumb nodes in stationary wireless sensor networks. A sensor node is termed as "dumb", when it continues its physical sensing, but fails to communicate due to shrinkage in communication range, typically attributed to adverse environmental effects such as rainfall, fog and high temperature. On the resumption of favorable environmental conditions, the node starts to behave normally. So, dumb behavior is dynamic in nature. Such behavior of a node leads to network partitioning and node isolation, which results in disruption of connected topology. Therefore, the proposed scheme in this paper reconstructs the lost connectivities between nodes by activating intermediate sleep nodes or by adjusting the communication range of the sensor nodes, while there is no neighbor node within the reduced communication range. In the proposed scheme, a learning automata-based approach is used for activation of intermediate sleep nodes or adjustment of communication range of isolated or intermediate nodes to decrease the message overhead and energy consumption of the network. Simulation results show that the proposed scheme, LECRAD, exhibits better energy efficiency and message overhead than that of the recently proposed topology management protocols, LETC and Al, if they are applied in such scenario.
With the advent of cloud computing, a significant number of web services are available on the Internet. Services can be combined together when user's requirements are too complex to be solved by individual service...
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With the advent of cloud computing, a significant number of web services are available on the Internet. Services can be combined together when user's requirements are too complex to be solved by individual services. Since there are many services, searching a solution may require much storage. We propose to apply a compact data structure to represent the web service composition graph. To the best of our knowledge, our work is the first attempt to consider compact structure in solving the web service composition problem. Experimental results show that our method can find a valid solution to the composition problem, meanwhile, it takes less space and shows good scalability when handling a large number of web services.
HLS tools have been introduced with the promise of easening and shortening the design cycle of tedious and error-prone RTL-based development of hardware accelerators. However, they do so either by concealing meaningfu...
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HLS tools have been introduced with the promise of easening and shortening the design cycle of tedious and error-prone RTL-based development of hardware accelerators. However, they do so either by concealing meaningful hardware decisions which model the computing architecture-such as OpenCL compilers-or by abstracting them away into a high-level programming language-usually C-based. In this paper, we show that although Vivado HLS is sufficiently mature to generate a functionally correct FPGA accelerator from a naive description, reaching an accelerator which optimizes the FPGA resource utilization in a way that conveys maximum performance is a process for a hardware architect mindset. We use a highly demanding application, that requires real-time operation, and develop a non-binary LDPC decoder on a state-of-the-art Virtex 7 FPGA, using the Vivado HLS framework. Despite using the same programming syntax as a C-language software compiler, the underlying programming model is not the same, thus, the optimizations required in code refactoring are distinct. Moreover, directive-based optimizations that tweak the synthesized C description hardware must be used in order to attain efficient architectures. These processes are documented in this paper, to guide the reader on how an HLS-based accelerator can be designed, which in our case can come close to the performance achieved with dedicated hand-made RTL descriptions.
• demonstrate the concept of simulations prepared for the new challenges which appear with a new type of operations in the airspace • based on the state space description of the dynamic system — the AV — and is desi...
• demonstrate the concept of simulations prepared for the new challenges which appear with a new type of operations in the airspace • based on the state space description of the dynamic system — the AV — and is designed to allow the control over a character of the system or measurement noise. • anticipated main factor — multipath effect. The multipath propagation may affects mainly the PDF of the measurement noise.
Dynamic spectrum access is regarded as a backbone for cognitive radio networks where unlicensed secondary users (SUs) access spectrum opportunistically which is licensed to licensed primary users (PUs). SUs are requir...
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Dynamic spectrum access is regarded as a backbone for cognitive radio networks where unlicensed secondary users (SUs) access spectrum opportunistically which is licensed to licensed primary users (PUs). SUs are required to identify the idle bands and use them dynamically without creating any harmful interference to PUs. In dynamic spectrum access for peer-to-peer based communications, SU transmitter and its intended SU receiver must use common channel to communicate. Note that the fixed common control channel could not be viable in case of jamming attacks and wideband regime. Thus in this paper, we present a test bed using Universal software Radio Peripheral (NI USRP) devices. We use Lab View® and MATLAB® scripting extensions to program NI USRP devices for peer-to-peer communications. Once SU transmitter and receiver pair knows idle channels, they use one of the best idle channels to communicate. We study sequential channel scanning and quorum based rendezvous methods without using any common control channels. These two schemes are compared in terms of their performance for finding suitable channel. Test bed is developed to test these schemes. Numerical results are presented obtained from test bed.
One characteristic of non-volatile memory (NVM) is that, even though it supports non-volatility, its retention capability is limited. To handle this issue, previous studies have focused on refreshing or advanced error...
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One characteristic of non-volatile memory (NVM) is that, even though it supports non-volatility, its retention capability is limited. To handle this issue, previous studies have focused on refreshing or advanced error correction code (ECC). In this paper, we take a different approach that makes use of the limited retention capability to our advantage. Specifically, we employ NVM as a file cache and devise a new scheme called amnesic cache management (ACM). The scheme is motivated by our observation that most data in a cache are evicted within a short time period after they have been entered into the cache, implying that they can be written with the relaxed retention capability. This retention relaxation can enhance the overall cache performance in terms of latency and energy since the data retention capability is proportional to the write latency. In addition, to prevent the retention relaxation from degrading the hit ratio, we estimate the future reference intervals based on the inter-reference gap (IRG) model and manage data adaptively. Experimental results with real-world workloads show that our scheme can reduce write latency by up to 40% (30% on average) and save energy consumption by up to 49% (37% on average) compared with the conventional LRU based cache management scheme.
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