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检索条件"机构=Dept. of Electrical and Computer Engineering and Technology"

共 55634 条记录，以下是141-150 订阅

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Improved Half-Bridge Z-Source Inverter Based Gamma Structure with Continuous Input Current 65

Improved Half-Bridge Z-Source Inverter Based Gamma Structure...

引用

65th IEEE Annual International Scientific Conference on Power and electrical engineering of Riga Technical University, RTUCON 2024

作者： Bahador, Asghar Babaei, Ebrahim Chauhan, Sachin University of Tabriz Faculty of Electrical and Computer Engineering Tabriz Iran Tallinn University of Technology Dept. of Electrical Power Engineering and Mechatronics Tallinn Estonia

ISBN: (纸本)9798350365771

In this paper, a new structure of the impedance source inverter based on the gamma half-bridge structure is proposed. In addition to having the advantages of the conventional gamma impedance source inverter, the proposed inverter also has more advantages. The boost factor has been improved in the proposed structure. Also, the number of passive components has decreased, which will increase the efficiency of the inverter. To reduce the size and weight of the proposed inverter, the voltage stress on the components of the proposed structure is reduced. Another advantage of the proposed structure is the continuity of the input current along with the improvement of the input current ripple. The continuity of input current is very important in applications of renewable energy sources such as solar energy. The continuity of the input current makes the maximum use of the input energy source. To see the advantages of the proposed inverter compared to other common inverters, a comparison between the proposed inverter and other common structures will be made and the results of the comparison will be expressed. Finally, PSCAD/EMTDC simulation software will be used to confirm the correctness of the calculated theoretical relationships. © 2024 IEEE.

关键词： Renewable energy

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Power Consumption Assessment of Telecommunication Base Stations Harnessing Prototype Energy Models 15

Power Consumption Assessment of Telecommunication Base Stati...

引用

15th International Conference on Information, Intelligence, Systems and Applications, IISA 2024

作者： Fevgas, Athanasios Korinthios, John A. Tsompanopoulou, Panagiota Frangogiannis, Nikolaos Tsoumanis, Pelopidas Paliaroutis, Georgios-Ioannis Takou, Alexandra Stamoulis, George University of Thessaly Dept. of Electrical and Computer Engineering Volos Greece

ISBN: (纸本)9798350368833

Energy consumed in telecommunication base stations is a significant part of the cellular network energy footprint. Efficient energy use, renewable energy sources, and infrastructure improvement can generate substantial energy savings. We aim to provide a roadmap to fulfill this objective, and energy modeling plays a crucial role in this direction. We introduce five base station energy models for the state-of-the-art EnergyPlus simulator, and we present the development of an OpenStudio Measure for the parameterization of the proposed models. The prototype models and the Measure provide network operators with a comprehensive tool suite for base station energy simulations. This makes our work apart from previous efforts. We conduct a case study demonstrating different usage scenarios of the proposed models utilizing the OpenStudio Application and the OpenStudio Analysis Framework (OSAF). The simulations indicate that construction materials and methods influence the energy efficiency of base stations, while ventilation and photo-voltaics can reduce consumption. Another merit of simulations is that they reveal the most important parameters for the energy performance of base stations. © 2024 IEEE.

关键词： Base stations

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Examination of PHY Layer Features in DECT-2020 and LTE-M Networks 10

Examination of PHY Layer Features in DECT-2020 and LTE-M Net...

引用

10th IEEE Information technology International Seminar, ITIS 2024

作者： Kizilirmak, Refik Caglar Askarov, Satzhan Nazarbayev University Dept. of Electrical and Computer Engineering Astana Kazakhstan

ISBN: (纸本)9798331521295

This paper provides a comparative analysis of the physical layer (PHY) characteristics of DECT-2020 NR and LTE-M, two critical standards for IoT communication. DECT-2020 NR, developed by ETSI, is intended for industrial IoT applications and provides low-latency, reliable communication in high-density environments. In contrast, LTE-M, which is a member of the 3GPP family, is designed to provide broad coverage, energy efficiency, and mobility support for low-power devices. The study emphasizes the distinctions between the standards regarding data rates, modulation schemes, and frequency bands, displaying how each standard fulfills specific IoT requirements. Furthermore, it highlights the complementing characteristics of DECT-2020 NR and LTE-M, by providing performance insights such as bit-error rate (BER) analysis and spectral efficiency. © 2024 IEEE.

关键词： Spectrum efficiency

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Latency Analysis of In-Vehicle Network for Advanced Driver Assistance System 100

Latency Analysis of In-Vehicle Network for Advanced Driver A...

引用

100th IEEE Vehicular technology Conference, VTC 2024-Fall

作者： Park, Hanyoung Cho, Minji Jang, Yongjae Choi, Ji-Woong Dept. of Electrical Engineering & Computer Science Daegu Korea Republic of

ISBN: (纸本)9798331517786

Considering the advancements in autonomous driving technologies, the necessity for an advanced driver assistance system (ADAS) to incorporate a multitude of sensors for enhanced precision has become paramount. Consequently, the increase of sensors correlates directly with the escalation of autonomous driving capabilities. However, this escalation causes a larger volume of data traffic and an increase in the latency within the in-vehicle network (IVN). As the IVN latency increases, the overall latency of ADAS from the sensor to the actuator increases. This increased latency can affect the safety of ADAS. Hence, latency analysis for various sensors is required. In this paper, we struct Ethernet-based zonal architecture considered for future automotive architecture and analyze the factor of end-to-end latency for the safety-related ADAS with multi-type sensors, including IVN latency. © 2024 IEEE.

关键词： Advanced driver assistance systems

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Mapping Enumeration for Multi-Context CGRAs Using Zero-Suppressed Binary Decision Diagrams 32

Mapping Enumeration for Multi-Context CGRAs Using Zero-Suppr...

引用

32nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2024

作者： Beidas, Rami Anderson, Jason H. University of Toronto Dept. of Electrical and Computer Engineering TorontoON Canada

ISBN: (纸本)9798350372434

A primary aim of Coarse-Grained Reconfigurable Arrays (CGRAs), compared to FPGAs, is to maximize the portion of the die used for computational resources, while minimizing the complexity of control and steering logic, leading to inherently constrained routing architectures. This challenge has compelled CAD developers to utilize exact solutions, such as integer linear programming (ILP), in formulating and solving the mapping problem. Those solutions have been shown not to scale, especially for larger devices with intricate architectural features, such as multiple contexts and optional pipeline registers. Even if an exact or a greedy approach yields a feasible solution, it often fails to optimize multifaceted objective criteria. In this work, we have devised a framework for systematically enumerating mapping solutions of a subject kernel on a target CGRA using Zero-Suppressed Binary Decision Diagrams (ZDDs). To effectively manage runtime, we developed a linear algorithm that retains the best k solutions at each stage of the mapping flow, where both the objective function and k are user defined. Experimental results on a diverse range of application kernels targeting two CGRA architectures show how we can enumerate hundreds of thousands of solutions within seconds. When compared against prior methodologies, and while generating dozens of solutions, our mapper exhibits a remarkable speed advantage, ranging from one to three orders of magnitude faster than exact and heuristic approaches. Notably, when allocated the same runtime as the fastest heuristic, our framework demonstrates its efficacy by generating an impressive 105 solutions. © 2024 IEEE.

关键词： Mapping

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Error Analysis and Evaluation of Approximate Adder Circuits in 180nm technology 19

Error Analysis and Evaluation of Approximate Adder Circuits ...

引用

19th Iranian Conference on Intelligent Systems, ICIS 2024

作者： Yousefnejhad, Reza Omidi, Reza University of Zanjan Dept. Electrical and Computer Engineering Zanjan Iran

ISBN: (纸本)9798331507565

The connection between approximate computations and artificial intelligence arises from employing algorithms and methodologies as exemplars for trained models across machine learning, neural networks, reinforcement learning, and various other artificial intelligence methodologies. This paper delves into the application of approximation techniques in digital adder circuits, exploring the potential benefits in terms of energy efficiency, performance enhancement, and computational speed. By examining various types of approximate adders and their implementation strategies, the study investigates the trade-off between accuracy and efficiency. The research focuses on designing adders that achieve optimal performance while minimizing hardware overhead. Through extensive error analysis, the study sheds light on the feasibility of approximation methods in practical applications, demonstrating their effectiveness in mitigating energy and performance challenges. The findings underscore the significance of approximation techniques as a viable solution for optimizing hardware design in modern computing systems. © 2024 IEEE.

关键词： Adders

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A 22T Static Contention-free Conjoined Master-Slave Flip-flop for Low-Voltage, Low-Power, and Low-Area Applications

A 22T Static Contention-free Conjoined Master-Slave Flip-flo...

引用

2024 IEEE Asian Solid-State Circuits Conference, A-SSCC 2024

作者： Shin, Gicheol Han, Shin Jeong, Minhyeok Seo, Donguk Lee, Yoonmyung Dept. of Electrical and Computer Engineering Sungkyunkwan University Korea Republic of

ISBN: (纸本)9798350376326

Low-voltage flip-flops that operate reliably in a low-voltage regime are crucial for extending battery life in energy-constrained IoT applications. Minimizing dynamic power consumption is also vital for reducing overall SoC power. Additionally, it is important to reduce the area occupied by flip-flops as a significant portion of processor area is dedicated to sequential elements. Prior-art flip-flop designs [1-6] have aimed to be static contention-free (for robustness) and eliminate redundant clock transitions (for low power) simultaneously. However, many failed to meet one of these goals [1-4] or achieved both at a high area cost. This paper introduces a novel design that meets both requirements and achieves a smaller area compared to a conventional Transmission Gate Flip-Flop (TGFF) design. © 2024 IEEE.

关键词： Flip flop circuits

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Enhancing Inter-Satellite Data Relay in Dynamic Space Communication 26

Enhancing Inter-Satellite Data Relay in Dynamic Space Commun...

引用

26th International Conference on Advanced Communications technology, ICACT 2024

作者： Kizilirmak, Refik Caglar Ehile, Israel Ehile Kabdrashev, Bekzat Khvan, Sergey Nazarbayev University Dept. of Electrical and Computer Engineering Astana Kazakhstan

ISBN: (纸本)9791188428120

In this paper, we explore the design and operations of an inter-satellite data relay network, which includes Low Earth Orbit (LEO), Medium Earth Orbit (MEO), and Geo-stationary Orbit (GEO) satellites. Due to the different orbiting speeds and dynamic behaviors of these satellite constellations, we consider Delay-Tolerant Networking (DTN) between them and implement contact graph routing (CGR) at the layer-3 and Licklider Transmission Protocol (LTP) at layer-4. We base our analysis on a realistic space scenario where satellite locations and movements over time are extracted from a real-time satellite database. We demonstrate end-to-end latency and goodput of a file transfer through the satellite network under consideration. © 2024 Global IT Research Institute - GIRI.

关键词： Delay tolerant networks

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Variational Mode Decomposition Denoising Using Anderson-Darling Statistics 9

Variational Mode Decomposition Denoising Using Anderson-Darl...

引用

9th International Conference on Frontiers of Signal Processing, ICFSP 2024

作者： Naveed, Khuram Ur Rehman, Naveed Aarhus University Dept. Electrical and Computer Engineering Aarhus Denmark

ISBN: (纸本)9798350353235

A novel signal denoising method is proposed based on variational mode decomposition (VMD) and Anderson-Darling statistics. The VMD method expands a signal into its frequency components, i.e., time series corresponding to a narrow range frequencies, termed intrinsic mode functions (IMFs) of the input signal. While initial IMFs contain most of the signal, the challenge remains the identification of these IMFs and presence of noise in the IMFs corresponding to signal. We propose to address this problem using the Anderson-Darling (AD) test. To that end, we compare the empirical distribution function (EDF) of the local coefficients of the VMD with the EDF of noise using AD statistics under the framework of goodness-of-fit (GoF) test. The coefficients exhibiting noise-like distribution are set to zero for noise removal. We demonstrate the effectiveness of proposed VMD-AD-GoF method using simulations on wide variety of signals. © 2024 IEEE.

关键词： Variational mode decomposition

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Investigating the Impact of Induction Motor Starting on Grid-Forming Inverter-Based Microgrid 13

Investigating the Impact of Induction Motor Starting on Grid...

引用

13th IEEE Power and Energy Society: Innovative Smart Grid Technologies - Asia, ISGT Asia 2024

作者： Patil, Vineeth Mishra, Sukumar Singhal, Ankit Indian Institute of Technology Dept. of Electrical Engineering Delhi India Manipal Academy of Higher Eductaion Dept. of Electrical and Electronics Engineering Manipal India Indian Institute of Technology Dept. of Electrical Engineering Delhi India

ISBN: (纸本)9798350373929

Microgrids using inverter-based resources (IBR) are becoming increasingly popular due to the sharp rise in energy consumption. With well-defined frequency and voltage droop control algorithms, these microgrids use parallel linked inverters that exchange power according to their ratings. With increased penetration of IBRs, stable islanded operation of a microgrid is aspired irrespective of the connected load. The induction motor starting either draws a high inrush current or currents with harmonic content. This current nature can interfere with the grid-forming (GFM) inverter control loops and create complications in the islanded microgrid. This paper considers different starting methods of induction motors connected to a GFM, and a comparison concerning starting current, voltage drop, frequency drop, and total harmonic distortion (THD) is carried out. The analysis is supported through simulations using MATLAB/Simulink. © 2024 IEEE.

关键词： MATLAB

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