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arXiv 2024年

作者： Chakraborty, Kushal Dutta, Aritra Kumar Hussain, Mohammad Avesh Mohiuddin, Syed Raafay Choudhury, Nikumani Matam, Rakesh Mukherjee, Mithun Dept. of Computer Science & Information Systems Birla Institute of Technology & Science Hyderabad Pilani India Dept. of Computer Science & Engineering Indian Institute of Information Technology Guwahati India Nanjing University of Information Science and Technology Nanjing China

The Industrial Internet of Things (IIoT) refers to the use of interconnected smart devices, sensors, and other technologies to create a network of intelligent systems that can monitor and manage industrial processes. 6TiSCH (IPv6 over the Time Slotted Channel Hopping mode of IEEE 802.15.4e) as an enabling technology facilitates low-power and low-latency communication between IoT devices in industrial environments. The Routing Protocol for Low power and lossy networks (RPL), which is used as the de-facto routing protocol for 6TiSCH networks is observed to suffer from several limitations, especially during congestion in the network. Therefore, there is an immediate need for some modifications to the RPL to deal with this problem. Under traffic load which keeps on changing continuously at different instants of time, the proposed mechanism aims at finding the appropriate parent for a node that can forward the packet to the destination through the least congested path with minimal packet loss. This facilitates congestion management under dynamic traffic loads. For this, a new metric for routing using the concept of exponential weighting has been proposed, which takes the number of packets present in the queue of the node into account when choosing the parent at a particular instance of time. Additionally, the paper proposes a parent selection and swapping mechanism for congested networks. Performance evaluations are carried out in order to validate the proposed work. The results show an improvement in the performance of RPL under heavy and dynamic traffic loads. © 2024, CC BY.

关键词： Internet of things

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PUFBind: PUF-Enabled Lightweight Program Binary Authentication for FPGA-based Embedded Systems

arXiv

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arXiv 2025年

作者： Swaroopa, Sneha Balijabudda, Venkata Sreekanth Chakraborty, Rajat Subhra Chakrabarti, Indrajit Dept. of Computer Science and Engineering Indian Institute of Technology Kharagpur West Bengal Kharagpur721302 India Dept. of Electronics and Electrical Communication Engineering Indian Institute of Technology Kharagpur West Bengal Kharagpur721302 India

Field Programmable Gate Array (FPGA)-based embedded systems have become mainstream in the last decade, often in security-sensitive applications. However, even with an authenticated hardware platform, compromised software can severely jeopardize the overall system security, making hardware protection insufficient if the software itself is malicious. In this paper, we propose a novel low-overhead hardware-software co-design solution that utilizes Physical Unclonable Functions (PUFs) to ensure the authenticity of program binaries for microprocessors/microcontrollers mapped on the FPGA. Our technique binds a program binary to a specific target FPGA through a PUF signature, performs runtime authentication for the program binary, and allows execution of the binary only after successful authentication. The proposed scheme is platform-agnostic and capable of operating in a "bare metal" mode (no system software requirement) for maximum flexibility. Our scheme also does not require any modification of the original hardware design or program binary. We demonstrate a successful prototype implementation using the open-source PicoBlaze microcontroller on AMD/Xilinx FPGA, comparing its hardware resource footprint and performance with other existing solutions of a similar nature. Copyright © 2025, The Authors. All rights reserved.

关键词： Authentication

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Optimization of Imprecise Multiplier Circuits by using Binary Decision Diagram 9

Optimization of Imprecise Multiplier Circuits by using Binar...

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9th IEEE International Symposium on Smart Electronic Systems, iSES 2023

作者： Choudhary, Pooja Bhargava, Lava Vinod, G.U. Suhag, Ashok Kumar Fujita, Mashahiro Singh, Virendra Swami Keshvanand Institute of Technology Management and Gramothan Dept. of Electronics and Communication Engineering Jaipur India Malaviya National Institute of Technology Jaipur India Malaviya National Institute of Technology Dept. of Electronics and Communication Engineering Jaipur India Qualcomm Bangalore India Bml Munjal University Dept. of Electronics and Communication Engineering Haryana India Vlsi Design and Education Center University of Tokyo Japan Indian Institute of Technology Dept. of Electrical Engineering Dept. of Computer Science Engineering Bombay India

ISBN: (纸本)9798350383249

Imprecise multipliers are employed to enhance the efficiency and reduce the power consumption of arithmetic circuits while tolerating acceptable levels of inaccuracy in the outcomes. The multiplier circuit has a broader range of applications within embedded systems, particularly in the fields of digital signal processing, IoT and multimedia, etc. We proposed a systematic formal approach utilizing the Look-Up Table (LUT) employing the Burch method to evaluate the imprecise multiplier based on the Binary Decision Diagram (BDD) considering Worst Case Error constraint. Implemented 13 bit multiplier using normal and proposed imprecise multiplier shows 98% reduction in number of nodes. The proposed 25 bit imprecise multiplier based on Burch HL shows an 89% decrement in a number of nodes w.r.t. Burch LH method. BDD generation for imprecise multiplier is 75% faster than normal. © 2023 IEEE.

关键词： Timing circuits

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Prediction of COVID-19 Through Chest X-Ray Images Employing Various Machine Learning Techniques 1

Prediction of COVID-19 Through Chest X-Ray Images Employing ...

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1st International Conference on Intelligent Controller and Computing for Smart Power, ICICCSP 2022

作者： Saheb, Shaik Khasim Narayanan, B. Rao, Thota Venkat Narayana Annamalai University Dept.of Cse Tamilnadu Chidambaram India Sreenidhi Institute of Science and Technology Department of Cse Hyderabad India Annamalai Univeristy Computer Science and Engineering Wing D.D.E Annamalai Nagar Tamilnadu Chidambaram India Sreenidhi Institute of Science and Technology Department of Computer Science and Engineering and HoD-CSE Iot Telangana Hyderabad India

ISBN: (数字)9781665472586

ISBN: (纸本)9781665472586

The COVID-19 is the most infectious disease which is recently discovered. The COVID-19 pandemic has led to excruciating loss to human life and it also caused mild to severe respiratory illness, including death. Detecting the infected patients and taking special care is crucial in fighting covid-19. Radiography and Radiology images are used to diagnose the patients. These are the fastest ways to identify COVID-19 disease. It is observed that patients affected with COVID-19 have specific abnormalities in their chest radiograms. Initially there were few limited set of CT images are available publicly in performing research. Board-certified radiologist role is to perform identification of images exhibiting COVID-19 disease. Chest CT scans are helpful to diagnose COVID-19 disease in individuals. COVID-19 directly shows impact on lungs and it damages and the tiny air sacs. In this paper we have used deep transfer learning models Residual Network (ResNet50) and VGG19 (Visual Geometry Group) to predict the disease at earlier stages. These models obtained a specificity rate of 90% and achieved a highest sensitivity rate of 98 %. In addition to sensitivity and specificity rates ROC curve, average prediction and confusion matrix of each model are presented in the papers. While this achieved performance is very encouraging if we have large set of COVID-19 images then it may give more reliable estimation of accuracy rates. © 2022 IEEE.

关键词： COVID-19

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RSZero-CSAT: Zero-Shot Scene Classification in Remote Sensing Imagery using a Cross Semantic Attribute-guided Transformer

RSZero-CSAT: Zero-Shot Scene Classification in Remote Sensin...

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International Joint Conference on Neural Networks (IJCNN)

作者： Damalla Rambabu Swetha G Rajeshreddy Datla Vishnu Chalavadi C Krishna Mohan Department of Computer Science and Engineering Indian Institute of Technology Hyderabad Dept. of Space Advanced Data Processing Research Institute (ADRIN) Secunderabad India Indian Institute of Technology Tirupati India

ISBN: (数字)9798350359312

ISBN: (纸本)9798350359329

Zero-shot learning (ZSL) based scene classification aims to recognize unseen classes by transferring semantic information from seen classes. The applicability of ZSL for scene classification in remote sensing images becomes challenging due to the complexity of scenes. Earlier attention-based methods are ineffective for extracting discriminative region-based features within a single image. This limitation hinders their ability to achieve transferability and accurately localize object attributes, which is essential for extracting discriminative region-based features. Hence, we propose a method for zero-shot scene classification in remote sensing images using a cross-semantic attribute-guided Transformer named RSZero-CSAT. Firstly, the semantic information is acquired using shared remote sensing semantic attributes to localize object attributes that characterize discriminative region features. Then, a Transformer in RSZero-CSAT is employed to localize object attributes within visual features accurately, enhancing the effectiveness of semantic information transfer in ZSL. Specifically, the RSZero-CSAT employs a semantic attribute → visual Transformer (SAVT) and a visual → semantic attribute Transformer (VSAT) components to extract visual features guided by semantic attributes and semantic attribute features guided by visual features, respectively. Further, SAVT and VSAT mutually learn and collaborate to obtain semantically enriched visual representations, leveraging prediction-level and feature-level semantic collaborative losses for capturing crucial semantic information. Finally, the semantically enriched visual representations obtained from SAVT and VSAT are combined to facilitate visual-semantic interactions in collaboration with class semantic vectors to classify ZSL. Our experimental results demonstrate the impact of RSZero-CSAT in improving the performance of unseen classes on four scene classification benchmark datasets in remote sensing images. The code is avai

关键词： Visualization Scene classification Zero-shot learning Semantics Collaboration Benchmark testing Feature extraction

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A Multistage Cascaded Neural Network Model to Identify the Severity of Epileptic Attack

A Multistage Cascaded Neural Network Model to Identify the S...

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IEEE International Conference on Signal Processing, Informatics, Communication and Energy Systems (SPICES)

作者： Martha Simon Lidiya Lilly Thampi Dept. of Computer Science College of Engineering Trivandrum (CET) Trivandrum India Dept. of Computer Science Indian Institute of Information Technology Kottayam Kottayam India

ISBN: (数字)9798350376135

ISBN: (纸本)9798350376142

Epilepsy is a neurological disorder characterized by recurrent seizures, impacting the quality of life for millions of individuals worldwide. Timely and accurate detection of epileptic seizures is crucial for proper diagnosis and effective treatment. Electroencephalogram (EEG) signals provide vital information about brain activity and serve as a valuable tool for epilepsy detection. The methodology opted for this study was an enhanced multilayer feed forward neural network for automatic detection of epilepsy from EEG signals and hence predicting the severity. The authors build a multistage cascaded neural network model for achieving the same. Initially a Simple Artificial Neural Network (SimpleANN) is designed to classify EEG segments into seizure, healthy and interictal. Later a Multilayer Feed Forward Neural Network (MFFNN) is employed for detecting the severity of epileptic patients and hence can be classified into primary and secondary stages. The experimental results showed that the proposed SimpleANN classifier had provided noticeable results, and outperforms all tested classifiers. The study involves the collection of EEG data from a diverse group of patients, including those with epilepsy and healthy individuals. This automated epilepsy identifying system passes through different stages including decomposition, feature extraction for achieving a better performance model. The proposed system was tested and compared with SVM, KNN, MLP and Decision Tree under different measurement metrics. ANN has managed to give an accuracy of 80 - 90% which is significantly higher as compared to other machine learning models. The proposed work can automatically learn complex patterns from EEG data provides an advantage in identifying subtle seizure related features that may not be evident through manual analysis. Furthermore, the model offers real-time capabilities, making it suitable for continuous monitoring of patients at risk of seizures.

关键词： Support vector machines Accuracy Epilepsy Artificial neural networks Signal processing Brain modeling Nonhomogeneous media Electroencephalography Feeds Biological neural networks

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QuAKE: Speeding up Model Inference Using Quick and Approximate Kernels for Exponential Non-Linearities

arXiv

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arXiv 2024年

作者： Narayanaswami, Sai Kiran Srinivasan, Gopalakrishnan Ravindran, Balaraman Centre for Responsible AI Indian Institute of Technology Madras India Robert Bosch Centre for Data Science and AI Dept. of Computer Science and Engineering Indian Institute of Technology Madras India Wadhwani School of Data Science and AI Indian Institute of Technology Madras India

As machine learning gets deployed more and more widely, and model sizes continue to grow, improving computational efficiency during model inference has become a key challenge. In many commonly used model architectures, including Transformers, a significant portion of the inference computation is comprised of exponential non-linearities such as Softmax. In this work, we develop QuAKE, a collection of novel operators that leverage certain properties of IEEE-754 floating point representations to quickly approximate the exponential function without requiring specialized hardware, extra memory, or precomputation. We propose optimizations that enhance the efficiency of QuAKE in commonly used exponential non-linearities such as Softmax, GELU, and the Logistic function. Our benchmarks demonstrate substantial inference speed improvements between 10% and 35% on server CPUs, and 5% and 45% on embedded and mobile-scale CPUs for a variety of model architectures and sizes. Evaluations of model performance on standard datasets and tasks from various domains show that QuAKE operators are able to provide sizable speed benefits with little to no loss of performance on downstream tasks. Copyright © 2024, The Authors. All rights reserved.

关键词： Exponential functions

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Analysis and Modeling of Flicker Noise in Ferroelectric FinFETs

Analysis and Modeling of Flicker Noise in Ferroelectric FinF...

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2022 IEEE International Conference on Emerging Electronics, ICEE 2022

作者： Kumar, Abhishek Pahwa, Girish Behera, Amit Kumar Bulusu, Anand Mehrotra, Shruti Dasgupta, Avirup Indian Institute of Technology Roorkee Dept. of Electronics and Communication Roorkee India Electrical Engg. and Computer Science University of California Berkeley United States Indian Institute of Technology Kanpur Dept. of Electrical Engineering Kanpur India

ISBN: (纸本)9781665491853

This paper presents an in-depth analysis of the flicker noise (1/f noise) in Field Effect Transistors (FETs) with ferroelectric gate stack. The analysis is valid for all ferroelectric FETs (FeFETs). We have also proposed an enhancement to industry standard flicker noise models to take ferroelectric thickness into account. © 2022 IEEE.

关键词： FinFET

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Physical-Design Aware Scan Cell Reordering for Low Power Testing

Physical-Design Aware Scan Cell Reordering for Low Power Tes...

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East-West Design & Test Symposium (EWDTS)

作者： Rohit Badjatya Vinay Rahul Kumar Jaynarayan T Tudu Masahiro Fujita Virendra Singh Dept. of Electrical Engineering Indian Institute of Technology Bombay Mumbai India Dept. of Computer Science Engineering Indian Institute of Technology Tirupati India Tirupati India Dept. of Electrical Engineering University of Tokyo Tokyo Japan

ISBN: (数字)9798331515768

ISBN: (纸本)9798331515775

Scan chain architecture is widely employed in modern VLSI design for test applications. However, it often leads to high power consumption during testing. The architecture experiences elevated simultaneous switching activity due to non-functional input patterns applied during test time, resulting in significant peak power in the circuits. This increased power consumption can cause IR drop issues, negatively impacting the chip's yield. This paper proposes an innovative approach to reduce both peak power and routing length by effectively reordering the scan chains. Experimental results show that the proposed approach is effective for the ISCAS'89 and ITC'99 benchmark circuits and this method achieves lower peak power and routing length compared to the state of the art.

关键词： Power demand Layout computer architecture Benchmark testing Very large scale integration Routing Vectors Timing Signal integrity Switching circuits

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Steganalysis on Dual-Layer Security of Messages Using Steganography and Cryptography

Steganalysis on Dual-Layer Security of Messages Using Stegan...

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International Conference on Information technology and Electrical engineering (ICITEE)

作者： Zeba Shamsi Anish Kumar Saha Ripon Patgiri Khoirom Motilal Singh Laiphrakpam Dolendro Singh Dept. of Computer Science and Engineering National Institute of Technology Silchar Assam India Dept. of Computer Science and Engineering Indian Institute of Information Technology Senapati Manipur India

Recently, Bansal et al. proposed a dual-layer message security technique using steganography and cryptography. An index table maps each text data to an index point and an elliptic curve point. The text data are encrypted using elliptic curve cryptography, and the corresponding index values are embedded in a cover image using the Least Significant Bit Inversion technique. The proposed paper breaks the security of the key exchange technique in the Bansal et al. method and the secret text is extracted.

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