In this paper, we have investigated the effectiveness of employing the drain field-plate technique to enhance the breakdown voltage of single source field-plate (SSFP) AlGaN/GaN power high electron mobility transistor...
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In this letter, we proposed a new power High Electron Mobility Transistor (HEMT) with partial stepped recess in the drain access region. This approach represents a new way to increase the breakdown voltage by 100%, wh...
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In this paper, we present an enhancement of breakdown voltage in AlGaN/GaN/AlGaN double-heterojunction high-electron-mobility-transistor devices by introducing a magnesium doping layer in AlGaN buffer layer under the ...
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In this letter, we proposed a new power High Electron Mobility Transistor (HEMT) with partial stepped recess in the drain access region. This approach represents a new way to increase the breakdown voltage by 100%, wh...
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In this letter, we proposed a new power High Electron Mobility Transistor (HEMT) with partial stepped recess in the drain access region. This approach represents a new way to increase the breakdown voltage by 100%, which is very important in higher voltage applications. The use of drain access region recesses allows a 43% decrease of the peak electric field and only a 1.91% increase of the drain access resistance which is negligible. The proposed structure shows an improvement in the maximum oscillation frequency (f max ) and cut-off frequency (f T ) over the conventional structure.
In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silic...
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In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silicon-germanium (SiGe) wire and gate dielectric. Indeed the effect of high-κ dielectric on Field Induced Barrier Lowering (FIBL) has been studied. Due to the higher electron mobility in tensile strained silicon, the n-type FETs with strained silicon channel have better drain current compare with the pure Si one. In this structure gate dielectric divided in two parts, we have used high-κ dielectric near the source and low-κ dielectric near the drain to reduce the short channel effects. By this structure short channel effects such as FIBL will be reduced indeed by increasing the RSiGe, ID-VD characteristics will be improved. The leakage current and transfer characteristics, the threshold-voltage (Vt), the drain induced barrier height lowering (DIBL), are estimated with respect to, gate bias (VG), RSiGe and different gate dielectrics. For short channel effects, such as DIBL, gate all around strained silicon nanowire FET have similar characteristics with the pure Si one while dual dielectrics can improve short channel effects in this structure.
A device analysis of the photoconductive semiconductor switch is carried out to investigate distribution of electric field and carrier concentrations as well as the current density distribution. The operation of this ...
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A device analysis of the photoconductive semiconductor switch is carried out to investigate distribution of electric field and carrier concentrations as well as the current density distribution. The operation of this device was then investigated as a switch operating in X band. It is shown that despite the presence of symmetry geometry, switch current density of the on-state steady state mode is distributed asymmetrically throughout the device.
In this paper we have investigated the effectiveness of employing the single field-plate (SFP) technique to enhance the breakdown voltage (BV) of AlGaN/GaN power high electron mobility transistors (HEMTs).A systematic...
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In this paper we have investigated the effectiveness of employing the single field-plate (SFP) technique to enhance the breakdown voltage (BV) of AlGaN/GaN power high electron mobility transistors (HEMTs).A systematic procedure is provided for designing the SFP device, using two dimensional (2-D) simulation to obtain the maximum improvement in the drain-source current (I DS ) and to achieve maximum breakdown voltage. It is found that significantly higher breakdown voltages and I DS can be achieved by just raising the thickness of the passivation layer Si 3 N 4 beneath SFP (t) and raising SFP length (L sfp ) between the source and drain. We demonstrate that when a single field-plate connected to the source is employed, both breakdown voltage and I DS can be enhanced by optimizing the passivation layer Si 3 N 4 thickness beneath the SFP as well as the SFP geometry.
This paper presents a novel MEMS capacitive accelerometer which employs an estimator. This scheme is realized by adding an adaptive nonlinear observer to the conventional PID closed loop system. This estimator is used...
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This paper presents a novel MEMS capacitive accelerometer which employs an estimator. This scheme is realized by adding an adaptive nonlinear observer to the conventional PID closed loop system. This estimator is used for online estimation of the parameter variations for MEMS accelerometers and gives the capability of self testing to the system. The performance of the proposed hybrid controller investigated here is validated by computer simulation.
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